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0001 //===- llvm/CodeGen/GlobalISel/CallLowering.h - Call lowering ---*- C++ -*-===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 ///
0009 /// \file
0010 /// This file describes how to lower LLVM calls to machine code calls.
0011 ///
0012 //===----------------------------------------------------------------------===//
0013 
0014 #ifndef LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
0015 #define LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H
0016 
0017 #include "llvm/ADT/ArrayRef.h"
0018 #include "llvm/ADT/SmallVector.h"
0019 #include "llvm/CodeGen/CallingConvLower.h"
0020 #include "llvm/CodeGen/MachineOperand.h"
0021 #include "llvm/CodeGen/TargetCallingConv.h"
0022 #include "llvm/CodeGenTypes/LowLevelType.h"
0023 #include "llvm/CodeGenTypes/MachineValueType.h"
0024 #include "llvm/IR/CallingConv.h"
0025 #include "llvm/IR/Type.h"
0026 #include "llvm/IR/Value.h"
0027 #include "llvm/Support/ErrorHandling.h"
0028 #include <cstdint>
0029 #include <functional>
0030 
0031 namespace llvm {
0032 
0033 class AttributeList;
0034 class CallBase;
0035 class DataLayout;
0036 class Function;
0037 class FunctionLoweringInfo;
0038 class MachineIRBuilder;
0039 class MachineFunction;
0040 struct MachinePointerInfo;
0041 class MachineRegisterInfo;
0042 class TargetLowering;
0043 
0044 class CallLowering {
0045   const TargetLowering *TLI;
0046 
0047   virtual void anchor();
0048 public:
0049   struct BaseArgInfo {
0050     Type *Ty;
0051     SmallVector<ISD::ArgFlagsTy, 4> Flags;
0052     bool IsFixed;
0053 
0054     BaseArgInfo(Type *Ty,
0055                 ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
0056                 bool IsFixed = true)
0057         : Ty(Ty), Flags(Flags), IsFixed(IsFixed) {}
0058 
0059     BaseArgInfo() : Ty(nullptr), IsFixed(false) {}
0060   };
0061 
0062   struct ArgInfo : public BaseArgInfo {
0063     SmallVector<Register, 4> Regs;
0064     // If the argument had to be split into multiple parts according to the
0065     // target calling convention, then this contains the original vregs
0066     // if the argument was an incoming arg.
0067     SmallVector<Register, 2> OrigRegs;
0068 
0069     /// Optionally track the original IR value for the argument. This may not be
0070     /// meaningful in all contexts. This should only be used on for forwarding
0071     /// through to use for aliasing information in MachinePointerInfo for memory
0072     /// arguments.
0073     const Value *OrigValue = nullptr;
0074 
0075     /// Index original Function's argument.
0076     unsigned OrigArgIndex;
0077 
0078     /// Sentinel value for implicit machine-level input arguments.
0079     static const unsigned NoArgIndex = UINT_MAX;
0080 
0081     ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex,
0082             ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
0083             bool IsFixed = true, const Value *OrigValue = nullptr)
0084         : BaseArgInfo(Ty, Flags, IsFixed), Regs(Regs), OrigValue(OrigValue),
0085           OrigArgIndex(OrigIndex) {
0086       if (!Regs.empty() && Flags.empty())
0087         this->Flags.push_back(ISD::ArgFlagsTy());
0088       // FIXME: We should have just one way of saying "no register".
0089       assert(((Ty->isVoidTy() || Ty->isEmptyTy()) ==
0090               (Regs.empty() || Regs[0] == 0)) &&
0091              "only void types should have no register");
0092     }
0093 
0094     ArgInfo(ArrayRef<Register> Regs, const Value &OrigValue, unsigned OrigIndex,
0095             ArrayRef<ISD::ArgFlagsTy> Flags = ArrayRef<ISD::ArgFlagsTy>(),
0096             bool IsFixed = true)
0097       : ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, IsFixed, &OrigValue) {}
0098 
0099     ArgInfo() = default;
0100   };
0101 
0102   struct PtrAuthInfo {
0103     uint64_t Key;
0104     Register Discriminator;
0105   };
0106 
0107   struct CallLoweringInfo {
0108     /// Calling convention to be used for the call.
0109     CallingConv::ID CallConv = CallingConv::C;
0110 
0111     /// Destination of the call. It should be either a register, globaladdress,
0112     /// or externalsymbol.
0113     MachineOperand Callee = MachineOperand::CreateImm(0);
0114 
0115     /// Descriptor for the return type of the function.
0116     ArgInfo OrigRet;
0117 
0118     /// List of descriptors of the arguments passed to the function.
0119     SmallVector<ArgInfo, 32> OrigArgs;
0120 
0121     /// Valid if the call has a swifterror inout parameter, and contains the
0122     /// vreg that the swifterror should be copied into after the call.
0123     Register SwiftErrorVReg;
0124 
0125     /// Valid if the call is a controlled convergent operation.
0126     Register ConvergenceCtrlToken;
0127 
0128     /// Original IR callsite corresponding to this call, if available.
0129     const CallBase *CB = nullptr;
0130 
0131     MDNode *KnownCallees = nullptr;
0132 
0133     /// The auth-call information in the "ptrauth" bundle, if present.
0134     std::optional<PtrAuthInfo> PAI;
0135 
0136     /// True if the call must be tail call optimized.
0137     bool IsMustTailCall = false;
0138 
0139     /// True if the call passes all target-independent checks for tail call
0140     /// optimization.
0141     bool IsTailCall = false;
0142 
0143     /// True if the call was lowered as a tail call. This is consumed by the
0144     /// legalizer. This allows the legalizer to lower libcalls as tail calls.
0145     bool LoweredTailCall = false;
0146 
0147     /// True if the call is to a vararg function.
0148     bool IsVarArg = false;
0149 
0150     /// True if the function's return value can be lowered to registers.
0151     bool CanLowerReturn = true;
0152 
0153     /// VReg to hold the hidden sret parameter.
0154     Register DemoteRegister;
0155 
0156     /// The stack index for sret demotion.
0157     int DemoteStackIndex;
0158 
0159     /// Expected type identifier for indirect calls with a CFI check.
0160     const ConstantInt *CFIType = nullptr;
0161 
0162     /// True if this call results in convergent operations.
0163     bool IsConvergent = true;
0164   };
0165 
0166   /// Argument handling is mostly uniform between the four places that
0167   /// make these decisions: function formal arguments, call
0168   /// instruction args, call instruction returns and function
0169   /// returns. However, once a decision has been made on where an
0170   /// argument should go, exactly what happens can vary slightly. This
0171   /// class abstracts the differences.
0172   ///
0173   /// ValueAssigner should not depend on any specific function state, and
0174   /// only determine the types and locations for arguments.
0175   struct ValueAssigner {
0176     ValueAssigner(bool IsIncoming, CCAssignFn *AssignFn_,
0177                   CCAssignFn *AssignFnVarArg_ = nullptr)
0178         : AssignFn(AssignFn_), AssignFnVarArg(AssignFnVarArg_),
0179           IsIncomingArgumentHandler(IsIncoming) {
0180 
0181       // Some targets change the handler depending on whether the call is
0182       // varargs or not. If
0183       if (!AssignFnVarArg)
0184         AssignFnVarArg = AssignFn;
0185     }
0186 
0187     virtual ~ValueAssigner() = default;
0188 
0189     /// Returns true if the handler is dealing with incoming arguments,
0190     /// i.e. those that move values from some physical location to vregs.
0191     bool isIncomingArgumentHandler() const {
0192       return IsIncomingArgumentHandler;
0193     }
0194 
0195     /// Wrap call to (typically tablegenerated CCAssignFn). This may be
0196     /// overridden to track additional state information as arguments are
0197     /// assigned or apply target specific hacks around the legacy
0198     /// infrastructure.
0199     virtual bool assignArg(unsigned ValNo, EVT OrigVT, MVT ValVT, MVT LocVT,
0200                            CCValAssign::LocInfo LocInfo, const ArgInfo &Info,
0201                            ISD::ArgFlagsTy Flags, CCState &State) {
0202       if (getAssignFn(State.isVarArg())(ValNo, ValVT, LocVT, LocInfo, Flags,
0203                                         State))
0204         return true;
0205       StackSize = State.getStackSize();
0206       return false;
0207     }
0208 
0209     /// Assignment function to use for a general call.
0210     CCAssignFn *AssignFn;
0211 
0212     /// Assignment function to use for a variadic call. This is usually the same
0213     /// as AssignFn on most targets.
0214     CCAssignFn *AssignFnVarArg;
0215 
0216     /// The size of the currently allocated portion of the stack.
0217     uint64_t StackSize = 0;
0218 
0219     /// Select the appropriate assignment function depending on whether this is
0220     /// a variadic call.
0221     CCAssignFn *getAssignFn(bool IsVarArg) const {
0222       return IsVarArg ? AssignFnVarArg : AssignFn;
0223     }
0224 
0225   private:
0226     const bool IsIncomingArgumentHandler;
0227     virtual void anchor();
0228   };
0229 
0230   struct IncomingValueAssigner : public ValueAssigner {
0231     IncomingValueAssigner(CCAssignFn *AssignFn_,
0232                           CCAssignFn *AssignFnVarArg_ = nullptr)
0233         : ValueAssigner(true, AssignFn_, AssignFnVarArg_) {}
0234   };
0235 
0236   struct OutgoingValueAssigner : public ValueAssigner {
0237     OutgoingValueAssigner(CCAssignFn *AssignFn_,
0238                           CCAssignFn *AssignFnVarArg_ = nullptr)
0239         : ValueAssigner(false, AssignFn_, AssignFnVarArg_) {}
0240   };
0241 
0242   struct ValueHandler {
0243     MachineIRBuilder &MIRBuilder;
0244     MachineRegisterInfo &MRI;
0245     const bool IsIncomingArgumentHandler;
0246 
0247     ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder,
0248                  MachineRegisterInfo &MRI)
0249         : MIRBuilder(MIRBuilder), MRI(MRI),
0250           IsIncomingArgumentHandler(IsIncoming) {}
0251 
0252     virtual ~ValueHandler() = default;
0253 
0254     /// Returns true if the handler is dealing with incoming arguments,
0255     /// i.e. those that move values from some physical location to vregs.
0256     bool isIncomingArgumentHandler() const {
0257       return IsIncomingArgumentHandler;
0258     }
0259 
0260     /// Materialize a VReg containing the address of the specified
0261     /// stack-based object. This is either based on a FrameIndex or
0262     /// direct SP manipulation, depending on the context. \p MPO
0263     /// should be initialized to an appropriate description of the
0264     /// address created.
0265     virtual Register getStackAddress(uint64_t MemSize, int64_t Offset,
0266                                      MachinePointerInfo &MPO,
0267                                      ISD::ArgFlagsTy Flags) = 0;
0268 
0269     /// Return the in-memory size to write for the argument at \p VA. This may
0270     /// be smaller than the allocated stack slot size.
0271     ///
0272     /// This is overridable primarily for targets to maintain compatibility with
0273     /// hacks around the existing DAG call lowering infrastructure.
0274     virtual LLT getStackValueStoreType(const DataLayout &DL,
0275                                        const CCValAssign &VA,
0276                                        ISD::ArgFlagsTy Flags) const;
0277 
0278     /// The specified value has been assigned to a physical register,
0279     /// handle the appropriate COPY (either to or from) and mark any
0280     /// relevant uses/defines as needed.
0281     virtual void assignValueToReg(Register ValVReg, Register PhysReg,
0282                                   const CCValAssign &VA) = 0;
0283 
0284     /// The specified value has been assigned to a stack
0285     /// location. Load or store it there, with appropriate extension
0286     /// if necessary.
0287     virtual void assignValueToAddress(Register ValVReg, Register Addr,
0288                                       LLT MemTy, const MachinePointerInfo &MPO,
0289                                       const CCValAssign &VA) = 0;
0290 
0291     /// An overload which takes an ArgInfo if additional information about the
0292     /// arg is needed. \p ValRegIndex is the index in \p Arg.Regs for the value
0293     /// to store.
0294     virtual void assignValueToAddress(const ArgInfo &Arg, unsigned ValRegIndex,
0295                                       Register Addr, LLT MemTy,
0296                                       const MachinePointerInfo &MPO,
0297                                       const CCValAssign &VA) {
0298       assignValueToAddress(Arg.Regs[ValRegIndex], Addr, MemTy, MPO, VA);
0299     }
0300 
0301     /// Handle custom values, which may be passed into one or more of \p VAs.
0302     /// \p If the handler wants the assignments to be delayed until after
0303     /// mem loc assignments, then it sets \p Thunk to the thunk to do the
0304     /// assignment.
0305     /// \return The number of \p VAs that have been assigned including the
0306     ///         first one, and which should therefore be skipped from further
0307     ///         processing.
0308     virtual unsigned assignCustomValue(ArgInfo &Arg, ArrayRef<CCValAssign> VAs,
0309                                        std::function<void()> *Thunk = nullptr) {
0310       // This is not a pure virtual method because not all targets need to worry
0311       // about custom values.
0312       llvm_unreachable("Custom values not supported");
0313     }
0314 
0315     /// Do a memory copy of \p MemSize bytes from \p SrcPtr to \p DstPtr. This
0316     /// is necessary for outgoing stack-passed byval arguments.
0317     void
0318     copyArgumentMemory(const ArgInfo &Arg, Register DstPtr, Register SrcPtr,
0319                        const MachinePointerInfo &DstPtrInfo, Align DstAlign,
0320                        const MachinePointerInfo &SrcPtrInfo, Align SrcAlign,
0321                        uint64_t MemSize, CCValAssign &VA) const;
0322 
0323     /// Extend a register to the location type given in VA, capped at extending
0324     /// to at most MaxSize bits. If MaxSizeBits is 0 then no maximum is set.
0325     Register extendRegister(Register ValReg, const CCValAssign &VA,
0326                             unsigned MaxSizeBits = 0);
0327   };
0328 
0329   /// Base class for ValueHandlers used for arguments coming into the current
0330   /// function, or for return values received from a call.
0331   struct IncomingValueHandler : public ValueHandler {
0332     IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
0333         : ValueHandler(/*IsIncoming*/ true, MIRBuilder, MRI) {}
0334 
0335     /// Insert G_ASSERT_ZEXT/G_ASSERT_SEXT or other hint instruction based on \p
0336     /// VA, returning the new register if a hint was inserted.
0337     Register buildExtensionHint(const CCValAssign &VA, Register SrcReg,
0338                                 LLT NarrowTy);
0339 
0340     /// Provides a default implementation for argument handling.
0341     void assignValueToReg(Register ValVReg, Register PhysReg,
0342                           const CCValAssign &VA) override;
0343   };
0344 
0345   /// Base class for ValueHandlers used for arguments passed to a function call,
0346   /// or for return values.
0347   struct OutgoingValueHandler : public ValueHandler {
0348     OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI)
0349         : ValueHandler(/*IsIncoming*/ false, MIRBuilder, MRI) {}
0350   };
0351 
0352 protected:
0353   /// Getter for generic TargetLowering class.
0354   const TargetLowering *getTLI() const {
0355     return TLI;
0356   }
0357 
0358   /// Getter for target specific TargetLowering class.
0359   template <class XXXTargetLowering>
0360     const XXXTargetLowering *getTLI() const {
0361     return static_cast<const XXXTargetLowering *>(TLI);
0362   }
0363 
0364   /// \returns Flags corresponding to the attributes on the \p ArgIdx-th
0365   /// parameter of \p Call.
0366   ISD::ArgFlagsTy getAttributesForArgIdx(const CallBase &Call,
0367                                          unsigned ArgIdx) const;
0368 
0369   /// \returns Flags corresponding to the attributes on the return from \p Call.
0370   ISD::ArgFlagsTy getAttributesForReturn(const CallBase &Call) const;
0371 
0372   /// Adds flags to \p Flags based off of the attributes in \p Attrs.
0373   /// \p OpIdx is the index in \p Attrs to add flags from.
0374   void addArgFlagsFromAttributes(ISD::ArgFlagsTy &Flags,
0375                                  const AttributeList &Attrs,
0376                                  unsigned OpIdx) const;
0377 
0378   template <typename FuncInfoTy>
0379   void setArgFlags(ArgInfo &Arg, unsigned OpIdx, const DataLayout &DL,
0380                    const FuncInfoTy &FuncInfo) const;
0381 
0382   /// Break \p OrigArgInfo into one or more pieces the calling convention can
0383   /// process, returned in \p SplitArgs. For example, this should break structs
0384   /// down into individual fields.
0385   ///
0386   /// If \p Offsets is non-null, it points to a vector to be filled in
0387   /// with the in-memory offsets of each of the individual values.
0388   void splitToValueTypes(const ArgInfo &OrigArgInfo,
0389                          SmallVectorImpl<ArgInfo> &SplitArgs,
0390                          const DataLayout &DL, CallingConv::ID CallConv,
0391                          SmallVectorImpl<uint64_t> *Offsets = nullptr) const;
0392 
0393   /// Analyze the argument list in \p Args, using \p Assigner to populate \p
0394   /// CCInfo. This will determine the types and locations to use for passed or
0395   /// returned values. This may resize fields in \p Args if the value is split
0396   /// across multiple registers or stack slots.
0397   ///
0398   /// This is independent of the function state and can be used
0399   /// to determine how a call would pass arguments without needing to change the
0400   /// function. This can be used to check if arguments are suitable for tail
0401   /// call lowering.
0402   ///
0403   /// \return True if everything has succeeded, false otherwise.
0404   bool determineAssignments(ValueAssigner &Assigner,
0405                             SmallVectorImpl<ArgInfo> &Args,
0406                             CCState &CCInfo) const;
0407 
0408   /// Invoke ValueAssigner::assignArg on each of the given \p Args and then use
0409   /// \p Handler to move them to the assigned locations.
0410   ///
0411   /// \return True if everything has succeeded, false otherwise.
0412   bool
0413   determineAndHandleAssignments(ValueHandler &Handler, ValueAssigner &Assigner,
0414                                 SmallVectorImpl<ArgInfo> &Args,
0415                                 MachineIRBuilder &MIRBuilder,
0416                                 CallingConv::ID CallConv, bool IsVarArg,
0417                                 ArrayRef<Register> ThisReturnRegs = {}) const;
0418 
0419   /// Use \p Handler to insert code to handle the argument/return values
0420   /// represented by \p Args. It's expected determineAssignments previously
0421   /// processed these arguments to populate \p CCState and \p ArgLocs.
0422   bool handleAssignments(ValueHandler &Handler, SmallVectorImpl<ArgInfo> &Args,
0423                          CCState &CCState,
0424                          SmallVectorImpl<CCValAssign> &ArgLocs,
0425                          MachineIRBuilder &MIRBuilder,
0426                          ArrayRef<Register> ThisReturnRegs = {}) const;
0427 
0428   /// Check whether parameters to a call that are passed in callee saved
0429   /// registers are the same as from the calling function.  This needs to be
0430   /// checked for tail call eligibility.
0431   bool parametersInCSRMatch(const MachineRegisterInfo &MRI,
0432                             const uint32_t *CallerPreservedMask,
0433                             const SmallVectorImpl<CCValAssign> &ArgLocs,
0434                             const SmallVectorImpl<ArgInfo> &OutVals) const;
0435 
0436   /// \returns True if the calling convention for a callee and its caller pass
0437   /// results in the same way. Typically used for tail call eligibility checks.
0438   ///
0439   /// \p Info is the CallLoweringInfo for the call.
0440   /// \p MF is the MachineFunction for the caller.
0441   /// \p InArgs contains the results of the call.
0442   /// \p CalleeAssigner specifies the target's handling of the argument types
0443   /// for the callee.
0444   /// \p CallerAssigner specifies the target's handling of the
0445   /// argument types for the caller.
0446   bool resultsCompatible(CallLoweringInfo &Info, MachineFunction &MF,
0447                          SmallVectorImpl<ArgInfo> &InArgs,
0448                          ValueAssigner &CalleeAssigner,
0449                          ValueAssigner &CallerAssigner) const;
0450 
0451 public:
0452   CallLowering(const TargetLowering *TLI) : TLI(TLI) {}
0453   virtual ~CallLowering() = default;
0454 
0455   /// \return true if the target is capable of handling swifterror values that
0456   /// have been promoted to a specified register. The extended versions of
0457   /// lowerReturn and lowerCall should be implemented.
0458   virtual bool supportSwiftError() const {
0459     return false;
0460   }
0461 
0462   /// Load the returned value from the stack into virtual registers in \p VRegs.
0463   /// It uses the frame index \p FI and the start offset from \p DemoteReg.
0464   /// The loaded data size will be determined from \p RetTy.
0465   void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy,
0466                        ArrayRef<Register> VRegs, Register DemoteReg,
0467                        int FI) const;
0468 
0469   /// Store the return value given by \p VRegs into stack starting at the offset
0470   /// specified in \p DemoteReg.
0471   void insertSRetStores(MachineIRBuilder &MIRBuilder, Type *RetTy,
0472                         ArrayRef<Register> VRegs, Register DemoteReg) const;
0473 
0474   /// Insert the hidden sret ArgInfo to the beginning of \p SplitArgs.
0475   /// This function should be called from the target specific
0476   /// lowerFormalArguments when \p F requires the sret demotion.
0477   void insertSRetIncomingArgument(const Function &F,
0478                                   SmallVectorImpl<ArgInfo> &SplitArgs,
0479                                   Register &DemoteReg, MachineRegisterInfo &MRI,
0480                                   const DataLayout &DL) const;
0481 
0482   /// For the call-base described by \p CB, insert the hidden sret ArgInfo to
0483   /// the OrigArgs field of \p Info.
0484   void insertSRetOutgoingArgument(MachineIRBuilder &MIRBuilder,
0485                                   const CallBase &CB,
0486                                   CallLoweringInfo &Info) const;
0487 
0488   /// \return True if the return type described by \p Outs can be returned
0489   /// without performing sret demotion.
0490   bool checkReturn(CCState &CCInfo, SmallVectorImpl<BaseArgInfo> &Outs,
0491                    CCAssignFn *Fn) const;
0492 
0493   /// Get the type and the ArgFlags for the split components of \p RetTy as
0494   /// returned by \c ComputeValueVTs.
0495   void getReturnInfo(CallingConv::ID CallConv, Type *RetTy, AttributeList Attrs,
0496                      SmallVectorImpl<BaseArgInfo> &Outs,
0497                      const DataLayout &DL) const;
0498 
0499   /// Toplevel function to check the return type based on the target calling
0500   /// convention. \return True if the return value of \p MF can be returned
0501   /// without performing sret demotion.
0502   bool checkReturnTypeForCallConv(MachineFunction &MF) const;
0503 
0504   /// This hook must be implemented to check whether the return values
0505   /// described by \p Outs can fit into the return registers. If false
0506   /// is returned, an sret-demotion is performed.
0507   virtual bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv,
0508                               SmallVectorImpl<BaseArgInfo> &Outs,
0509                               bool IsVarArg) const {
0510     return true;
0511   }
0512 
0513   /// This hook must be implemented to lower outgoing return values, described
0514   /// by \p Val, into the specified virtual registers \p VRegs.
0515   /// This hook is used by GlobalISel.
0516   ///
0517   /// \p FLI is required for sret demotion.
0518   ///
0519   /// \p SwiftErrorVReg is non-zero if the function has a swifterror parameter
0520   /// that needs to be implicitly returned.
0521   ///
0522   /// \return True if the lowering succeeds, false otherwise.
0523   virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
0524                            ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI,
0525                            Register SwiftErrorVReg) const {
0526     if (!supportSwiftError()) {
0527       assert(SwiftErrorVReg == 0 && "attempt to use unsupported swifterror");
0528       return lowerReturn(MIRBuilder, Val, VRegs, FLI);
0529     }
0530     return false;
0531   }
0532 
0533   /// This hook behaves as the extended lowerReturn function, but for targets
0534   /// that do not support swifterror value promotion.
0535   virtual bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
0536                            ArrayRef<Register> VRegs,
0537                            FunctionLoweringInfo &FLI) const {
0538     return false;
0539   }
0540 
0541   virtual bool fallBackToDAGISel(const MachineFunction &MF) const {
0542     return false;
0543   }
0544 
0545   /// This hook must be implemented to lower the incoming (formal)
0546   /// arguments, described by \p VRegs, for GlobalISel. Each argument
0547   /// must end up in the related virtual registers described by \p VRegs.
0548   /// In other words, the first argument should end up in \c VRegs[0],
0549   /// the second in \c VRegs[1], and so on. For each argument, there will be one
0550   /// register for each non-aggregate type, as returned by \c computeValueLLTs.
0551   /// \p MIRBuilder is set to the proper insertion for the argument
0552   /// lowering. \p FLI is required for sret demotion.
0553   ///
0554   /// \return True if the lowering succeeded, false otherwise.
0555   virtual bool lowerFormalArguments(MachineIRBuilder &MIRBuilder,
0556                                     const Function &F,
0557                                     ArrayRef<ArrayRef<Register>> VRegs,
0558                                     FunctionLoweringInfo &FLI) const {
0559     return false;
0560   }
0561 
0562   /// This hook must be implemented to lower the given call instruction,
0563   /// including argument and return value marshalling.
0564   ///
0565   ///
0566   /// \return true if the lowering succeeded, false otherwise.
0567   virtual bool lowerCall(MachineIRBuilder &MIRBuilder,
0568                          CallLoweringInfo &Info) const {
0569     return false;
0570   }
0571 
0572   /// Lower the given call instruction, including argument and return value
0573   /// marshalling.
0574   ///
0575   /// \p CI is the call/invoke instruction.
0576   ///
0577   /// \p ResRegs are the registers where the call's return value should be
0578   /// stored (or 0 if there is no return value). There will be one register for
0579   /// each non-aggregate type, as returned by \c computeValueLLTs.
0580   ///
0581   /// \p ArgRegs is a list of lists of virtual registers containing each
0582   /// argument that needs to be passed (argument \c i should be placed in \c
0583   /// ArgRegs[i]). For each argument, there will be one register for each
0584   /// non-aggregate type, as returned by \c computeValueLLTs.
0585   ///
0586   /// \p SwiftErrorVReg is non-zero if the call has a swifterror inout
0587   /// parameter, and contains the vreg that the swifterror should be copied into
0588   /// after the call.
0589   ///
0590   /// \p GetCalleeReg is a callback to materialize a register for the callee if
0591   /// the target determines it cannot jump to the destination based purely on \p
0592   /// CI. This might be because \p CI is indirect, or because of the limited
0593   /// range of an immediate jump.
0594   ///
0595   /// \return true if the lowering succeeded, false otherwise.
0596   bool lowerCall(MachineIRBuilder &MIRBuilder, const CallBase &Call,
0597                  ArrayRef<Register> ResRegs,
0598                  ArrayRef<ArrayRef<Register>> ArgRegs, Register SwiftErrorVReg,
0599                  std::optional<PtrAuthInfo> PAI, Register ConvergenceCtrlToken,
0600                  std::function<unsigned()> GetCalleeReg) const;
0601 
0602   /// For targets which want to use big-endian can enable it with
0603   /// enableBigEndian() hook
0604   virtual bool enableBigEndian() const { return false; }
0605 
0606   /// For targets which support the "returned" parameter attribute, returns
0607   /// true if the given type is a valid one to use with "returned".
0608   virtual bool isTypeIsValidForThisReturn(EVT Ty) const { return false; }
0609 };
0610 
0611 } // end namespace llvm
0612 
0613 #endif // LLVM_CODEGEN_GLOBALISEL_CALLLOWERING_H