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0001 //===- llvm/CallingConv.h - LLVM Calling Conventions ------------*- C++ -*-===// 0002 // 0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 0004 // See https://llvm.org/LICENSE.txt for license information. 0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 0006 // 0007 //===----------------------------------------------------------------------===// 0008 // 0009 // This file defines LLVM's set of calling conventions. 0010 // 0011 //===----------------------------------------------------------------------===// 0012 0013 #ifndef LLVM_IR_CALLINGCONV_H 0014 #define LLVM_IR_CALLINGCONV_H 0015 0016 namespace llvm { 0017 0018 /// CallingConv Namespace - This namespace contains an enum with a value for 0019 /// the well-known calling conventions. 0020 /// 0021 namespace CallingConv { 0022 0023 /// LLVM IR allows to use arbitrary numbers as calling convention identifiers. 0024 using ID = unsigned; 0025 0026 /// A set of enums which specify the assigned numeric values for known llvm 0027 /// calling conventions. 0028 /// LLVM Calling Convention Representation 0029 enum { 0030 /// The default llvm calling convention, compatible with C. This convention 0031 /// is the only one that supports varargs calls. As with typical C calling 0032 /// conventions, the callee/caller have to tolerate certain amounts of 0033 /// prototype mismatch. 0034 C = 0, 0035 0036 // Generic LLVM calling conventions. None of these support varargs calls, 0037 // and all assume that the caller and callee prototype exactly match. 0038 0039 /// Attempts to make calls as fast as possible (e.g. by passing things in 0040 /// registers). 0041 Fast = 8, 0042 0043 /// Attempts to make code in the caller as efficient as possible under the 0044 /// assumption that the call is not commonly executed. As such, these calls 0045 /// often preserve all registers so that the call does not break any live 0046 /// ranges in the caller side. 0047 Cold = 9, 0048 0049 /// Used by the Glasgow Haskell Compiler (GHC). 0050 GHC = 10, 0051 0052 /// Used by the High-Performance Erlang Compiler (HiPE). 0053 HiPE = 11, 0054 0055 /// OBSOLETED - Used for stack based JavaScript calls 0056 // WebKit_JS = 12, 0057 0058 /// Used for dynamic register based calls (e.g. stackmap and patchpoint 0059 /// intrinsics). 0060 AnyReg = 13, 0061 0062 /// Used for runtime calls that preserves most registers. 0063 PreserveMost = 14, 0064 0065 /// Used for runtime calls that preserves (almost) all registers. 0066 PreserveAll = 15, 0067 0068 /// Calling convention for Swift. 0069 Swift = 16, 0070 0071 /// Used for access functions. 0072 CXX_FAST_TLS = 17, 0073 0074 /// Attemps to make calls as fast as possible while guaranteeing that tail 0075 /// call optimization can always be performed. 0076 Tail = 18, 0077 0078 /// Special calling convention on Windows for calling the Control Guard 0079 /// Check ICall funtion. The function takes exactly one argument (address of 0080 /// the target function) passed in the first argument register, and has no 0081 /// return value. All register values are preserved. 0082 CFGuard_Check = 19, 0083 0084 /// This follows the Swift calling convention in how arguments are passed 0085 /// but guarantees tail calls will be made by making the callee clean up 0086 /// their stack. 0087 SwiftTail = 20, 0088 0089 /// Used for runtime calls that preserves none general registers. 0090 PreserveNone = 21, 0091 0092 /// This is the start of the target-specific calling conventions, e.g. 0093 /// fastcall and thiscall on X86. 0094 FirstTargetCC = 64, 0095 0096 /// stdcall is mostly used by the Win32 API. It is basically the same as the 0097 /// C convention with the difference in that the callee is responsible for 0098 /// popping the arguments from the stack. 0099 X86_StdCall = 64, 0100 0101 /// 'fast' analog of X86_StdCall. Passes first two arguments in ECX:EDX 0102 /// registers, others - via stack. Callee is responsible for stack cleaning. 0103 X86_FastCall = 65, 0104 0105 /// ARM Procedure Calling Standard (obsolete, but still used on some 0106 /// targets). 0107 ARM_APCS = 66, 0108 0109 /// ARM Architecture Procedure Calling Standard calling convention (aka 0110 /// EABI). Soft float variant. 0111 ARM_AAPCS = 67, 0112 0113 /// Same as ARM_AAPCS, but uses hard floating point ABI. 0114 ARM_AAPCS_VFP = 68, 0115 0116 /// Used for MSP430 interrupt routines. 0117 MSP430_INTR = 69, 0118 0119 /// Similar to X86_StdCall. Passes first argument in ECX, others via stack. 0120 /// Callee is responsible for stack cleaning. MSVC uses this by default for 0121 /// methods in its ABI. 0122 X86_ThisCall = 70, 0123 0124 /// Call to a PTX kernel. Passes all arguments in parameter space. 0125 PTX_Kernel = 71, 0126 0127 /// Call to a PTX device function. Passes all arguments in register or 0128 /// parameter space. 0129 PTX_Device = 72, 0130 0131 /// Used for SPIR non-kernel device functions. No lowering or expansion of 0132 /// arguments. Structures are passed as a pointer to a struct with the 0133 /// byval attribute. Functions can only call SPIR_FUNC and SPIR_KERNEL 0134 /// functions. Functions can only have zero or one return values. Variable 0135 /// arguments are not allowed, except for printf. How arguments/return 0136 /// values are lowered are not specified. Functions are only visible to the 0137 /// devices. 0138 SPIR_FUNC = 75, 0139 0140 /// Used for SPIR kernel functions. Inherits the restrictions of SPIR_FUNC, 0141 /// except it cannot have non-void return values, it cannot have variable 0142 /// arguments, it can also be called by the host or it is externally 0143 /// visible. 0144 SPIR_KERNEL = 76, 0145 0146 /// Used for Intel OpenCL built-ins. 0147 Intel_OCL_BI = 77, 0148 0149 /// The C convention as specified in the x86-64 supplement to the System V 0150 /// ABI, used on most non-Windows systems. 0151 X86_64_SysV = 78, 0152 0153 /// The C convention as implemented on Windows/x86-64 and AArch64. It 0154 /// differs from the more common \c X86_64_SysV convention in a number of 0155 /// ways, most notably in that XMM registers used to pass arguments are 0156 /// shadowed by GPRs, and vice versa. On AArch64, this is identical to the 0157 /// normal C (AAPCS) calling convention for normal functions, but floats are 0158 /// passed in integer registers to variadic functions. 0159 Win64 = 79, 0160 0161 /// MSVC calling convention that passes vectors and vector aggregates in SSE 0162 /// registers. 0163 X86_VectorCall = 80, 0164 0165 /// Placeholders for HHVM calling conventions (deprecated, removed). 0166 DUMMY_HHVM = 81, 0167 DUMMY_HHVM_C = 82, 0168 0169 /// x86 hardware interrupt context. Callee may take one or two parameters, 0170 /// where the 1st represents a pointer to hardware context frame and the 2nd 0171 /// represents hardware error code, the presence of the later depends on the 0172 /// interrupt vector taken. Valid for both 32- and 64-bit subtargets. 0173 X86_INTR = 83, 0174 0175 /// Used for AVR interrupt routines. 0176 AVR_INTR = 84, 0177 0178 /// Used for AVR signal routines. 0179 AVR_SIGNAL = 85, 0180 0181 /// Used for special AVR rtlib functions which have an "optimized" 0182 /// convention to preserve registers. 0183 AVR_BUILTIN = 86, 0184 0185 /// Used for Mesa vertex shaders, or AMDPAL last shader stage before 0186 /// rasterization (vertex shader if tessellation and geometry are not in 0187 /// use, or otherwise copy shader if one is needed). 0188 AMDGPU_VS = 87, 0189 0190 /// Used for Mesa/AMDPAL geometry shaders. 0191 AMDGPU_GS = 88, 0192 0193 /// Used for Mesa/AMDPAL pixel shaders. 0194 AMDGPU_PS = 89, 0195 0196 /// Used for Mesa/AMDPAL compute shaders. 0197 AMDGPU_CS = 90, 0198 0199 /// Used for AMDGPU code object kernels. 0200 AMDGPU_KERNEL = 91, 0201 0202 /// Register calling convention used for parameters transfer optimization 0203 X86_RegCall = 92, 0204 0205 /// Used for Mesa/AMDPAL hull shaders (= tessellation control shaders). 0206 AMDGPU_HS = 93, 0207 0208 /// Used for special MSP430 rtlib functions which have an "optimized" 0209 /// convention using additional registers. 0210 MSP430_BUILTIN = 94, 0211 0212 /// Used for AMDPAL vertex shader if tessellation is in use. 0213 AMDGPU_LS = 95, 0214 0215 /// Used for AMDPAL shader stage before geometry shader if geometry is in 0216 /// use. So either the domain (= tessellation evaluation) shader if 0217 /// tessellation is in use, or otherwise the vertex shader. 0218 AMDGPU_ES = 96, 0219 0220 /// Used between AArch64 Advanced SIMD functions 0221 AArch64_VectorCall = 97, 0222 0223 /// Used between AArch64 SVE functions 0224 AArch64_SVE_VectorCall = 98, 0225 0226 /// For emscripten __invoke_* functions. The first argument is required to 0227 /// be the function ptr being indirectly called. The remainder matches the 0228 /// regular calling convention. 0229 WASM_EmscriptenInvoke = 99, 0230 0231 /// Used for AMD graphics targets. 0232 AMDGPU_Gfx = 100, 0233 0234 /// Used for M68k interrupt routines. 0235 M68k_INTR = 101, 0236 0237 /// Preserve X0-X13, X19-X29, SP, Z0-Z31, P0-P15. 0238 AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0 = 102, 0239 0240 /// Preserve X2-X15, X19-X29, SP, Z0-Z31, P0-P15. 0241 AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2 = 103, 0242 0243 /// Used on AMDGPUs to give the middle-end more control over argument 0244 /// placement. 0245 AMDGPU_CS_Chain = 104, 0246 0247 /// Used on AMDGPUs to give the middle-end more control over argument 0248 /// placement. Preserves active lane values for input VGPRs. 0249 AMDGPU_CS_ChainPreserve = 105, 0250 0251 /// Used for M68k rtd-based CC (similar to X86's stdcall). 0252 M68k_RTD = 106, 0253 0254 /// Used by GraalVM. Two additional registers are reserved. 0255 GRAAL = 107, 0256 0257 /// Calling convention used in the ARM64EC ABI to implement calls between 0258 /// x64 code and thunks. This is basically the x64 calling convention using 0259 /// ARM64 register names. The first parameter is mapped to x9. 0260 ARM64EC_Thunk_X64 = 108, 0261 0262 /// Calling convention used in the ARM64EC ABI to implement calls between 0263 /// ARM64 code and thunks. This is just the ARM64 calling convention, 0264 /// except that the first parameter is mapped to x9. 0265 ARM64EC_Thunk_Native = 109, 0266 0267 /// Calling convention used for RISC-V V-extension. 0268 RISCV_VectorCall = 110, 0269 0270 /// Preserve X1-X15, X19-X29, SP, Z0-Z31, P0-P15. 0271 AArch64_SME_ABI_Support_Routines_PreserveMost_From_X1 = 111, 0272 0273 /// The highest possible ID. Must be some 2^k - 1. 0274 MaxID = 1023 0275 }; 0276 0277 } // end namespace CallingConv 0278 0279 } // end namespace llvm 0280 0281 #endif // LLVM_IR_CALLINGCONV_H
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