llvm/TargetParser/TargetParser.h

0001 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 //
0009 // This file implements a target parser to recognise hardware features such as
0010 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
0011 //
0012 //===----------------------------------------------------------------------===//
0013
0014 #ifndef LLVM_TARGETPARSER_TARGETPARSER_H
0015 #define LLVM_TARGETPARSER_TARGETPARSER_H
0016
0017 #include "llvm/ADT/StringMap.h"
0018 #include "llvm/ADT/StringRef.h"
0019
0020 namespace llvm {
0021
0022 template <typename T> class SmallVectorImpl;
0023 class Triple;
0024
0025 // Target specific information in their own namespaces.
0026 // (ARM/AArch64/X86 are declared in ARM/AArch64/X86TargetParser.h)
0027 // These should be generated from TableGen because the information is already
0028 // there, and there is where new information about targets will be added.
0029 // FIXME: To TableGen this we need to make some table generated files available
0030 // even if the back-end is not compiled with LLVM, plus we need to create a new
0031 // back-end to TableGen to create these clean tables.
0032 namespace AMDGPU {
0033
0034 /// GPU kinds supported by the AMDGPU target.
0035 enum GPUKind : uint32_t {
0036   // Not specified processor.
0037   GK_NONE = 0,
0038
0039   // R600-based processors.
0040   GK_R600 = 1,
0041   GK_R630 = 2,
0042   GK_RS880 = 3,
0043   GK_RV670 = 4,
0044   GK_RV710 = 5,
0045   GK_RV730 = 6,
0046   GK_RV770 = 7,
0047   GK_CEDAR = 8,
0048   GK_CYPRESS = 9,
0049   GK_JUNIPER = 10,
0050   GK_REDWOOD = 11,
0051   GK_SUMO = 12,
0052   GK_BARTS = 13,
0053   GK_CAICOS = 14,
0054   GK_CAYMAN = 15,
0055   GK_TURKS = 16,
0056
0057   GK_R600_FIRST = GK_R600,
0058   GK_R600_LAST = GK_TURKS,
0059
0060   // AMDGCN-based processors.
0061   GK_GFX600 = 32,
0062   GK_GFX601 = 33,
0063   GK_GFX602 = 34,
0064
0065   GK_GFX700 = 40,
0066   GK_GFX701 = 41,
0067   GK_GFX702 = 42,
0068   GK_GFX703 = 43,
0069   GK_GFX704 = 44,
0070   GK_GFX705 = 45,
0071
0072   GK_GFX801 = 50,
0073   GK_GFX802 = 51,
0074   GK_GFX803 = 52,
0075   GK_GFX805 = 53,
0076   GK_GFX810 = 54,
0077
0078   GK_GFX900 = 60,
0079   GK_GFX902 = 61,
0080   GK_GFX904 = 62,
0081   GK_GFX906 = 63,
0082   GK_GFX908 = 64,
0083   GK_GFX909 = 65,
0084   GK_GFX90A = 66,
0085   GK_GFX90C = 67,
0086   GK_GFX940 = 68,
0087   GK_GFX941 = 69,
0088   GK_GFX942 = 70,
0089   GK_GFX950 = 71,
0090
0091   GK_GFX1010 = 72,
0092   GK_GFX1011 = 73,
0093   GK_GFX1012 = 74,
0094   GK_GFX1013 = 75,
0095   GK_GFX1030 = 76,
0096   GK_GFX1031 = 77,
0097   GK_GFX1032 = 78,
0098   GK_GFX1033 = 79,
0099   GK_GFX1034 = 80,
0100   GK_GFX1035 = 81,
0101   GK_GFX1036 = 82,
0102
0103   GK_GFX1100 = 90,
0104   GK_GFX1101 = 91,
0105   GK_GFX1102 = 92,
0106   GK_GFX1103 = 93,
0107   GK_GFX1150 = 94,
0108   GK_GFX1151 = 95,
0109   GK_GFX1152 = 96,
0110   GK_GFX1153 = 97,
0111
0112   GK_GFX1200 = 100,
0113   GK_GFX1201 = 101,
0114
0115   GK_AMDGCN_FIRST = GK_GFX600,
0116   GK_AMDGCN_LAST = GK_GFX1201,
0117
0118   GK_GFX9_GENERIC = 192,
0119   GK_GFX10_1_GENERIC = 193,
0120   GK_GFX10_3_GENERIC = 194,
0121   GK_GFX11_GENERIC = 195,
0122   GK_GFX12_GENERIC = 196,
0123   GK_GFX9_4_GENERIC = 197,
0124
0125   GK_AMDGCN_GENERIC_FIRST = GK_GFX9_GENERIC,
0126   GK_AMDGCN_GENERIC_LAST = GK_GFX9_4_GENERIC,
0127 };
0128
0129 /// Instruction set architecture version.
0130 struct IsaVersion {
0131   unsigned Major;
0132   unsigned Minor;
0133   unsigned Stepping;
0134 };
0135
0136 // This isn't comprehensive for now, just things that are needed from the
0137 // frontend driver.
0138 enum ArchFeatureKind : uint32_t {
0139   FEATURE_NONE = 0,
0140
0141   // These features only exist for r600, and are implied true for amdgcn.
0142   FEATURE_FMA = 1 << 1,
0143   FEATURE_LDEXP = 1 << 2,
0144   FEATURE_FP64 = 1 << 3,
0145
0146   // Common features.
0147   FEATURE_FAST_FMA_F32 = 1 << 4,
0148   FEATURE_FAST_DENORMAL_F32 = 1 << 5,
0149
0150   // Wavefront 32 is available.
0151   FEATURE_WAVE32 = 1 << 6,
0152
0153   // Xnack is available.
0154   FEATURE_XNACK = 1 << 7,
0155
0156   // Sram-ecc is available.
0157   FEATURE_SRAMECC = 1 << 8,
0158
0159   // WGP mode is supported.
0160   FEATURE_WGP = 1 << 9,
0161 };
0162
0163 enum FeatureError : uint32_t {
0164   NO_ERROR = 0,
0165   INVALID_FEATURE_COMBINATION,
0166   UNSUPPORTED_TARGET_FEATURE
0167 };
0168
0169 StringRef getArchFamilyNameAMDGCN(GPUKind AK);
0170
0171 StringRef getArchNameAMDGCN(GPUKind AK);
0172 StringRef getArchNameR600(GPUKind AK);
0173 StringRef getCanonicalArchName(const Triple &T, StringRef Arch);
0174 GPUKind parseArchAMDGCN(StringRef CPU);
0175 GPUKind parseArchR600(StringRef CPU);
0176 unsigned getArchAttrAMDGCN(GPUKind AK);
0177 unsigned getArchAttrR600(GPUKind AK);
0178
0179 void fillValidArchListAMDGCN(SmallVectorImpl<StringRef> &Values);
0180 void fillValidArchListR600(SmallVectorImpl<StringRef> &Values);
0181
0182 IsaVersion getIsaVersion(StringRef GPU);
0183
0184 /// Fills Features map with default values for given target GPU
0185 void fillAMDGPUFeatureMap(StringRef GPU, const Triple &T,
0186                           StringMap<bool> &Features);
0187
0188 /// Inserts wave size feature for given GPU into features map
0189 std::pair<FeatureError, StringRef>
0190 insertWaveSizeFeature(StringRef GPU, const Triple &T,
0191                       StringMap<bool> &Features);
0192
0193 } // namespace AMDGPU
0194 } // namespace llvm
0195
0196 #endif