llvm/TargetParser/LoongArchTargetParser.h

0001 //==-- LoongArch64TargetParser - Parser for LoongArch64 features --*- C++ -*-=//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 //
0009 // This file implements a target parser to recognise LoongArch hardware features
0010 // such as CPU/ARCH and extension names.
0011 //
0012 //===----------------------------------------------------------------------===//
0013
0014 #ifndef LLVM_TARGETPARSER_LOONGARCHTARGETPARSER_H
0015 #define LLVM_TARGETPARSER_LOONGARCHTARGETPARSER_H
0016
0017 #include "llvm/TargetParser/Triple.h"
0018 #include <vector>
0019
0020 namespace llvm {
0021 class StringRef;
0022
0023 namespace LoongArch {
0024
0025 enum FeatureKind : uint32_t {
0026   // 64-bit ISA is available.
0027   FK_64BIT = 1 << 1,
0028
0029   // Single-precision floating-point instructions are available.
0030   FK_FP32 = 1 << 2,
0031
0032   // Double-precision floating-point instructions are available.
0033   FK_FP64 = 1 << 3,
0034
0035   // Loongson SIMD Extension is available.
0036   FK_LSX = 1 << 4,
0037
0038   // Loongson Advanced SIMD Extension is available.
0039   FK_LASX = 1 << 5,
0040
0041   // Loongson Binary Translation Extension is available.
0042   FK_LBT = 1 << 6,
0043
0044   // Loongson Virtualization Extension is available.
0045   FK_LVZ = 1 << 7,
0046
0047   // Allow memory accesses to be unaligned.
0048   FK_UAL = 1 << 8,
0049
0050   // Floating-point approximate reciprocal instructions are available.
0051   FK_FRECIPE = 1 << 9,
0052
0053   // Atomic memory swap and add instructions for byte and half word are
0054   // available.
0055   FK_LAM_BH = 1 << 10,
0056
0057   // Atomic memory compare and swap instructions for byte, half word, word and
0058   // double word are available.
0059   FK_LAMCAS = 1 << 11,
0060
0061   // Do not generate load-load barrier instructions (dbar 0x700).
0062   FK_LD_SEQ_SA = 1 << 12,
0063
0064   // Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended.
0065   FK_DIV32 = 1 << 13,
0066
0067   // sc.q is available.
0068   FK_SCQ = 1 << 14,
0069 };
0070
0071 struct FeatureInfo {
0072   StringRef Name;
0073   FeatureKind Kind;
0074 };
0075
0076 enum class ArchKind {
0077 #define LOONGARCH_ARCH(NAME, KIND, FEATURES) KIND,
0078 #include "LoongArchTargetParser.def"
0079 };
0080
0081 struct ArchInfo {
0082   StringRef Name;
0083   ArchKind Kind;
0084   uint32_t Features;
0085 };
0086
0087 bool isValidArchName(StringRef Arch);
0088 bool getArchFeatures(StringRef Arch, std::vector<StringRef> &Features);
0089 bool isValidCPUName(StringRef TuneCPU);
0090 void fillValidCPUList(SmallVectorImpl<StringRef> &Values);
0091 StringRef getDefaultArch(bool Is64Bit);
0092
0093 } // namespace LoongArch
0094
0095 } // namespace llvm
0096
0097 #endif // LLVM_TARGETPARSER_LOONGARCHTARGETPARSER_H