llvm/TableGen/AArch64ImmCheck.h

0001 //===----- AArch64ImmCheck.h -- ARM immediate range check -----*- C++ -*---===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 /// \file
0009 /// This file implements the ImmCheck class which supports the range-checking of
0010 /// immediate values supplied to AArch64 SVE/SME and NEON intrinsics.
0011 ///
0012 //===----------------------------------------------------------------------===//
0013
0014 #ifndef AARCH64_IMMCHECK_H
0015 #define AARCH64_IMMCHECK_H
0016
0017 class ImmCheck {
0018   int ImmArgIdx;
0019   unsigned Kind;
0020   unsigned ElementSizeInBits;
0021   unsigned VecSizeInBits;
0022
0023 public:
0024   ImmCheck(int ImmArgIdx, unsigned Kind, unsigned ElementSizeInBits = 0,
0025            unsigned VecSizeInBits = 128)
0026       : ImmArgIdx(ImmArgIdx), Kind(Kind), ElementSizeInBits(ElementSizeInBits),
0027         VecSizeInBits(VecSizeInBits) {}
0028   ImmCheck(const ImmCheck &Other) = default;
0029   ~ImmCheck() = default;
0030
0031   int getImmArgIdx() const { return ImmArgIdx; }
0032   unsigned getKind() const { return Kind; }
0033   unsigned getElementSizeInBits() const { return ElementSizeInBits; }
0034   unsigned getVecSizeInBits() const { return VecSizeInBits; }
0035 };
0036
0037 #endif