llvm/Support/X86DisassemblerDecoderCommon.h

0001 //===-- X86DisassemblerDecoderCommon.h - Disassembler decoder ---*- C++ -*-===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 //
0009 // This file is part of the X86 Disassembler.
0010 // It contains common definitions used by both the disassembler and the table
0011 //  generator.
0012 // Documentation for the disassembler can be found in X86Disassembler.h.
0013 //
0014 //===----------------------------------------------------------------------===//
0015
0016 #ifndef LLVM_SUPPORT_X86DISASSEMBLERDECODERCOMMON_H
0017 #define LLVM_SUPPORT_X86DISASSEMBLERDECODERCOMMON_H
0018
0019 #include "llvm/Support/DataTypes.h"
0020
0021 namespace llvm {
0022 namespace X86Disassembler {
0023
0024 #define INSTRUCTIONS_SYM x86DisassemblerInstrSpecifiers
0025 #define CONTEXTS_SYM x86DisassemblerContexts
0026 #define ONEBYTE_SYM x86DisassemblerOneByteOpcodes
0027 #define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes
0028 #define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes
0029 #define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes
0030 #define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes
0031 #define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes
0032 #define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes
0033 #define THREEDNOW_MAP_SYM x86Disassembler3DNowOpcodes
0034 #define MAP4_SYM x86DisassemblerMap4Opcodes
0035 #define MAP5_SYM x86DisassemblerMap5Opcodes
0036 #define MAP6_SYM x86DisassemblerMap6Opcodes
0037 #define MAP7_SYM x86DisassemblerMap7Opcodes
0038
0039 #define INSTRUCTIONS_STR "x86DisassemblerInstrSpecifiers"
0040 #define CONTEXTS_STR "x86DisassemblerContexts"
0041 #define ONEBYTE_STR "x86DisassemblerOneByteOpcodes"
0042 #define TWOBYTE_STR "x86DisassemblerTwoByteOpcodes"
0043 #define THREEBYTE38_STR "x86DisassemblerThreeByte38Opcodes"
0044 #define THREEBYTE3A_STR "x86DisassemblerThreeByte3AOpcodes"
0045 #define XOP8_MAP_STR "x86DisassemblerXOP8Opcodes"
0046 #define XOP9_MAP_STR "x86DisassemblerXOP9Opcodes"
0047 #define XOPA_MAP_STR "x86DisassemblerXOPAOpcodes"
0048 #define THREEDNOW_MAP_STR "x86Disassembler3DNowOpcodes"
0049 #define MAP4_STR "x86DisassemblerMap4Opcodes"
0050 #define MAP5_STR "x86DisassemblerMap5Opcodes"
0051 #define MAP6_STR "x86DisassemblerMap6Opcodes"
0052 #define MAP7_STR "x86DisassemblerMap7Opcodes"
0053
0054 // Attributes of an instruction that must be known before the opcode can be
0055 // processed correctly.  Most of these indicate the presence of particular
0056 // prefixes, but ATTR_64BIT is simply an attribute of the decoding context.
0057 enum attributeBits {
0058   ATTR_NONE = 0x00,
0059   ATTR_64BIT = 0x1 << 0,
0060   ATTR_XS = 0x1 << 1,
0061   ATTR_XD = 0x1 << 2,
0062   ATTR_REXW = 0x1 << 3,
0063   ATTR_OPSIZE = 0x1 << 4,
0064   ATTR_ADSIZE = 0x1 << 5,
0065   ATTR_VEX = 0x1 << 6,
0066   ATTR_VEXL = 0x1 << 7,
0067   ATTR_EVEX = 0x1 << 8,
0068   ATTR_EVEXL2 = 0x1 << 9,
0069   ATTR_EVEXK = 0x1 << 10,
0070   ATTR_EVEXKZ = 0x1 << 11,
0071   ATTR_EVEXB = 0x1 << 12,
0072   ATTR_REX2 = 0x1 << 13,
0073   ATTR_EVEXNF = 0x1 << 14,
0074   ATTR_EVEXU = 0x1 << 15,
0075   ATTR_max = 0x1 << 16,
0076 };
0077
0078 // Combinations of the above attributes that are relevant to instruction
0079 // decode. Although other combinations are possible, they can be reduced to
0080 // these without affecting the ultimately decoded instruction.
0081
0082 //           Class name           Rank  Rationale for rank assignment
0083 #define INSTRUCTION_CONTEXTS                                                   \
0084   ENUM_ENTRY(IC, 0, "says nothing about the instruction")                      \
0085   ENUM_ENTRY(IC_64BIT, 1,                                                      \
0086              "says the instruction applies in 64-bit mode but no more")        \
0087   ENUM_ENTRY(IC_OPSIZE, 3,                                                     \
0088              "requires an OPSIZE prefix, so operands change width")            \
0089   ENUM_ENTRY(IC_ADSIZE, 3,                                                     \
0090              "requires an ADSIZE prefix, so operands change width")            \
0091   ENUM_ENTRY(IC_OPSIZE_ADSIZE, 4, "requires ADSIZE and OPSIZE prefixes")       \
0092   ENUM_ENTRY(IC_XD, 2,                                                         \
0093              "may say something about the opcode but not the operands")        \
0094   ENUM_ENTRY(IC_XS, 2,                                                         \
0095              "may say something about the opcode but not the operands")        \
0096   ENUM_ENTRY(IC_XD_OPSIZE, 3,                                                  \
0097              "requires an OPSIZE prefix, so operands change width")            \
0098   ENUM_ENTRY(IC_XS_OPSIZE, 3,                                                  \
0099              "requires an OPSIZE prefix, so operands change width")            \
0100   ENUM_ENTRY(IC_XD_ADSIZE, 3,                                                  \
0101              "requires an ADSIZE prefix, so operands change width")            \
0102   ENUM_ENTRY(IC_XS_ADSIZE, 3,                                                  \
0103              "requires an ADSIZE prefix, so operands change width")            \
0104   ENUM_ENTRY(IC_64BIT_REXW, 5,                                                 \
0105              "requires a REX.W prefix, so operands change width; overrides "   \
0106              "IC_OPSIZE")                                                      \
0107   ENUM_ENTRY(IC_64BIT_REXW_ADSIZE, 6,                                          \
0108              "requires a REX.W prefix and 0x67 prefix")                        \
0109   ENUM_ENTRY(IC_64BIT_OPSIZE, 3, "Just as meaningful as IC_OPSIZE")            \
0110   ENUM_ENTRY(IC_64BIT_ADSIZE, 3, "Just as meaningful as IC_ADSIZE")            \
0111   ENUM_ENTRY(IC_64BIT_OPSIZE_ADSIZE, 4,                                        \
0112              "Just as meaningful as IC_OPSIZE/IC_ADSIZE")                      \
0113   ENUM_ENTRY(IC_64BIT_XD, 6, "XD instructions are SSE; REX.W is secondary")    \
0114   ENUM_ENTRY(IC_64BIT_XS, 6, "Just as meaningful as IC_64BIT_XD")              \
0115   ENUM_ENTRY(IC_64BIT_XD_OPSIZE, 3, "Just as meaningful as IC_XD_OPSIZE")      \
0116   ENUM_ENTRY(IC_64BIT_XS_OPSIZE, 3, "Just as meaningful as IC_XS_OPSIZE")      \
0117   ENUM_ENTRY(IC_64BIT_XD_ADSIZE, 3, "Just as meaningful as IC_XD_ADSIZE")      \
0118   ENUM_ENTRY(IC_64BIT_XS_ADSIZE, 3, "Just as meaningful as IC_XS_ADSIZE")      \
0119   ENUM_ENTRY(IC_64BIT_REXW_XS, 7, "OPSIZE could mean a different opcode")      \
0120   ENUM_ENTRY(IC_64BIT_REXW_XD, 7, "Just as meaningful as IC_64BIT_REXW_XS")    \
0121   ENUM_ENTRY(IC_64BIT_REXW_OPSIZE, 8,                                          \
0122              "The Dynamic Duo!  Prefer over all else because this changes "    \
0123              "most operands' meaning")                                         \
0124   ENUM_ENTRY(IC_64BIT_REX2, 2, "requires a REX2 prefix")                       \
0125   ENUM_ENTRY(IC_VEX, 1, "requires a VEX prefix")                               \
0126   ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix")                   \
0127   ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix")                   \
0128   ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix")           \
0129   ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix")                     \
0130   ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix")                 \
0131   ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix")                 \
0132   ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize")                \
0133   ENUM_ENTRY(IC_VEX_L, 3, "requires VEX and the L prefix")                     \
0134   ENUM_ENTRY(IC_VEX_L_XS, 4, "requires VEX and the L and XS prefix")           \
0135   ENUM_ENTRY(IC_VEX_L_XD, 4, "requires VEX and the L and XD prefix")           \
0136   ENUM_ENTRY(IC_VEX_L_OPSIZE, 4, "requires VEX, L, and OpSize")                \
0137   ENUM_ENTRY(IC_VEX_L_W, 4, "requires VEX, L and W")                           \
0138   ENUM_ENTRY(IC_VEX_L_W_XS, 5, "requires VEX, L, W and XS prefix")             \
0139   ENUM_ENTRY(IC_VEX_L_W_XD, 5, "requires VEX, L, W and XD prefix")             \
0140   ENUM_ENTRY(IC_VEX_L_W_OPSIZE, 5, "requires VEX, L, W and OpSize")            \
0141   ENUM_ENTRY(IC_EVEX, 1, "requires an EVEX prefix")                            \
0142   ENUM_ENTRY(IC_EVEX_NF, 2, "requires EVEX and NF prefix")                     \
0143   ENUM_ENTRY(IC_EVEX_XS, 2, "requires EVEX and the XS prefix")                 \
0144   ENUM_ENTRY(IC_EVEX_XS_ADSIZE, 3, "requires EVEX, XS and the ADSIZE prefix")  \
0145   ENUM_ENTRY(IC_EVEX_XD, 2, "requires EVEX and the XD prefix")                 \
0146   ENUM_ENTRY(IC_EVEX_XD_ADSIZE, 3, "requires EVEX, XD and the ADSIZE prefix")  \
0147   ENUM_ENTRY(IC_EVEX_OPSIZE, 2, "requires EVEX and the OpSize prefix")         \
0148   ENUM_ENTRY(IC_EVEX_OPSIZE_NF, 3, "requires EVEX, NF and the OpSize prefix")  \
0149   ENUM_ENTRY(IC_EVEX_OPSIZE_ADSIZE, 3,                                         \
0150              "requires EVEX, OPSIZE and the ADSIZE prefix")                    \
0151   ENUM_ENTRY(IC_EVEX_W, 3, "requires EVEX and the W prefix")                   \
0152   ENUM_ENTRY(IC_EVEX_W_NF, 4, "requires EVEX, W and NF prefix")                \
0153   ENUM_ENTRY(IC_EVEX_W_XS, 4, "requires EVEX, W, and XS prefix")               \
0154   ENUM_ENTRY(IC_EVEX_W_XD, 4, "requires EVEX, W, and XD prefix")               \
0155   ENUM_ENTRY(IC_EVEX_W_OPSIZE, 4, "requires EVEX, W, and OpSize")              \
0156   ENUM_ENTRY(IC_EVEX_L, 3, "requires EVEX and the L prefix")                   \
0157   ENUM_ENTRY(IC_EVEX_L_XS, 4, "requires EVEX and the L and XS prefix")         \
0158   ENUM_ENTRY(IC_EVEX_L_XD, 4, "requires EVEX and the L and XD prefix")         \
0159   ENUM_ENTRY(IC_EVEX_L_OPSIZE, 4, "requires EVEX, L, and OpSize")              \
0160   ENUM_ENTRY(IC_EVEX_L_W, 3, "requires EVEX, L and W")                         \
0161   ENUM_ENTRY(IC_EVEX_L_W_XS, 4, "requires EVEX, L, W and XS prefix")           \
0162   ENUM_ENTRY(IC_EVEX_L_W_XD, 4, "requires EVEX, L, W and XD prefix")           \
0163   ENUM_ENTRY(IC_EVEX_L_W_OPSIZE, 4, "requires EVEX, L, W and OpSize")          \
0164   ENUM_ENTRY(IC_EVEX_L2, 3, "requires EVEX and the L2 prefix")                 \
0165   ENUM_ENTRY(IC_EVEX_L2_XS, 4, "requires EVEX and the L2 and XS prefix")       \
0166   ENUM_ENTRY(IC_EVEX_L2_XD, 4, "requires EVEX and the L2 and XD prefix")       \
0167   ENUM_ENTRY(IC_EVEX_L2_OPSIZE, 4, "requires EVEX, L2, and OpSize")            \
0168   ENUM_ENTRY(IC_EVEX_L2_W, 3, "requires EVEX, L2 and W")                       \
0169   ENUM_ENTRY(IC_EVEX_L2_W_XS, 4, "requires EVEX, L2, W and XS prefix")         \
0170   ENUM_ENTRY(IC_EVEX_L2_W_XD, 4, "requires EVEX, L2, W and XD prefix")         \
0171   ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE, 4, "requires EVEX, L2, W and OpSize")        \
0172   ENUM_ENTRY(IC_EVEX_K, 1, "requires an EVEX_K prefix")                        \
0173   ENUM_ENTRY(IC_EVEX_XS_K, 2, "requires EVEX_K and the XS prefix")             \
0174   ENUM_ENTRY(IC_EVEX_XD_K, 2, "requires EVEX_K and the XD prefix")             \
0175   ENUM_ENTRY(IC_EVEX_OPSIZE_K, 2, "requires EVEX_K and the OpSize prefix")     \
0176   ENUM_ENTRY(IC_EVEX_W_K, 3, "requires EVEX_K and the W prefix")               \
0177   ENUM_ENTRY(IC_EVEX_W_XS_K, 4, "requires EVEX_K, W, and XS prefix")           \
0178   ENUM_ENTRY(IC_EVEX_W_XD_K, 4, "requires EVEX_K, W, and XD prefix")           \
0179   ENUM_ENTRY(IC_EVEX_W_OPSIZE_K, 4, "requires EVEX_K, W, and OpSize")          \
0180   ENUM_ENTRY(IC_EVEX_L_K, 3, "requires EVEX_K and the L prefix")               \
0181   ENUM_ENTRY(IC_EVEX_L_XS_K, 4, "requires EVEX_K and the L and XS prefix")     \
0182   ENUM_ENTRY(IC_EVEX_L_XD_K, 4, "requires EVEX_K and the L and XD prefix")     \
0183   ENUM_ENTRY(IC_EVEX_L_OPSIZE_K, 4, "requires EVEX_K, L, and OpSize")          \
0184   ENUM_ENTRY(IC_EVEX_L_W_K, 3, "requires EVEX_K, L and W")                     \
0185   ENUM_ENTRY(IC_EVEX_L_W_XS_K, 4, "requires EVEX_K, L, W and XS prefix")       \
0186   ENUM_ENTRY(IC_EVEX_L_W_XD_K, 4, "requires EVEX_K, L, W and XD prefix")       \
0187   ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K, 4, "requires EVEX_K, L, W and OpSize")      \
0188   ENUM_ENTRY(IC_EVEX_L2_K, 3, "requires EVEX_K and the L2 prefix")             \
0189   ENUM_ENTRY(IC_EVEX_L2_XS_K, 4, "requires EVEX_K and the L2 and XS prefix")   \
0190   ENUM_ENTRY(IC_EVEX_L2_XD_K, 4, "requires EVEX_K and the L2 and XD prefix")   \
0191   ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K, 4, "requires EVEX_K, L2, and OpSize")        \
0192   ENUM_ENTRY(IC_EVEX_L2_W_K, 3, "requires EVEX_K, L2 and W")                   \
0193   ENUM_ENTRY(IC_EVEX_L2_W_XS_K, 4, "requires EVEX_K, L2, W and XS prefix")     \
0194   ENUM_ENTRY(IC_EVEX_L2_W_XD_K, 4, "requires EVEX_K, L2, W and XD prefix")     \
0195   ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4, "requires EVEX_K, L2, W and OpSize")    \
0196   ENUM_ENTRY(IC_EVEX_B, 1, "requires an EVEX_B prefix")                        \
0197   ENUM_ENTRY(IC_EVEX_B_NF, 2, "requires EVEX_NF and EVEX_B prefix")            \
0198   ENUM_ENTRY(IC_EVEX_XS_B, 2, "requires EVEX_B and the XS prefix")             \
0199   ENUM_ENTRY(IC_EVEX_XD_B, 2, "requires EVEX_B and the XD prefix")             \
0200   ENUM_ENTRY(IC_EVEX_OPSIZE_B, 2, "requires EVEX_B and the OpSize prefix")     \
0201   ENUM_ENTRY(IC_EVEX_OPSIZE_B_NF, 3, "requires EVEX_B, NF and Opsize prefix")  \
0202   ENUM_ENTRY(IC_EVEX_W_B, 3, "requires EVEX_B and the W prefix")               \
0203   ENUM_ENTRY(IC_EVEX_W_B_NF, 4, "requires EVEX_NF, EVEX_B and the W prefix")   \
0204   ENUM_ENTRY(IC_EVEX_W_XS_B, 4, "requires EVEX_B, W, and XS prefix")           \
0205   ENUM_ENTRY(IC_EVEX_W_XD_B, 4, "requires EVEX_B, W, and XD prefix")           \
0206   ENUM_ENTRY(IC_EVEX_W_OPSIZE_B, 4, "requires EVEX_B, W, and OpSize")          \
0207   ENUM_ENTRY(IC_EVEX_L_B, 3, "requires EVEX_B and the L prefix")               \
0208   ENUM_ENTRY(IC_EVEX_L_XS_B, 4, "requires EVEX_B and the L and XS prefix")     \
0209   ENUM_ENTRY(IC_EVEX_L_XD_B, 4, "requires EVEX_B and the L and XD prefix")     \
0210   ENUM_ENTRY(IC_EVEX_L_OPSIZE_B, 4, "requires EVEX_B, L, and OpSize")          \
0211   ENUM_ENTRY(IC_EVEX_L_W_B, 3, "requires EVEX_B, L and W")                     \
0212   ENUM_ENTRY(IC_EVEX_L_W_XS_B, 4, "requires EVEX_B, L, W and XS prefix")       \
0213   ENUM_ENTRY(IC_EVEX_L_W_XD_B, 4, "requires EVEX_B, L, W and XD prefix")       \
0214   ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_B, 4, "requires EVEX_B, L, W and OpSize")      \
0215   ENUM_ENTRY(IC_EVEX_L2_B, 3, "requires EVEX_B and the L2 prefix")             \
0216   ENUM_ENTRY(IC_EVEX_L2_XS_B, 4, "requires EVEX_B and the L2 and XS prefix")   \
0217   ENUM_ENTRY(IC_EVEX_L2_XD_B, 4, "requires EVEX_B and the L2 and XD prefix")   \
0218   ENUM_ENTRY(IC_EVEX_L2_OPSIZE_B, 4, "requires EVEX_B, L2, and OpSize")        \
0219   ENUM_ENTRY(IC_EVEX_L2_W_B, 3, "requires EVEX_B, L2 and W")                   \
0220   ENUM_ENTRY(IC_EVEX_L2_W_XS_B, 4, "requires EVEX_B, L2, W and XS prefix")     \
0221   ENUM_ENTRY(IC_EVEX_L2_W_XD_B, 4, "requires EVEX_B, L2, W and XD prefix")     \
0222   ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_B, 4, "requires EVEX_B, L2, W and OpSize")    \
0223   ENUM_ENTRY(IC_EVEX_K_B, 1, "requires EVEX_B and EVEX_K prefix")              \
0224   ENUM_ENTRY(IC_EVEX_XS_K_B, 2, "requires EVEX_B, EVEX_K and the XS prefix")   \
0225   ENUM_ENTRY(IC_EVEX_XD_K_B, 2, "requires EVEX_B, EVEX_K and the XD prefix")   \
0226   ENUM_ENTRY(IC_EVEX_OPSIZE_K_B, 2,                                            \
0227              "requires EVEX_B, EVEX_K and the OpSize prefix")                  \
0228   ENUM_ENTRY(IC_EVEX_W_K_B, 3, "requires EVEX_B, EVEX_K and the W prefix")     \
0229   ENUM_ENTRY(IC_EVEX_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, W, and XS prefix") \
0230   ENUM_ENTRY(IC_EVEX_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, W, and XD prefix") \
0231   ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B, 4,                                          \
0232              "requires EVEX_B, EVEX_K, W, and OpSize")                         \
0233   ENUM_ENTRY(IC_EVEX_L_K_B, 3, "requires EVEX_B, EVEX_K and the L prefix")     \
0234   ENUM_ENTRY(IC_EVEX_L_XS_K_B, 4,                                              \
0235              "requires EVEX_B, EVEX_K and the L and XS prefix")                \
0236   ENUM_ENTRY(IC_EVEX_L_XD_K_B, 4,                                              \
0237              "requires EVEX_B, EVEX_K and the L and XD prefix")                \
0238   ENUM_ENTRY(IC_EVEX_L_OPSIZE_K_B, 4,                                          \
0239              "requires EVEX_B, EVEX_K, L, and OpSize")                         \
0240   ENUM_ENTRY(IC_EVEX_L_W_K_B, 3, "requires EVEX_B, EVEX_K, L and W")           \
0241   ENUM_ENTRY(IC_EVEX_L_W_XS_K_B, 4,                                            \
0242              "requires EVEX_B, EVEX_K, L, W and XS prefix")                    \
0243   ENUM_ENTRY(IC_EVEX_L_W_XD_K_B, 4,                                            \
0244              "requires EVEX_B, EVEX_K, L, W and XD prefix")                    \
0245   ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K_B, 4,                                        \
0246              "requires EVEX_B, EVEX_K, L, W and OpSize")                       \
0247   ENUM_ENTRY(IC_EVEX_L2_K_B, 3, "requires EVEX_B, EVEX_K and the L2 prefix")   \
0248   ENUM_ENTRY(IC_EVEX_L2_XS_K_B, 4,                                             \
0249              "requires EVEX_B, EVEX_K and the L2 and XS prefix")               \
0250   ENUM_ENTRY(IC_EVEX_L2_XD_K_B, 4,                                             \
0251              "requires EVEX_B, EVEX_K and the L2 and XD prefix")               \
0252   ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K_B, 4,                                         \
0253              "requires EVEX_B, EVEX_K, L2, and OpSize")                        \
0254   ENUM_ENTRY(IC_EVEX_L2_W_K_B, 3, "requires EVEX_B, EVEX_K, L2 and W")         \
0255   ENUM_ENTRY(IC_EVEX_L2_W_XS_K_B, 4,                                           \
0256              "requires EVEX_B, EVEX_K, L2, W and XS prefix")                   \
0257   ENUM_ENTRY(IC_EVEX_L2_W_XD_K_B, 4,                                           \
0258              "requires EVEX_B, EVEX_K, L2, W and XD prefix")                   \
0259   ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K_B, 4,                                       \
0260              "requires EVEX_B, EVEX_K, L2, W and OpSize")                      \
0261   ENUM_ENTRY(IC_EVEX_KZ_B, 1, "requires EVEX_B and EVEX_KZ prefix")            \
0262   ENUM_ENTRY(IC_EVEX_XS_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XS prefix") \
0263   ENUM_ENTRY(IC_EVEX_XD_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XD prefix") \
0264   ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B, 2,                                           \
0265              "requires EVEX_B, EVEX_KZ and the OpSize prefix")                 \
0266   ENUM_ENTRY(IC_EVEX_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the W prefix")   \
0267   ENUM_ENTRY(IC_EVEX_W_XS_KZ_B, 4,                                             \
0268              "requires EVEX_B, EVEX_KZ, W, and XS prefix")                     \
0269   ENUM_ENTRY(IC_EVEX_W_XD_KZ_B, 4,                                             \
0270              "requires EVEX_B, EVEX_KZ, W, and XD prefix")                     \
0271   ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B, 4,                                         \
0272              "requires EVEX_B, EVEX_KZ, W, and OpSize")                        \
0273   ENUM_ENTRY(IC_EVEX_L_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L prefix")   \
0274   ENUM_ENTRY(IC_EVEX_L_XS_KZ_B, 4,                                             \
0275              "requires EVEX_B, EVEX_KZ and the L and XS prefix")               \
0276   ENUM_ENTRY(IC_EVEX_L_XD_KZ_B, 4,                                             \
0277              "requires EVEX_B, EVEX_KZ and the L and XD prefix")               \
0278   ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ_B, 4,                                         \
0279              "requires EVEX_B, EVEX_KZ, L, and OpSize")                        \
0280   ENUM_ENTRY(IC_EVEX_L_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L and W")         \
0281   ENUM_ENTRY(IC_EVEX_L_W_XS_KZ_B, 4,                                           \
0282              "requires EVEX_B, EVEX_KZ, L, W and XS prefix")                   \
0283   ENUM_ENTRY(IC_EVEX_L_W_XD_KZ_B, 4,                                           \
0284              "requires EVEX_B, EVEX_KZ, L, W and XD prefix")                   \
0285   ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ_B, 4,                                       \
0286              "requires EVEX_B, EVEX_KZ, L, W and OpSize")                      \
0287   ENUM_ENTRY(IC_EVEX_L2_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L2 prefix") \
0288   ENUM_ENTRY(IC_EVEX_L2_XS_KZ_B, 4,                                            \
0289              "requires EVEX_B, EVEX_KZ and the L2 and XS prefix")              \
0290   ENUM_ENTRY(IC_EVEX_L2_XD_KZ_B, 4,                                            \
0291              "requires EVEX_B, EVEX_KZ and the L2 and XD prefix")              \
0292   ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ_B, 4,                                        \
0293              "requires EVEX_B, EVEX_KZ, L2, and OpSize")                       \
0294   ENUM_ENTRY(IC_EVEX_L2_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L2 and W")       \
0295   ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ_B, 4,                                          \
0296              "requires EVEX_B, EVEX_KZ, L2, W and XS prefix")                  \
0297   ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ_B, 4,                                          \
0298              "requires EVEX_B, EVEX_KZ, L2, W and XD prefix")                  \
0299   ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ_B, 4,                                      \
0300              "requires EVEX_B, EVEX_KZ, L2, W and OpSize")                     \
0301   ENUM_ENTRY(IC_EVEX_KZ, 1, "requires an EVEX_KZ prefix")                      \
0302   ENUM_ENTRY(IC_EVEX_XS_KZ, 2, "requires EVEX_KZ and the XS prefix")           \
0303   ENUM_ENTRY(IC_EVEX_XD_KZ, 2, "requires EVEX_KZ and the XD prefix")           \
0304   ENUM_ENTRY(IC_EVEX_OPSIZE_KZ, 2, "requires EVEX_KZ and the OpSize prefix")   \
0305   ENUM_ENTRY(IC_EVEX_W_KZ, 3, "requires EVEX_KZ and the W prefix")             \
0306   ENUM_ENTRY(IC_EVEX_W_XS_KZ, 4, "requires EVEX_KZ, W, and XS prefix")         \
0307   ENUM_ENTRY(IC_EVEX_W_XD_KZ, 4, "requires EVEX_KZ, W, and XD prefix")         \
0308   ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ, 4, "requires EVEX_KZ, W, and OpSize")        \
0309   ENUM_ENTRY(IC_EVEX_L_KZ, 3, "requires EVEX_KZ and the L prefix")             \
0310   ENUM_ENTRY(IC_EVEX_L_XS_KZ, 4, "requires EVEX_KZ and the L and XS prefix")   \
0311   ENUM_ENTRY(IC_EVEX_L_XD_KZ, 4, "requires EVEX_KZ and the L and XD prefix")   \
0312   ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ, 4, "requires EVEX_KZ, L, and OpSize")        \
0313   ENUM_ENTRY(IC_EVEX_L_W_KZ, 3, "requires EVEX_KZ, L and W")                   \
0314   ENUM_ENTRY(IC_EVEX_L_W_XS_KZ, 4, "requires EVEX_KZ, L, W and XS prefix")     \
0315   ENUM_ENTRY(IC_EVEX_L_W_XD_KZ, 4, "requires EVEX_KZ, L, W and XD prefix")     \
0316   ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L, W and OpSize")    \
0317   ENUM_ENTRY(IC_EVEX_L2_KZ, 3, "requires EVEX_KZ and the L2 prefix")           \
0318   ENUM_ENTRY(IC_EVEX_L2_XS_KZ, 4, "requires EVEX_KZ and the L2 and XS prefix") \
0319   ENUM_ENTRY(IC_EVEX_L2_XD_KZ, 4, "requires EVEX_KZ and the L2 and XD prefix") \
0320   ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, and OpSize")      \
0321   ENUM_ENTRY(IC_EVEX_L2_W_KZ, 3, "requires EVEX_KZ, L2 and W")                 \
0322   ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ, 4, "requires EVEX_KZ, L2, W and XS prefix")   \
0323   ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ, 4, "requires EVEX_KZ, L2, W and XD prefix")   \
0324   ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, W and OpSize")  \
0325   ENUM_ENTRY(IC_EVEX_B_U, 2, "requires EVEX_B and EVEX_U prefix")              \
0326   ENUM_ENTRY(IC_EVEX_XS_B_U, 3, "requires EVEX_B, XS and EVEX_U prefix")       \
0327   ENUM_ENTRY(IC_EVEX_XD_B_U, 3, "requires EVEX_B, XD and EVEX_U prefix")       \
0328   ENUM_ENTRY(IC_EVEX_OPSIZE_B_U, 3,                                            \
0329              "requires EVEX_B, OpSize and EVEX_U prefix")                      \
0330   ENUM_ENTRY(IC_EVEX_W_B_U, 4, "requires EVEX_B, W, and EVEX_U prefix")        \
0331   ENUM_ENTRY(IC_EVEX_W_XS_B_U, 5, "requires EVEX_B, W, XS, and EVEX_U prefix") \
0332   ENUM_ENTRY(IC_EVEX_W_XD_B_U, 5, "requires EVEX_B, W, XD, and EVEX_U prefix") \
0333   ENUM_ENTRY(IC_EVEX_W_OPSIZE_B_U, 5,                                          \
0334              "requires EVEX_B, W, OpSize and EVEX_U prefix")                   \
0335   ENUM_ENTRY(IC_EVEX_K_B_U, 2, "requires EVEX_B, EVEX_K and EVEX_U prefix")    \
0336   ENUM_ENTRY(IC_EVEX_XS_K_B_U, 3,                                              \
0337              "requires EVEX_B, EVEX_K, XS and the EVEX_U prefix")              \
0338   ENUM_ENTRY(IC_EVEX_XD_K_B_U, 3,                                              \
0339              "requires EVEX_B, EVEX_K, XD and the EVEX_U prefix")              \
0340   ENUM_ENTRY(IC_EVEX_OPSIZE_K_B_U, 3,                                          \
0341              "requires EVEX_B, EVEX_K, OpSize and the EVEX_U prefix")          \
0342   ENUM_ENTRY(IC_EVEX_W_K_B_U, 4,                                               \
0343              "requires EVEX_B, EVEX_K, W,  and the EVEX_U prefix")             \
0344   ENUM_ENTRY(IC_EVEX_W_XS_K_B_U, 5,                                            \
0345              "requires EVEX_B, EVEX_K, W, XS, and EVEX_U prefix")              \
0346   ENUM_ENTRY(IC_EVEX_W_XD_K_B_U, 5,                                            \
0347              "requires EVEX_B, EVEX_K, W, XD, and EVEX_U prefix")              \
0348   ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B_U, 5,                                        \
0349              "requires EVEX_B, EVEX_K, W, OpSize, and EVEX_U prefix")          \
0350   ENUM_ENTRY(IC_EVEX_KZ_B_U, 2, "requires EVEX_B, EVEX_KZ and EVEX_U prefix")  \
0351   ENUM_ENTRY(IC_EVEX_XS_KZ_B_U, 3,                                             \
0352              "requires EVEX_B, EVEX_KZ, XS, and the EVEX_U prefix")            \
0353   ENUM_ENTRY(IC_EVEX_XD_KZ_B_U, 3,                                             \
0354              "requires EVEX_B, EVEX_KZ, XD, and the EVEX_U prefix")            \
0355   ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B_U, 3,                                         \
0356              "requires EVEX_B, EVEX_KZ, OpSize and EVEX_U prefix")             \
0357   ENUM_ENTRY(IC_EVEX_W_KZ_B_U, 4,                                              \
0358              "requires EVEX_B, EVEX_KZ, W and the EVEX_U prefix")              \
0359   ENUM_ENTRY(IC_EVEX_W_XS_KZ_B_U, 5,                                           \
0360              "requires EVEX_B, EVEX_KZ, W, XS, and EVEX_U prefix")             \
0361   ENUM_ENTRY(IC_EVEX_W_XD_KZ_B_U, 5,                                           \
0362              "requires EVEX_B, EVEX_KZ, W, XD, and EVEX_U prefix")             \
0363   ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B_U, 5,                                       \
0364              "requires EVEX_B, EVEX_KZ, W, OpSize and EVEX_U prefix")
0365
0366 #define ENUM_ENTRY(n, r, d) n,
0367 enum InstructionContext { INSTRUCTION_CONTEXTS IC_max };
0368 #undef ENUM_ENTRY
0369
0370 // Opcode types, which determine which decode table to use, both in the Intel
0371 // manual and also for the decoder.
0372 enum OpcodeType {
0373   ONEBYTE = 0,
0374   TWOBYTE = 1,
0375   THREEBYTE_38 = 2,
0376   THREEBYTE_3A = 3,
0377   XOP8_MAP = 4,
0378   XOP9_MAP = 5,
0379   XOPA_MAP = 6,
0380   THREEDNOW_MAP = 7,
0381   MAP4 = 8,
0382   MAP5 = 9,
0383   MAP6 = 10,
0384   MAP7 = 11
0385 };
0386
0387 // The following structs are used for the hierarchical decode table.  After
0388 // determining the instruction's class (i.e., which IC_* constant applies to
0389 // it), the decoder reads the opcode.  Some instructions require specific
0390 // values of the ModR/M byte, so the ModR/M byte indexes into the final table.
0391 //
0392 // If a ModR/M byte is not required, "required" is left unset, and the values
0393 // for each instructionID are identical.
0394 typedef uint16_t InstrUID;
0395
0396 // ModRMDecisionType - describes the type of ModR/M decision, allowing the
0397 // consumer to determine the number of entries in it.
0398 //
0399 // MODRM_ONEENTRY - No matter what the value of the ModR/M byte is, the decoded
0400 //                  instruction is the same.
0401 // MODRM_SPLITRM  - If the ModR/M byte is between 0x00 and 0xbf, the opcode
0402 //                  corresponds to one instruction; otherwise, it corresponds to
0403 //                  a different instruction.
0404 // MODRM_SPLITMISC- If the ModR/M byte is between 0x00 and 0xbf, ModR/M byte
0405 //                  divided by 8 is used to select instruction; otherwise, each
0406 //                  value of the ModR/M byte could correspond to a different
0407 //                  instruction.
0408 // MODRM_SPLITREG - ModR/M byte divided by 8 is used to select instruction. This
0409 //                  corresponds to instructions that use reg field as opcode
0410 // MODRM_FULL     - Potentially, each value of the ModR/M byte could correspond
0411 //                  to a different instruction.
0412 #define MODRMTYPES                                                             \
0413   ENUM_ENTRY(MODRM_ONEENTRY)                                                   \
0414   ENUM_ENTRY(MODRM_SPLITRM)                                                    \
0415   ENUM_ENTRY(MODRM_SPLITMISC)                                                  \
0416   ENUM_ENTRY(MODRM_SPLITREG)                                                   \
0417   ENUM_ENTRY(MODRM_FULL)
0418
0419 #define ENUM_ENTRY(n) n,
0420 enum ModRMDecisionType { MODRMTYPES MODRM_max };
0421 #undef ENUM_ENTRY
0422
0423 #define CASE_ENCODING_RM                                                       \
0424   case ENCODING_RM:                                                            \
0425   case ENCODING_RM_CD2:                                                        \
0426   case ENCODING_RM_CD4:                                                        \
0427   case ENCODING_RM_CD8:                                                        \
0428   case ENCODING_RM_CD16:                                                       \
0429   case ENCODING_RM_CD32:                                                       \
0430   case ENCODING_RM_CD64
0431
0432 #define CASE_ENCODING_VSIB                                                     \
0433   case ENCODING_VSIB:                                                          \
0434   case ENCODING_VSIB_CD2:                                                      \
0435   case ENCODING_VSIB_CD4:                                                      \
0436   case ENCODING_VSIB_CD8:                                                      \
0437   case ENCODING_VSIB_CD16:                                                     \
0438   case ENCODING_VSIB_CD32:                                                     \
0439   case ENCODING_VSIB_CD64
0440
0441 // Physical encodings of instruction operands.
0442 #define ENCODINGS                                                              \
0443   ENUM_ENTRY(ENCODING_NONE, "")                                                \
0444   ENUM_ENTRY(ENCODING_REG, "Register operand in ModR/M byte.")                 \
0445   ENUM_ENTRY(ENCODING_RM, "R/M operand in ModR/M byte.")                       \
0446   ENUM_ENTRY(ENCODING_RM_CD2, "R/M operand with CDisp scaling of 2")           \
0447   ENUM_ENTRY(ENCODING_RM_CD4, "R/M operand with CDisp scaling of 4")           \
0448   ENUM_ENTRY(ENCODING_RM_CD8, "R/M operand with CDisp scaling of 8")           \
0449   ENUM_ENTRY(ENCODING_RM_CD16, "R/M operand with CDisp scaling of 16")         \
0450   ENUM_ENTRY(ENCODING_RM_CD32, "R/M operand with CDisp scaling of 32")         \
0451   ENUM_ENTRY(ENCODING_RM_CD64, "R/M operand with CDisp scaling of 64")         \
0452   ENUM_ENTRY(ENCODING_SIB, "Force SIB operand in ModR/M byte.")                \
0453   ENUM_ENTRY(ENCODING_VSIB, "VSIB operand in ModR/M byte.")                    \
0454   ENUM_ENTRY(ENCODING_VSIB_CD2, "VSIB operand with CDisp scaling of 2")        \
0455   ENUM_ENTRY(ENCODING_VSIB_CD4, "VSIB operand with CDisp scaling of 4")        \
0456   ENUM_ENTRY(ENCODING_VSIB_CD8, "VSIB operand with CDisp scaling of 8")        \
0457   ENUM_ENTRY(ENCODING_VSIB_CD16, "VSIB operand with CDisp scaling of 16")      \
0458   ENUM_ENTRY(ENCODING_VSIB_CD32, "VSIB operand with CDisp scaling of 32")      \
0459   ENUM_ENTRY(ENCODING_VSIB_CD64, "VSIB operand with CDisp scaling of 64")      \
0460   ENUM_ENTRY(ENCODING_VVVV, "Register operand in VEX.vvvv byte.")              \
0461   ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.")         \
0462   ENUM_ENTRY(ENCODING_IB, "1-byte immediate")                                  \
0463   ENUM_ENTRY(ENCODING_IW, "2-byte")                                            \
0464   ENUM_ENTRY(ENCODING_ID, "4-byte")                                            \
0465   ENUM_ENTRY(ENCODING_IO, "8-byte")                                            \
0466   ENUM_ENTRY(ENCODING_RB,                                                      \
0467              "(AL..DIL, R8B..R15B) Register code added to the opcode byte")    \
0468   ENUM_ENTRY(ENCODING_RW, "(AX..DI, R8W..R15W)")                               \
0469   ENUM_ENTRY(ENCODING_RD, "(EAX..EDI, R8D..R15D)")                             \
0470   ENUM_ENTRY(ENCODING_RO, "(RAX..RDI, R8..R15)")                               \
0471   ENUM_ENTRY(ENCODING_FP, "Position on floating-point stack in ModR/M byte.")  \
0472   ENUM_ENTRY(ENCODING_Iv, "Immediate of operand size")                         \
0473   ENUM_ENTRY(ENCODING_Ia, "Immediate of address size")                         \
0474   ENUM_ENTRY(ENCODING_IRC, "Immediate for static rounding control")            \
0475   ENUM_ENTRY(ENCODING_Rv,                                                      \
0476              "Register code of operand size added to the opcode byte")         \
0477   ENUM_ENTRY(ENCODING_CC, "Condition code encoded in opcode")                  \
0478   ENUM_ENTRY(ENCODING_CF, "Condition flags encoded in EVEX.VVVV")              \
0479   ENUM_ENTRY(ENCODING_DUP,                                                     \
0480              "Duplicate of another operand; ID is encoded in type")            \
0481   ENUM_ENTRY(ENCODING_SI, "Source index; encoded in OpSize/Adsize prefix")     \
0482   ENUM_ENTRY(ENCODING_DI, "Destination index; encoded in prefixes")
0483
0484 #define ENUM_ENTRY(n, d) n,
0485 enum OperandEncoding { ENCODINGS ENCODING_max };
0486 #undef ENUM_ENTRY
0487
0488 // Semantic interpretations of instruction operands.
0489 #define TYPES                                                                  \
0490   ENUM_ENTRY(TYPE_NONE, "")                                                    \
0491   ENUM_ENTRY(TYPE_REL, "immediate address")                                    \
0492   ENUM_ENTRY(TYPE_R8, "1-byte register operand")                               \
0493   ENUM_ENTRY(TYPE_R16, "2-byte")                                               \
0494   ENUM_ENTRY(TYPE_R32, "4-byte")                                               \
0495   ENUM_ENTRY(TYPE_R64, "8-byte")                                               \
0496   ENUM_ENTRY(TYPE_IMM, "immediate operand")                                    \
0497   ENUM_ENTRY(TYPE_UIMM8, "1-byte unsigned immediate operand")                  \
0498   ENUM_ENTRY(TYPE_M, "Memory operand")                                         \
0499   ENUM_ENTRY(TYPE_MSIB, "Memory operand force sib encoding")                   \
0500   ENUM_ENTRY(TYPE_MVSIBX, "Memory operand using XMM index")                    \
0501   ENUM_ENTRY(TYPE_MVSIBY, "Memory operand using YMM index")                    \
0502   ENUM_ENTRY(TYPE_MVSIBZ, "Memory operand using ZMM index")                    \
0503   ENUM_ENTRY(TYPE_SRCIDX, "memory at source index")                            \
0504   ENUM_ENTRY(TYPE_DSTIDX, "memory at destination index")                       \
0505   ENUM_ENTRY(TYPE_MOFFS, "memory offset (relative to segment base)")           \
0506   ENUM_ENTRY(TYPE_ST, "Position on the floating-point stack")                  \
0507   ENUM_ENTRY(TYPE_MM64, "8-byte MMX register")                                 \
0508   ENUM_ENTRY(TYPE_XMM, "16-byte")                                              \
0509   ENUM_ENTRY(TYPE_YMM, "32-byte")                                              \
0510   ENUM_ENTRY(TYPE_ZMM, "64-byte")                                              \
0511   ENUM_ENTRY(TYPE_VK, "mask register")                                         \
0512   ENUM_ENTRY(TYPE_VK_PAIR, "mask register pair")                               \
0513   ENUM_ENTRY(TYPE_TMM, "tile")                                                 \
0514   ENUM_ENTRY(TYPE_TMM_PAIR, "tile pair")                                       \
0515   ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand")                      \
0516   ENUM_ENTRY(TYPE_DEBUGREG, "Debug register operand")                          \
0517   ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand")                      \
0518   ENUM_ENTRY(TYPE_BNDR, "MPX bounds register")                                 \
0519   ENUM_ENTRY(TYPE_Rv, "Register operand of operand size")                      \
0520   ENUM_ENTRY(TYPE_RELv, "Immediate address of operand size")                   \
0521   ENUM_ENTRY(TYPE_DUP0, "Duplicate of operand 0")                              \
0522   ENUM_ENTRY(TYPE_DUP1, "operand 1")                                           \
0523   ENUM_ENTRY(TYPE_DUP2, "operand 2")                                           \
0524   ENUM_ENTRY(TYPE_DUP3, "operand 3")                                           \
0525   ENUM_ENTRY(TYPE_DUP4, "operand 4")
0526
0527 #define ENUM_ENTRY(n, d) n,
0528 enum OperandType { TYPES TYPE_max };
0529 #undef ENUM_ENTRY
0530
0531 /// The specification for how to extract and interpret one operand.
0532 struct OperandSpecifier {
0533   uint8_t encoding;
0534   uint8_t type;
0535 };
0536
0537 static const unsigned X86_MAX_OPERANDS = 6;
0538
0539 /// Decoding mode for the Intel disassembler.  16-bit, 32-bit, and 64-bit mode
0540 /// are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,
0541 /// respectively.
0542 enum DisassemblerMode { MODE_16BIT, MODE_32BIT, MODE_64BIT };
0543
0544 } // namespace X86Disassembler
0545 } // namespace llvm
0546
0547 #endif