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File indexing completed on 2026-05-10 08:44:27
0001 //===-- ARMBuildAttributes.h - ARM Build Attributes -------------*- C++ -*-===// 0002 // 0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 0004 // See https://llvm.org/LICENSE.txt for license information. 0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 0006 // 0007 //===----------------------------------------------------------------------===// 0008 // 0009 // This file contains enumerations and support routines for ARM build attributes 0010 // as defined in ARM ABI addenda document (ABI release 2.08). 0011 // 0012 // ELF for the ARM Architecture r2.09 - November 30, 2012 0013 // 0014 // http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044e/IHI0044E_aaelf.pdf 0015 // 0016 //===----------------------------------------------------------------------===// 0017 0018 #ifndef LLVM_SUPPORT_ARMBUILDATTRIBUTES_H 0019 #define LLVM_SUPPORT_ARMBUILDATTRIBUTES_H 0020 0021 #include "llvm/Support/ELFAttributes.h" 0022 0023 namespace llvm { 0024 namespace ARMBuildAttrs { 0025 0026 const TagNameMap &getARMAttributeTags(); 0027 0028 enum SpecialAttr { 0029 // This is for the .cpu asm attr. It translates into one or more 0030 // AttrType (below) entries in the .ARM.attributes section in the ELF. 0031 SEL_CPU 0032 }; 0033 0034 enum AttrType : unsigned { 0035 // Rest correspond to ELF/.ARM.attributes 0036 File = 1, 0037 CPU_raw_name = 4, 0038 CPU_name = 5, 0039 CPU_arch = 6, 0040 CPU_arch_profile = 7, 0041 ARM_ISA_use = 8, 0042 THUMB_ISA_use = 9, 0043 FP_arch = 10, 0044 WMMX_arch = 11, 0045 Advanced_SIMD_arch = 12, 0046 PCS_config = 13, 0047 ABI_PCS_R9_use = 14, 0048 ABI_PCS_RW_data = 15, 0049 ABI_PCS_RO_data = 16, 0050 ABI_PCS_GOT_use = 17, 0051 ABI_PCS_wchar_t = 18, 0052 ABI_FP_rounding = 19, 0053 ABI_FP_denormal = 20, 0054 ABI_FP_exceptions = 21, 0055 ABI_FP_user_exceptions = 22, 0056 ABI_FP_number_model = 23, 0057 ABI_align_needed = 24, 0058 ABI_align_preserved = 25, 0059 ABI_enum_size = 26, 0060 ABI_HardFP_use = 27, 0061 ABI_VFP_args = 28, 0062 ABI_WMMX_args = 29, 0063 ABI_optimization_goals = 30, 0064 ABI_FP_optimization_goals = 31, 0065 compatibility = 32, 0066 CPU_unaligned_access = 34, 0067 FP_HP_extension = 36, 0068 ABI_FP_16bit_format = 38, 0069 MPextension_use = 42, // recoded from 70 (ABI r2.08) 0070 DIV_use = 44, 0071 DSP_extension = 46, 0072 MVE_arch = 48, 0073 PAC_extension = 50, 0074 BTI_extension = 52, 0075 also_compatible_with = 65, 0076 conformance = 67, 0077 Virtualization_use = 68, 0078 BTI_use = 74, 0079 PACRET_use = 76, 0080 0081 /// Legacy Tags 0082 Section = 2, // deprecated (ABI r2.09) 0083 Symbol = 3, // deprecated (ABI r2.09) 0084 ABI_align8_needed = 24, // renamed to ABI_align_needed (ABI r2.09) 0085 ABI_align8_preserved = 25, // renamed to ABI_align_preserved (ABI r2.09) 0086 nodefaults = 64, // deprecated (ABI r2.09) 0087 T2EE_use = 66, // deprecated (ABI r2.09) 0088 MPextension_use_old = 70 // recoded to MPextension_use (ABI r2.08) 0089 }; 0090 0091 // Legal Values for CPU_arch, (=6), uleb128 0092 enum CPUArch { 0093 Pre_v4 = 0, 0094 v4 = 1, // e.g. SA110 0095 v4T = 2, // e.g. ARM7TDMI 0096 v5T = 3, // e.g. ARM9TDMI 0097 v5TE = 4, // e.g. ARM946E_S 0098 v5TEJ = 5, // e.g. ARM926EJ_S 0099 v6 = 6, // e.g. ARM1136J_S 0100 v6KZ = 7, // e.g. ARM1176JZ_S 0101 v6T2 = 8, // e.g. ARM1156T2_S 0102 v6K = 9, // e.g. ARM1176JZ_S 0103 v7 = 10, // e.g. Cortex A8, Cortex M3 0104 v6_M = 11, // e.g. Cortex M1 0105 v6S_M = 12, // v6_M with the System extensions 0106 v7E_M = 13, // v7_M with DSP extensions 0107 v8_A = 14, // v8_A AArch32 0108 v8_R = 15, // e.g. Cortex R52 0109 v8_M_Base = 16, // v8_M_Base AArch32 0110 v8_M_Main = 17, // v8_M_Main AArch32 0111 v8_1_M_Main = 21, // v8_1_M_Main AArch32 0112 v9_A = 22, // v9_A AArch32 0113 }; 0114 0115 enum CPUArchProfile { // (=7), uleb128 0116 Not_Applicable = 0, // pre v7, or cross-profile code 0117 ApplicationProfile = (0x41), // 'A' (e.g. for Cortex A8) 0118 RealTimeProfile = (0x52), // 'R' (e.g. for Cortex R4) 0119 MicroControllerProfile = (0x4D), // 'M' (e.g. for Cortex M3) 0120 SystemProfile = (0x53) // 'S' Application or real-time profile 0121 }; 0122 0123 // The following have a lot of common use cases 0124 enum { 0125 Not_Allowed = 0, 0126 Allowed = 1, 0127 0128 // Tag_ARM_ISA_use (=8), uleb128 0129 0130 // Tag_THUMB_ISA_use, (=9), uleb128 0131 AllowThumb32 = 2, // 32-bit Thumb (implies 16-bit instructions) 0132 AllowThumbDerived = 3, // Thumb allowed, derived from arch/profile 0133 0134 // Tag_FP_arch (=10), uleb128 (formerly Tag_VFP_arch = 10) 0135 AllowFPv2 = 2, // v2 FP ISA permitted (implies use of the v1 FP ISA) 0136 AllowFPv3A = 3, // v3 FP ISA permitted (implies use of the v2 FP ISA) 0137 AllowFPv3B = 4, // v3 FP ISA permitted, but only D0-D15, S0-S31 0138 AllowFPv4A = 5, // v4 FP ISA permitted (implies use of v3 FP ISA) 0139 AllowFPv4B = 6, // v4 FP ISA was permitted, but only D0-D15, S0-S31 0140 AllowFPARMv8A = 7, // Use of the ARM v8-A FP ISA was permitted 0141 AllowFPARMv8B = 8, // Use of the ARM v8-A FP ISA was permitted, but only 0142 // D0-D15, S0-S31 0143 0144 // Tag_WMMX_arch, (=11), uleb128 0145 AllowWMMXv1 = 1, // The user permitted this entity to use WMMX v1 0146 AllowWMMXv2 = 2, // The user permitted this entity to use WMMX v2 0147 0148 // Tag_Advanced_SIMD_arch, (=12), uleb128 0149 AllowNeon = 1, // SIMDv1 was permitted 0150 AllowNeon2 = 2, // SIMDv2 was permitted (Half-precision FP, MAC operations) 0151 AllowNeonARMv8 = 3, // ARM v8-A SIMD was permitted 0152 AllowNeonARMv8_1a = 4,// ARM v8.1-A SIMD was permitted (RDMA) 0153 0154 // Tag_MVE_arch, (=48), uleb128 0155 AllowMVEInteger = 1, // integer-only MVE was permitted 0156 AllowMVEIntegerAndFloat = 2, // both integer and floating point MVE were permitted 0157 0158 // Tag_ABI_PCS_R9_use, (=14), uleb128 0159 R9IsGPR = 0, // R9 used as v6 (just another callee-saved register) 0160 R9IsSB = 1, // R9 used as a global static base rgister 0161 R9IsTLSPointer = 2, // R9 used as a thread local storage pointer 0162 R9Reserved = 3, // R9 not used by code associated with attributed entity 0163 0164 // Tag_ABI_PCS_RW_data, (=15), uleb128 0165 AddressRWPCRel = 1, // Address RW static data PC-relative 0166 AddressRWSBRel = 2, // Address RW static data SB-relative 0167 AddressRWNone = 3, // No RW static data permitted 0168 0169 // Tag_ABI_PCS_RO_data, (=14), uleb128 0170 AddressROPCRel = 1, // Address RO static data PC-relative 0171 AddressRONone = 2, // No RO static data permitted 0172 0173 // Tag_ABI_PCS_GOT_use, (=17), uleb128 0174 AddressDirect = 1, // Address imported data directly 0175 AddressGOT = 2, // Address imported data indirectly (via GOT) 0176 0177 // Tag_ABI_PCS_wchar_t, (=18), uleb128 0178 WCharProhibited = 0, // wchar_t is not used 0179 WCharWidth2Bytes = 2, // sizeof(wchar_t) == 2 0180 WCharWidth4Bytes = 4, // sizeof(wchar_t) == 4 0181 0182 // Tag_ABI_align_needed, (=24), uleb128 0183 Align8Byte = 1, 0184 Align4Byte = 2, 0185 AlignReserved = 3, 0186 0187 // Tag_ABI_align_needed, (=25), uleb128 0188 AlignNotPreserved = 0, 0189 AlignPreserve8Byte = 1, 0190 AlignPreserveAll = 2, 0191 0192 // Tag_ABI_FP_denormal, (=20), uleb128 0193 PositiveZero = 0, 0194 IEEEDenormals = 1, 0195 PreserveFPSign = 2, // sign when flushed-to-zero is preserved 0196 0197 // Tag_ABI_FP_number_model, (=23), uleb128 0198 AllowIEEENormal = 1, 0199 AllowRTABI = 2, // numbers, infinities, and one quiet NaN (see [RTABI]) 0200 AllowIEEE754 = 3, // this code to use all the IEEE 754-defined FP encodings 0201 0202 // Tag_ABI_enum_size, (=26), uleb128 0203 EnumProhibited = 0, // The user prohibited the use of enums when building 0204 // this entity. 0205 EnumSmallest = 1, // Enum is smallest container big enough to hold all 0206 // values. 0207 Enum32Bit = 2, // Enum is at least 32 bits. 0208 Enum32BitABI = 3, // Every enumeration visible across an ABI-complying 0209 // interface contains a value needing 32 bits to encode 0210 // it; other enums can be containerized. 0211 0212 // Tag_ABI_HardFP_use, (=27), uleb128 0213 HardFPImplied = 0, // FP use should be implied by Tag_FP_arch 0214 HardFPSinglePrecision = 1, // Single-precision only 0215 0216 // Tag_ABI_VFP_args, (=28), uleb128 0217 BaseAAPCS = 0, 0218 HardFPAAPCS = 1, 0219 ToolChainFPPCS = 2, 0220 CompatibleFPAAPCS = 3, 0221 0222 // Tag_FP_HP_extension, (=36), uleb128 0223 AllowHPFP = 1, // Allow use of Half Precision FP 0224 0225 // Tag_FP_16bit_format, (=38), uleb128 0226 FP16FormatIEEE = 1, 0227 FP16VFP3 = 2, 0228 0229 // Tag_MPextension_use, (=42), uleb128 0230 AllowMP = 1, // Allow use of MP extensions 0231 0232 // Tag_DIV_use, (=44), uleb128 0233 // Note: AllowDIVExt must be emitted if and only if the permission to use 0234 // hardware divide cannot be conveyed using AllowDIVIfExists or DisallowDIV 0235 AllowDIVIfExists = 0, // Allow hardware divide if available in arch, or no 0236 // info exists. 0237 DisallowDIV = 1, // Hardware divide explicitly disallowed. 0238 AllowDIVExt = 2, // Allow hardware divide as optional architecture 0239 // extension above the base arch specified by 0240 // Tag_CPU_arch and Tag_CPU_arch_profile. 0241 0242 // Tag_Virtualization_use, (=68), uleb128 0243 AllowTZ = 1, 0244 AllowVirtualization = 2, 0245 AllowTZVirtualization = 3, 0246 0247 // Tag_PAC_extension, (=50), uleb128 0248 DisallowPAC = 0, 0249 AllowPACInNOPSpace = 1, 0250 AllowPAC = 2, 0251 0252 // Tag_BTI_extension, (=52), uleb128 0253 DisallowBTI = 0, 0254 AllowBTIInNOPSpace = 1, 0255 AllowBTI = 2, 0256 0257 // Tag_BTI_use, (=74), uleb128 0258 BTINotUsed = 0, 0259 BTIUsed = 1, 0260 0261 // Tag_PACRET_use, (=76), uleb128 0262 PACRETNotUsed = 0, 0263 PACRETUsed = 1 0264 }; 0265 0266 } // namespace ARMBuildAttrs 0267 } // namespace llvm 0268 0269 #endif
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