llvm/Support/AMDGPUAddrSpace.h

0001 //===---------------- AMDGPUAddrSpace.h -------------------------*- C++ -*-===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 //
0009 /// \file
0010 /// AMDGPU address space definition
0011 ///
0012 //
0013 //===----------------------------------------------------------------------===//
0014
0015 #ifndef LLVM_SUPPORT_AMDGPUADDRSPACE_H
0016 #define LLVM_SUPPORT_AMDGPUADDRSPACE_H
0017
0018 namespace llvm {
0019 /// OpenCL uses address spaces to differentiate between
0020 /// various memory regions on the hardware. On the CPU
0021 /// all of the address spaces point to the same memory,
0022 /// however on the GPU, each address space points to
0023 /// a separate piece of memory that is unique from other
0024 /// memory locations.
0025 namespace AMDGPUAS {
0026 enum : unsigned {
0027   // The maximum value for flat, generic, local, private, constant and region.
0028   MAX_AMDGPU_ADDRESS = 9,
0029
0030   FLAT_ADDRESS = 0,   ///< Address space for flat memory.
0031   GLOBAL_ADDRESS = 1, ///< Address space for global memory (RAT0, VTX0).
0032   REGION_ADDRESS = 2, ///< Address space for region memory. (GDS)
0033
0034   CONSTANT_ADDRESS = 4, ///< Address space for constant memory (VTX2).
0035   LOCAL_ADDRESS = 3,    ///< Address space for local memory.
0036   PRIVATE_ADDRESS = 5,  ///< Address space for private memory.
0037
0038   CONSTANT_ADDRESS_32BIT = 6, ///< Address space for 32-bit constant memory.
0039
0040   BUFFER_FAT_POINTER = 7, ///< Address space for 160-bit buffer fat pointers.
0041                           ///< Not used in backend.
0042
0043   BUFFER_RESOURCE = 8, ///< Address space for 128-bit buffer resources.
0044
0045   BUFFER_STRIDED_POINTER = 9, ///< Address space for 192-bit fat buffer
0046                               ///< pointers with an additional index.
0047
0048   /// Internal address spaces. Can be freely renumbered.
0049   STREAMOUT_REGISTER = 128, ///< Address space for GS NGG Streamout registers.
0050   /// end Internal address spaces.
0051
0052   /// Address space for direct addressable parameter memory (CONST0).
0053   PARAM_D_ADDRESS = 6,
0054   /// Address space for indirect addressable parameter memory (VTX1).
0055   PARAM_I_ADDRESS = 7,
0056
0057   // Do not re-order the CONSTANT_BUFFER_* enums.  Several places depend on
0058   // this order to be able to dynamically index a constant buffer, for
0059   // example:
0060   //
0061   // ConstantBufferAS = CONSTANT_BUFFER_0 + CBIdx
0062
0063   CONSTANT_BUFFER_0 = 8,
0064   CONSTANT_BUFFER_1 = 9,
0065   CONSTANT_BUFFER_2 = 10,
0066   CONSTANT_BUFFER_3 = 11,
0067   CONSTANT_BUFFER_4 = 12,
0068   CONSTANT_BUFFER_5 = 13,
0069   CONSTANT_BUFFER_6 = 14,
0070   CONSTANT_BUFFER_7 = 15,
0071   CONSTANT_BUFFER_8 = 16,
0072   CONSTANT_BUFFER_9 = 17,
0073   CONSTANT_BUFFER_10 = 18,
0074   CONSTANT_BUFFER_11 = 19,
0075   CONSTANT_BUFFER_12 = 20,
0076   CONSTANT_BUFFER_13 = 21,
0077   CONSTANT_BUFFER_14 = 22,
0078   CONSTANT_BUFFER_15 = 23,
0079
0080   // Some places use this if the address space can't be determined.
0081   UNKNOWN_ADDRESS_SPACE = ~0u,
0082 };
0083 } // end namespace AMDGPUAS
0084
0085 namespace AMDGPU {
0086 inline bool isFlatGlobalAddrSpace(unsigned AS) {
0087   return AS == AMDGPUAS::GLOBAL_ADDRESS || AS == AMDGPUAS::FLAT_ADDRESS ||
0088          AS == AMDGPUAS::CONSTANT_ADDRESS || AS > AMDGPUAS::MAX_AMDGPU_ADDRESS;
0089 }
0090
0091 inline bool isExtendedGlobalAddrSpace(unsigned AS) {
0092   return AS == AMDGPUAS::GLOBAL_ADDRESS || AS == AMDGPUAS::CONSTANT_ADDRESS ||
0093          AS == AMDGPUAS::CONSTANT_ADDRESS_32BIT ||
0094          AS > AMDGPUAS::MAX_AMDGPU_ADDRESS;
0095 }
0096
0097 inline bool isConstantAddressSpace(unsigned AS) {
0098   switch (AS) {
0099     using namespace AMDGPUAS;
0100   case CONSTANT_ADDRESS:
0101   case CONSTANT_ADDRESS_32BIT:
0102   case CONSTANT_BUFFER_0:
0103   case CONSTANT_BUFFER_1:
0104   case CONSTANT_BUFFER_2:
0105   case CONSTANT_BUFFER_3:
0106   case CONSTANT_BUFFER_4:
0107   case CONSTANT_BUFFER_5:
0108   case CONSTANT_BUFFER_6:
0109   case CONSTANT_BUFFER_7:
0110   case CONSTANT_BUFFER_8:
0111   case CONSTANT_BUFFER_9:
0112   case CONSTANT_BUFFER_10:
0113   case CONSTANT_BUFFER_11:
0114   case CONSTANT_BUFFER_12:
0115   case CONSTANT_BUFFER_13:
0116   case CONSTANT_BUFFER_14:
0117   case CONSTANT_BUFFER_15:
0118     return true;
0119   default:
0120     return false;
0121   }
0122 }
0123 } // end namespace AMDGPU
0124
0125 } // end namespace llvm
0126
0127 #endif // LLVM_SUPPORT_AMDGPUADDRSPACE_H