Warning, /include/llvm/IR/IntrinsicsWebAssembly.td is written in an unsupported language. File is not indexed.
0001 //===- IntrinsicsWebAssembly.td - Defines wasm intrinsics --*- tablegen -*-===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 ///
0009 /// \file
0010 /// This file defines all of the WebAssembly-specific intrinsics.
0011 ///
0012 //===----------------------------------------------------------------------===//
0013
0014 // Type definition for a table in an intrinsic
0015 def llvm_table_ty : LLVMQualPointerType<1>;
0016
0017 let TargetPrefix = "wasm" in { // All intrinsics start with "llvm.wasm.".
0018
0019 // Query the current memory size, and increase the current memory size.
0020 // Note that memory.size is not IntrNoMem because it must be sequenced with
0021 // respect to memory.grow calls.
0022 def int_wasm_memory_size :
0023 DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty], [IntrReadMem]>;
0024 def int_wasm_memory_grow :
0025 DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_i32_ty, LLVMMatchType<0>], []>;
0026
0027 //===----------------------------------------------------------------------===//
0028 // ref.null intrinsics
0029 //===----------------------------------------------------------------------===//
0030 def int_wasm_ref_null_extern :
0031 DefaultAttrsIntrinsic<[llvm_externref_ty], [], [IntrNoMem]>;
0032 def int_wasm_ref_null_func :
0033 DefaultAttrsIntrinsic<[llvm_funcref_ty], [], [IntrNoMem]>;
0034 def int_wasm_ref_null_exn:
0035 DefaultAttrsIntrinsic<[llvm_exnref_ty], [], [IntrNoMem]>;
0036 def int_wasm_ref_is_null_extern :
0037 DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_externref_ty], [IntrNoMem],
0038 "llvm.wasm.ref.is_null.extern">;
0039 def int_wasm_ref_is_null_func :
0040 DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_funcref_ty],
0041 [IntrNoMem], "llvm.wasm.ref.is_null.func">;
0042 def int_wasm_ref_is_null_exn :
0043 DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_exnref_ty], [IntrNoMem],
0044 "llvm.wasm.ref.is_null.exn">;
0045
0046 //===----------------------------------------------------------------------===//
0047 // Table intrinsics
0048 //===----------------------------------------------------------------------===//
0049 def int_wasm_table_set_externref :
0050 DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_externref_ty],
0051 [IntrWriteMem]>;
0052 def int_wasm_table_set_funcref :
0053 DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty],
0054 [IntrWriteMem]>;
0055 def int_wasm_table_set_exnref :
0056 DefaultAttrsIntrinsic<[], [llvm_table_ty, llvm_i32_ty, llvm_exnref_ty],
0057 [IntrWriteMem]>;
0058
0059 def int_wasm_table_get_externref :
0060 DefaultAttrsIntrinsic<[llvm_externref_ty], [llvm_table_ty, llvm_i32_ty],
0061 [IntrReadMem]>;
0062 def int_wasm_table_get_funcref :
0063 DefaultAttrsIntrinsic<[llvm_funcref_ty], [llvm_table_ty, llvm_i32_ty],
0064 [IntrReadMem]>;
0065 def int_wasm_table_get_exnref :
0066 DefaultAttrsIntrinsic<[llvm_exnref_ty], [llvm_table_ty, llvm_i32_ty],
0067 [IntrReadMem]>;
0068
0069 // Query the current table size, and increase the current table size.
0070 def int_wasm_table_size :
0071 DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_table_ty], [IntrReadMem]>;
0072 def int_wasm_table_copy :
0073 DefaultAttrsIntrinsic<[],
0074 [llvm_table_ty, llvm_table_ty, llvm_i32_ty, llvm_i32_ty,
0075 llvm_i32_ty], []>;
0076 def int_wasm_table_grow_externref :
0077 DefaultAttrsIntrinsic<[llvm_i32_ty],
0078 [llvm_table_ty, llvm_externref_ty, llvm_i32_ty], []>;
0079 def int_wasm_table_grow_funcref :
0080 DefaultAttrsIntrinsic<[llvm_i32_ty],
0081 [llvm_table_ty, llvm_funcref_ty, llvm_i32_ty], []>;
0082 def int_wasm_table_grow_exnref :
0083 DefaultAttrsIntrinsic<[llvm_i32_ty],
0084 [llvm_table_ty, llvm_exnref_ty, llvm_i32_ty], []>;
0085 def int_wasm_table_fill_externref :
0086 DefaultAttrsIntrinsic<[],
0087 [llvm_table_ty, llvm_i32_ty, llvm_externref_ty,
0088 llvm_i32_ty], []>;
0089 def int_wasm_table_fill_funcref :
0090 DefaultAttrsIntrinsic<[],
0091 [llvm_table_ty, llvm_i32_ty, llvm_funcref_ty,
0092 llvm_i32_ty], []>;
0093 def int_wasm_table_fill_exnref :
0094 DefaultAttrsIntrinsic<[],
0095 [llvm_table_ty, llvm_i32_ty, llvm_exnref_ty,
0096 llvm_i32_ty], []>;
0097
0098 //===----------------------------------------------------------------------===//
0099 // Trapping float-to-int conversions
0100 //===----------------------------------------------------------------------===//
0101
0102 // These don't use default attributes, because they are not willreturn.
0103 def int_wasm_trunc_signed : Intrinsic<[llvm_anyint_ty],
0104 [llvm_anyfloat_ty],
0105 [IntrNoMem]>;
0106 def int_wasm_trunc_unsigned : Intrinsic<[llvm_anyint_ty],
0107 [llvm_anyfloat_ty],
0108 [IntrNoMem]>;
0109
0110 //===----------------------------------------------------------------------===//
0111 // Saturating float-to-int conversions
0112 //===----------------------------------------------------------------------===//
0113
0114 def int_wasm_trunc_saturate_signed :
0115 DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
0116 [IntrNoMem, IntrSpeculatable]>;
0117 def int_wasm_trunc_saturate_unsigned :
0118 DefaultAttrsIntrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty],
0119 [IntrNoMem, IntrSpeculatable]>;
0120
0121 //===----------------------------------------------------------------------===//
0122 // Exception handling intrinsics
0123 //===----------------------------------------------------------------------===//
0124
0125 // throw / rethrow
0126 // The first immediate argument is an index to a tag, which is 0 for C++
0127 // exception. The second argument is the thrown exception pointer.
0128 def int_wasm_throw : Intrinsic<[], [llvm_i32_ty, llvm_ptr_ty],
0129 [Throws, IntrNoReturn, ImmArg<ArgIndex<0>>]>;
0130 def int_wasm_rethrow : Intrinsic<[], [], [Throws, IntrNoReturn]>;
0131
0132 // Since wasm does not use landingpad instructions, these instructions return
0133 // exception pointer and selector values until we lower them in WasmEHPrepare.
0134 def int_wasm_get_exception :
0135 DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_token_ty], [IntrHasSideEffects]>;
0136 def int_wasm_get_ehselector :
0137 DefaultAttrsIntrinsic<[llvm_i32_ty], [llvm_token_ty], [IntrHasSideEffects]>;
0138
0139 // wasm.catch returns the pointer to the exception object caught by wasm 'catch'
0140 // instruction. This returns a single pointer, which is the case for C++
0141 // exceptions. The immediate argument is an index to for a tag, which is 0 for
0142 // C++ exceptions.
0143 def int_wasm_catch :
0144 DefaultAttrsIntrinsic<[llvm_ptr_ty], [llvm_i32_ty],
0145 [IntrHasSideEffects, ImmArg<ArgIndex<0>>]>;
0146
0147 // WebAssembly EH must maintain the landingpads in the order assigned to them
0148 // by WasmEHPrepare pass to generate landingpad table in EHStreamer. This is
0149 // used in order to give them the indices in WasmEHPrepare.
0150 def int_wasm_landingpad_index :
0151 DefaultAttrsIntrinsic<[], [llvm_token_ty, llvm_i32_ty],
0152 [IntrNoMem, ImmArg<ArgIndex<1>>]>;
0153
0154 // Returns LSDA address of the current function.
0155 def int_wasm_lsda : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
0156
0157 //===----------------------------------------------------------------------===//
0158 // Atomic intrinsics
0159 //===----------------------------------------------------------------------===//
0160
0161 // wait / notify
0162 // These don't use default attributes, because they are not nosync.
0163 def int_wasm_memory_atomic_wait32 :
0164 Intrinsic<[llvm_i32_ty],
0165 [llvm_ptr_ty, llvm_i32_ty, llvm_i64_ty],
0166 [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
0167 NoCapture<ArgIndex<0>>, IntrHasSideEffects],
0168 "", [SDNPMemOperand]>;
0169 def int_wasm_memory_atomic_wait64 :
0170 Intrinsic<[llvm_i32_ty],
0171 [llvm_ptr_ty, llvm_i64_ty, llvm_i64_ty],
0172 [IntrInaccessibleMemOrArgMemOnly, ReadOnly<ArgIndex<0>>,
0173 NoCapture<ArgIndex<0>>, IntrHasSideEffects],
0174 "", [SDNPMemOperand]>;
0175 def int_wasm_memory_atomic_notify:
0176 Intrinsic<[llvm_i32_ty], [llvm_ptr_ty, llvm_i32_ty],
0177 [IntrInaccessibleMemOnly, NoCapture<ArgIndex<0>>,
0178 IntrHasSideEffects],
0179 "", [SDNPMemOperand]>;
0180
0181 //===----------------------------------------------------------------------===//
0182 // SIMD intrinsics
0183 //===----------------------------------------------------------------------===//
0184
0185 def int_wasm_swizzle :
0186 DefaultAttrsIntrinsic<[llvm_v16i8_ty],
0187 [llvm_v16i8_ty, llvm_v16i8_ty],
0188 [IntrNoMem, IntrSpeculatable]>;
0189 def int_wasm_shuffle :
0190 DefaultAttrsIntrinsic<[llvm_v16i8_ty],
0191 [llvm_v16i8_ty, llvm_v16i8_ty, llvm_i32_ty,
0192 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
0193 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
0194 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
0195 llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
0196 [IntrNoMem, IntrSpeculatable,
0197 ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
0198 ImmArg<ArgIndex<4>>, ImmArg<ArgIndex<5>>,
0199 ImmArg<ArgIndex<6>>, ImmArg<ArgIndex<7>>,
0200 ImmArg<ArgIndex<8>>, ImmArg<ArgIndex<9>>,
0201 ImmArg<ArgIndex<10>>, ImmArg<ArgIndex<11>>,
0202 ImmArg<ArgIndex<12>>, ImmArg<ArgIndex<13>>,
0203 ImmArg<ArgIndex<14>>, ImmArg<ArgIndex<15>>,
0204 ImmArg<ArgIndex<16>>, ImmArg<ArgIndex<17>>]>;
0205 def int_wasm_avgr_unsigned :
0206 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0207 [LLVMMatchType<0>, LLVMMatchType<0>],
0208 [IntrNoMem, IntrSpeculatable]>;
0209 def int_wasm_bitselect :
0210 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0211 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
0212 [IntrNoMem, IntrSpeculatable]>;
0213 def int_wasm_anytrue :
0214 DefaultAttrsIntrinsic<[llvm_i32_ty],
0215 [llvm_anyvector_ty],
0216 [IntrNoMem, IntrSpeculatable]>;
0217 def int_wasm_alltrue :
0218 DefaultAttrsIntrinsic<[llvm_i32_ty],
0219 [llvm_anyvector_ty],
0220 [IntrNoMem, IntrSpeculatable]>;
0221 def int_wasm_bitmask :
0222 DefaultAttrsIntrinsic<[llvm_i32_ty],
0223 [llvm_anyvector_ty],
0224 [IntrNoMem, IntrSpeculatable]>;
0225 def int_wasm_dot :
0226 DefaultAttrsIntrinsic<[llvm_v4i32_ty],
0227 [llvm_v8i16_ty, llvm_v8i16_ty],
0228 [IntrNoMem, IntrSpeculatable]>;
0229
0230 def int_wasm_narrow_signed :
0231 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0232 [llvm_anyvector_ty, LLVMMatchType<1>],
0233 [IntrNoMem, IntrSpeculatable]>;
0234 def int_wasm_narrow_unsigned :
0235 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0236 [llvm_anyvector_ty, LLVMMatchType<1>],
0237 [IntrNoMem, IntrSpeculatable]>;
0238
0239 def int_wasm_q15mulr_sat_signed :
0240 DefaultAttrsIntrinsic<[llvm_v8i16_ty],
0241 [llvm_v8i16_ty, llvm_v8i16_ty],
0242 [IntrNoMem, IntrSpeculatable]>;
0243
0244 def int_wasm_pmin :
0245 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0246 [LLVMMatchType<0>, LLVMMatchType<0>],
0247 [IntrNoMem, IntrSpeculatable]>;
0248 def int_wasm_pmax :
0249 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0250 [LLVMMatchType<0>, LLVMMatchType<0>],
0251 [IntrNoMem, IntrSpeculatable]>;
0252
0253 def int_wasm_extadd_pairwise_signed :
0254 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0255 [LLVMSubdivide2VectorType<0>],
0256 [IntrNoMem, IntrSpeculatable]>;
0257 def int_wasm_extadd_pairwise_unsigned :
0258 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0259 [LLVMSubdivide2VectorType<0>],
0260 [IntrNoMem, IntrSpeculatable]>;
0261
0262 //===----------------------------------------------------------------------===//
0263 // Relaxed SIMD intrinsics (experimental)
0264 //===----------------------------------------------------------------------===//
0265
0266 def int_wasm_relaxed_madd :
0267 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0268 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
0269 [IntrNoMem, IntrSpeculatable]>;
0270 def int_wasm_relaxed_nmadd :
0271 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0272 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
0273 [IntrNoMem, IntrSpeculatable]>;
0274
0275 def int_wasm_relaxed_laneselect :
0276 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0277 [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
0278 [IntrNoMem, IntrSpeculatable]>;
0279
0280 def int_wasm_relaxed_swizzle :
0281 DefaultAttrsIntrinsic<[llvm_v16i8_ty],
0282 [llvm_v16i8_ty, llvm_v16i8_ty],
0283 [IntrNoMem, IntrSpeculatable]>;
0284
0285 def int_wasm_relaxed_min :
0286 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0287 [LLVMMatchType<0>, LLVMMatchType<0>],
0288 [IntrNoMem, IntrSpeculatable]>;
0289 def int_wasm_relaxed_max :
0290 DefaultAttrsIntrinsic<[llvm_anyvector_ty],
0291 [LLVMMatchType<0>, LLVMMatchType<0>],
0292 [IntrNoMem, IntrSpeculatable]>;
0293
0294 def int_wasm_relaxed_trunc_signed:
0295 DefaultAttrsIntrinsic<[llvm_v4i32_ty],
0296 [llvm_v4f32_ty],
0297 [IntrNoMem, IntrSpeculatable]>;
0298
0299 def int_wasm_relaxed_trunc_unsigned:
0300 DefaultAttrsIntrinsic<[llvm_v4i32_ty],
0301 [llvm_v4f32_ty],
0302 [IntrNoMem, IntrSpeculatable]>;
0303
0304 def int_wasm_relaxed_trunc_signed_zero:
0305 DefaultAttrsIntrinsic<[llvm_v4i32_ty],
0306 [llvm_v2f64_ty],
0307 [IntrNoMem, IntrSpeculatable]>;
0308
0309 def int_wasm_relaxed_trunc_unsigned_zero:
0310 DefaultAttrsIntrinsic<[llvm_v4i32_ty],
0311 [llvm_v2f64_ty],
0312 [IntrNoMem, IntrSpeculatable]>;
0313
0314 def int_wasm_relaxed_q15mulr_signed:
0315 DefaultAttrsIntrinsic<[llvm_v8i16_ty],
0316 [llvm_v8i16_ty, llvm_v8i16_ty],
0317 [IntrNoMem, IntrSpeculatable]>;
0318
0319 def int_wasm_relaxed_dot_i8x16_i7x16_signed:
0320 DefaultAttrsIntrinsic<[llvm_v8i16_ty],
0321 [llvm_v16i8_ty, llvm_v16i8_ty],
0322 [IntrNoMem, IntrSpeculatable]>;
0323
0324 def int_wasm_relaxed_dot_i8x16_i7x16_add_signed:
0325 DefaultAttrsIntrinsic<[llvm_v4i32_ty],
0326 [llvm_v16i8_ty, llvm_v16i8_ty, llvm_v4i32_ty],
0327 [IntrNoMem, IntrSpeculatable]>;
0328
0329 def int_wasm_relaxed_dot_bf16x8_add_f32:
0330 DefaultAttrsIntrinsic<[llvm_v4f32_ty],
0331 [llvm_v8i16_ty, llvm_v8i16_ty, llvm_v4f32_ty],
0332 [IntrNoMem, IntrSpeculatable]>;
0333
0334 //===----------------------------------------------------------------------===//
0335 // Half-precision intrinsics (experimental)
0336 //===----------------------------------------------------------------------===//
0337
0338 // TODO: Replace these intrinsic with normal ISel patterns once the XXX
0339 // instructions are merged to the proposal.
0340 def int_wasm_loadf16_f32:
0341 DefaultAttrsIntrinsic<[llvm_float_ty],
0342 [llvm_ptr_ty],
0343 [IntrReadMem, IntrArgMemOnly],
0344 "", [SDNPMemOperand]>;
0345 def int_wasm_storef16_f32:
0346 Intrinsic<[],
0347 [llvm_float_ty, llvm_ptr_ty],
0348 [IntrWriteMem, IntrArgMemOnly],
0349 "", [SDNPMemOperand]>;
0350 def int_wasm_splat_f16x8:
0351 DefaultAttrsIntrinsic<[llvm_v8f16_ty],
0352 [llvm_float_ty],
0353 [IntrNoMem, IntrSpeculatable]>;
0354 def int_wasm_extract_lane_f16x8:
0355 DefaultAttrsIntrinsic<[llvm_float_ty],
0356 [llvm_v8f16_ty, llvm_i32_ty],
0357 [IntrNoMem, IntrSpeculatable]>;
0358 def int_wasm_replace_lane_f16x8:
0359 DefaultAttrsIntrinsic<[llvm_v8f16_ty],
0360 [llvm_v8f16_ty, llvm_i32_ty, llvm_float_ty],
0361 [IntrNoMem, IntrSpeculatable]>;
0362
0363
0364 //===----------------------------------------------------------------------===//
0365 // Thread-local storage intrinsics
0366 //===----------------------------------------------------------------------===//
0367
0368 def int_wasm_tls_size :
0369 DefaultAttrsIntrinsic<[llvm_anyint_ty],
0370 [],
0371 [IntrNoMem, IntrSpeculatable]>;
0372
0373 def int_wasm_tls_align :
0374 DefaultAttrsIntrinsic<[llvm_anyint_ty],
0375 [],
0376 [IntrNoMem, IntrSpeculatable]>;
0377
0378 def int_wasm_tls_base :
0379 DefaultAttrsIntrinsic<[llvm_ptr_ty],
0380 [],
0381 [IntrReadMem]>;
0382
0383 } // TargetPrefix = "wasm"
