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File indexing completed on 2026-05-10 08:43:36
0001 //===- SwiftErrorValueTracking.h - Track swifterror VReg vals --*- C++ -*--===// 0002 // 0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 0004 // See https://llvm.org/LICENSE.txt for license information. 0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 0006 // 0007 //===----------------------------------------------------------------------===// 0008 // 0009 // This implements a limited mem2reg-like analysis to promote uses of function 0010 // arguments and allocas marked with swiftalloc from memory into virtual 0011 // registers tracked by this class. 0012 // 0013 //===----------------------------------------------------------------------===// 0014 0015 #ifndef LLVM_CODEGEN_SWIFTERRORVALUETRACKING_H 0016 #define LLVM_CODEGEN_SWIFTERRORVALUETRACKING_H 0017 0018 #include "llvm/ADT/DenseMap.h" 0019 #include "llvm/ADT/SmallVector.h" 0020 #include "llvm/CodeGen/Register.h" 0021 #include "llvm/IR/BasicBlock.h" 0022 #include "llvm/IR/DebugLoc.h" 0023 #include <utility> 0024 0025 0026 namespace llvm { 0027 class Function; 0028 class MachineBasicBlock; 0029 class MachineFunction; 0030 class MachineInstr; 0031 class TargetInstrInfo; 0032 class TargetLowering; 0033 0034 class SwiftErrorValueTracking { 0035 // Some useful objects to reduce the number of function arguments needed. 0036 MachineFunction *MF; 0037 const Function *Fn; 0038 const TargetLowering *TLI; 0039 const TargetInstrInfo *TII; 0040 0041 /// A map from swifterror value in a basic block to the virtual register it is 0042 /// currently represented by. 0043 DenseMap<std::pair<const MachineBasicBlock *, const Value *>, Register> 0044 VRegDefMap; 0045 0046 /// A list of upward exposed vreg uses that need to be satisfied by either a 0047 /// copy def or a phi node at the beginning of the basic block representing 0048 /// the predecessor(s) swifterror value. 0049 DenseMap<std::pair<const MachineBasicBlock *, const Value *>, Register> 0050 VRegUpwardsUse; 0051 0052 /// A map from instructions that define/use a swifterror value to the virtual 0053 /// register that represents that def/use. 0054 llvm::DenseMap<PointerIntPair<const Instruction *, 1, bool>, Register> 0055 VRegDefUses; 0056 0057 /// The swifterror argument of the current function. 0058 const Value *SwiftErrorArg; 0059 0060 using SwiftErrorValues = SmallVector<const Value*, 1>; 0061 /// A function can only have a single swifterror argument. And if it does 0062 /// have a swifterror argument, it must be the first entry in 0063 /// SwiftErrorVals. 0064 SwiftErrorValues SwiftErrorVals; 0065 0066 public: 0067 /// Initialize data structures for specified new function. 0068 void setFunction(MachineFunction &MF); 0069 0070 /// Get the (unique) function argument that was marked swifterror, or nullptr 0071 /// if this function has no swifterror args. 0072 const Value *getFunctionArg() const { 0073 return SwiftErrorArg; 0074 } 0075 0076 /// Get or create the swifterror value virtual register in 0077 /// VRegDefMap for this basic block. 0078 Register getOrCreateVReg(const MachineBasicBlock *, const Value *); 0079 0080 /// Set the swifterror virtual register in the VRegDefMap for this 0081 /// basic block. 0082 void setCurrentVReg(const MachineBasicBlock *MBB, const Value *, Register); 0083 0084 /// Get or create the swifterror value virtual register for a def of a 0085 /// swifterror by an instruction. 0086 Register getOrCreateVRegDefAt(const Instruction *, const MachineBasicBlock *, 0087 const Value *); 0088 0089 /// Get or create the swifterror value virtual register for a use of a 0090 /// swifterror by an instruction. 0091 Register getOrCreateVRegUseAt(const Instruction *, const MachineBasicBlock *, 0092 const Value *); 0093 0094 /// Create initial definitions of swifterror values in the entry block of the 0095 /// current function. 0096 bool createEntriesInEntryBlock(DebugLoc DbgLoc); 0097 0098 /// Propagate assigned swifterror vregs through a function, synthesizing PHI 0099 /// nodes when needed to maintain consistency. 0100 void propagateVRegs(); 0101 0102 void preassignVRegs(MachineBasicBlock *MBB, BasicBlock::const_iterator Begin, 0103 BasicBlock::const_iterator End); 0104 }; 0105 0106 } 0107 0108 #endif
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