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0001 //===- RegisterPressure.h - Dynamic Register Pressure -----------*- C++ -*-===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 //
0009 // This file defines the RegisterPressure class which can be used to track
0010 // MachineInstr level register pressure.
0011 //
0012 //===----------------------------------------------------------------------===//
0013 
0014 #ifndef LLVM_CODEGEN_REGISTERPRESSURE_H
0015 #define LLVM_CODEGEN_REGISTERPRESSURE_H
0016 
0017 #include "llvm/ADT/ArrayRef.h"
0018 #include "llvm/ADT/SmallVector.h"
0019 #include "llvm/ADT/SparseSet.h"
0020 #include "llvm/CodeGen/MachineBasicBlock.h"
0021 #include "llvm/CodeGen/SlotIndexes.h"
0022 #include "llvm/CodeGen/TargetRegisterInfo.h"
0023 #include "llvm/MC/LaneBitmask.h"
0024 #include <cassert>
0025 #include <cstdint>
0026 #include <cstdlib>
0027 #include <limits>
0028 #include <vector>
0029 
0030 namespace llvm {
0031 
0032 class LiveIntervals;
0033 class MachineFunction;
0034 class MachineInstr;
0035 class MachineRegisterInfo;
0036 class RegisterClassInfo;
0037 
0038 struct VRegMaskOrUnit {
0039   Register RegUnit; ///< Virtual register or register unit.
0040   LaneBitmask LaneMask;
0041 
0042   VRegMaskOrUnit(Register RegUnit, LaneBitmask LaneMask)
0043       : RegUnit(RegUnit), LaneMask(LaneMask) {}
0044 };
0045 
0046 /// Base class for register pressure results.
0047 struct RegisterPressure {
0048   /// Map of max reg pressure indexed by pressure set ID, not class ID.
0049   std::vector<unsigned> MaxSetPressure;
0050 
0051   /// List of live in virtual registers or physical register units.
0052   SmallVector<VRegMaskOrUnit, 8> LiveInRegs;
0053   SmallVector<VRegMaskOrUnit, 8> LiveOutRegs;
0054 
0055   void dump(const TargetRegisterInfo *TRI) const;
0056 };
0057 
0058 /// RegisterPressure computed within a region of instructions delimited by
0059 /// TopIdx and BottomIdx.  During pressure computation, the maximum pressure per
0060 /// register pressure set is increased. Once pressure within a region is fully
0061 /// computed, the live-in and live-out sets are recorded.
0062 ///
0063 /// This is preferable to RegionPressure when LiveIntervals are available,
0064 /// because delimiting regions by SlotIndex is more robust and convenient than
0065 /// holding block iterators. The block contents can change without invalidating
0066 /// the pressure result.
0067 struct IntervalPressure : RegisterPressure {
0068   /// Record the boundary of the region being tracked.
0069   SlotIndex TopIdx;
0070   SlotIndex BottomIdx;
0071 
0072   void reset();
0073 
0074   void openTop(SlotIndex NextTop);
0075 
0076   void openBottom(SlotIndex PrevBottom);
0077 };
0078 
0079 /// RegisterPressure computed within a region of instructions delimited by
0080 /// TopPos and BottomPos. This is a less precise version of IntervalPressure for
0081 /// use when LiveIntervals are unavailable.
0082 struct RegionPressure : RegisterPressure {
0083   /// Record the boundary of the region being tracked.
0084   MachineBasicBlock::const_iterator TopPos;
0085   MachineBasicBlock::const_iterator BottomPos;
0086 
0087   void reset();
0088 
0089   void openTop(MachineBasicBlock::const_iterator PrevTop);
0090 
0091   void openBottom(MachineBasicBlock::const_iterator PrevBottom);
0092 };
0093 
0094 /// Capture a change in pressure for a single pressure set. UnitInc may be
0095 /// expressed in terms of upward or downward pressure depending on the client
0096 /// and will be dynamically adjusted for current liveness.
0097 ///
0098 /// Pressure increments are tiny, typically 1-2 units, and this is only for
0099 /// heuristics, so we don't check UnitInc overflow. Instead, we may have a
0100 /// higher level assert that pressure is consistent within a region. We also
0101 /// effectively ignore dead defs which don't affect heuristics much.
0102 class PressureChange {
0103   uint16_t PSetID = 0; // ID+1. 0=Invalid.
0104   int16_t UnitInc = 0;
0105 
0106 public:
0107   PressureChange() = default;
0108   PressureChange(unsigned id): PSetID(id + 1) {
0109     assert(id < std::numeric_limits<uint16_t>::max() && "PSetID overflow.");
0110   }
0111 
0112   bool isValid() const { return PSetID > 0; }
0113 
0114   unsigned getPSet() const {
0115     assert(isValid() && "invalid PressureChange");
0116     return PSetID - 1;
0117   }
0118 
0119   // If PSetID is invalid, return UINT16_MAX to give it lowest priority.
0120   unsigned getPSetOrMax() const {
0121     return (PSetID - 1) & std::numeric_limits<uint16_t>::max();
0122   }
0123 
0124   int getUnitInc() const { return UnitInc; }
0125 
0126   void setUnitInc(int Inc) { UnitInc = Inc; }
0127 
0128   bool operator==(const PressureChange &RHS) const {
0129     return PSetID == RHS.PSetID && UnitInc == RHS.UnitInc;
0130   }
0131 
0132   void dump() const;
0133 };
0134 
0135 /// List of PressureChanges in order of increasing, unique PSetID.
0136 ///
0137 /// Use a small fixed number, because we can fit more PressureChanges in an
0138 /// empty SmallVector than ever need to be tracked per register class. If more
0139 /// PSets are affected, then we only track the most constrained.
0140 class PressureDiff {
0141   // The initial design was for MaxPSets=4, but that requires PSet partitions,
0142   // which are not yet implemented. (PSet partitions are equivalent PSets given
0143   // the register classes actually in use within the scheduling region.)
0144   enum { MaxPSets = 16 };
0145 
0146   PressureChange PressureChanges[MaxPSets];
0147 
0148   using iterator = PressureChange *;
0149 
0150   iterator nonconst_begin() { return &PressureChanges[0]; }
0151   iterator nonconst_end() { return &PressureChanges[MaxPSets]; }
0152 
0153 public:
0154   using const_iterator = const PressureChange *;
0155 
0156   const_iterator begin() const { return &PressureChanges[0]; }
0157   const_iterator end() const { return &PressureChanges[MaxPSets]; }
0158 
0159   void addPressureChange(Register RegUnit, bool IsDec,
0160                          const MachineRegisterInfo *MRI);
0161 
0162   void dump(const TargetRegisterInfo &TRI) const;
0163 };
0164 
0165 /// List of registers defined and used by a machine instruction.
0166 class RegisterOperands {
0167 public:
0168   /// List of virtual registers and register units read by the instruction.
0169   SmallVector<VRegMaskOrUnit, 8> Uses;
0170   /// List of virtual registers and register units defined by the
0171   /// instruction which are not dead.
0172   SmallVector<VRegMaskOrUnit, 8> Defs;
0173   /// List of virtual registers and register units defined by the
0174   /// instruction but dead.
0175   SmallVector<VRegMaskOrUnit, 8> DeadDefs;
0176 
0177   /// Analyze the given instruction \p MI and fill in the Uses, Defs and
0178   /// DeadDefs list based on the MachineOperand flags.
0179   void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI,
0180                const MachineRegisterInfo &MRI, bool TrackLaneMasks,
0181                bool IgnoreDead);
0182 
0183   /// Use liveness information to find dead defs not marked with a dead flag
0184   /// and move them to the DeadDefs vector.
0185   void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS);
0186 
0187   /// Use liveness information to find out which uses/defs are partially
0188   /// undefined/dead and adjust the VRegMaskOrUnits accordingly.
0189   /// If \p AddFlagsMI is given then missing read-undef and dead flags will be
0190   /// added to the instruction.
0191   void adjustLaneLiveness(const LiveIntervals &LIS,
0192                           const MachineRegisterInfo &MRI, SlotIndex Pos,
0193                           MachineInstr *AddFlagsMI = nullptr);
0194 };
0195 
0196 /// Array of PressureDiffs.
0197 class PressureDiffs {
0198   PressureDiff *PDiffArray = nullptr;
0199   unsigned Size = 0;
0200   unsigned Max = 0;
0201 
0202 public:
0203   PressureDiffs() = default;
0204   PressureDiffs &operator=(const PressureDiffs &other) = delete;
0205   PressureDiffs(const PressureDiffs &other) = delete;
0206   ~PressureDiffs() { free(PDiffArray); }
0207 
0208   void clear() { Size = 0; }
0209 
0210   void init(unsigned N);
0211 
0212   PressureDiff &operator[](unsigned Idx) {
0213     assert(Idx < Size && "PressureDiff index out of bounds");
0214     return PDiffArray[Idx];
0215   }
0216   const PressureDiff &operator[](unsigned Idx) const {
0217     return const_cast<PressureDiffs*>(this)->operator[](Idx);
0218   }
0219 
0220   /// Record pressure difference induced by the given operand list to
0221   /// node with index \p Idx.
0222   void addInstruction(unsigned Idx, const RegisterOperands &RegOpers,
0223                       const MachineRegisterInfo &MRI);
0224 };
0225 
0226 /// Store the effects of a change in pressure on things that MI scheduler cares
0227 /// about.
0228 ///
0229 /// Excess records the value of the largest difference in register units beyond
0230 /// the target's pressure limits across the affected pressure sets, where
0231 /// largest is defined as the absolute value of the difference. Negative
0232 /// ExcessUnits indicates a reduction in pressure that had already exceeded the
0233 /// target's limits.
0234 ///
0235 /// CriticalMax records the largest increase in the tracker's max pressure that
0236 /// exceeds the critical limit for some pressure set determined by the client.
0237 ///
0238 /// CurrentMax records the largest increase in the tracker's max pressure that
0239 /// exceeds the current limit for some pressure set determined by the client.
0240 struct RegPressureDelta {
0241   PressureChange Excess;
0242   PressureChange CriticalMax;
0243   PressureChange CurrentMax;
0244 
0245   RegPressureDelta() = default;
0246 
0247   bool operator==(const RegPressureDelta &RHS) const {
0248     return Excess == RHS.Excess && CriticalMax == RHS.CriticalMax
0249       && CurrentMax == RHS.CurrentMax;
0250   }
0251   bool operator!=(const RegPressureDelta &RHS) const {
0252     return !operator==(RHS);
0253   }
0254   void dump() const;
0255 };
0256 
0257 /// A set of live virtual registers and physical register units.
0258 ///
0259 /// This is a wrapper around a SparseSet which deals with mapping register unit
0260 /// and virtual register indexes to an index usable by the sparse set.
0261 class LiveRegSet {
0262 private:
0263   struct IndexMaskPair {
0264     unsigned Index;
0265     LaneBitmask LaneMask;
0266 
0267     IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
0268         : Index(Index), LaneMask(LaneMask) {}
0269 
0270     unsigned getSparseSetIndex() const {
0271       return Index;
0272     }
0273   };
0274 
0275   using RegSet = SparseSet<IndexMaskPair>;
0276   RegSet Regs;
0277   unsigned NumRegUnits = 0u;
0278 
0279   unsigned getSparseIndexFromReg(Register Reg) const {
0280     if (Reg.isVirtual())
0281       return Register::virtReg2Index(Reg) + NumRegUnits;
0282     assert(Reg < NumRegUnits);
0283     return Reg;
0284   }
0285 
0286   Register getRegFromSparseIndex(unsigned SparseIndex) const {
0287     if (SparseIndex >= NumRegUnits)
0288       return Register::index2VirtReg(SparseIndex - NumRegUnits);
0289     return Register(SparseIndex);
0290   }
0291 
0292 public:
0293   void clear();
0294   void init(const MachineRegisterInfo &MRI);
0295 
0296   LaneBitmask contains(Register Reg) const {
0297     unsigned SparseIndex = getSparseIndexFromReg(Reg);
0298     RegSet::const_iterator I = Regs.find(SparseIndex);
0299     if (I == Regs.end())
0300       return LaneBitmask::getNone();
0301     return I->LaneMask;
0302   }
0303 
0304   /// Mark the \p Pair.LaneMask lanes of \p Pair.Reg as live.
0305   /// Returns the previously live lanes of \p Pair.Reg.
0306   LaneBitmask insert(VRegMaskOrUnit Pair) {
0307     unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
0308     auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask));
0309     if (!InsertRes.second) {
0310       LaneBitmask PrevMask = InsertRes.first->LaneMask;
0311       InsertRes.first->LaneMask |= Pair.LaneMask;
0312       return PrevMask;
0313     }
0314     return LaneBitmask::getNone();
0315   }
0316 
0317   /// Clears the \p Pair.LaneMask lanes of \p Pair.Reg (mark them as dead).
0318   /// Returns the previously live lanes of \p Pair.Reg.
0319   LaneBitmask erase(VRegMaskOrUnit Pair) {
0320     unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
0321     RegSet::iterator I = Regs.find(SparseIndex);
0322     if (I == Regs.end())
0323       return LaneBitmask::getNone();
0324     LaneBitmask PrevMask = I->LaneMask;
0325     I->LaneMask &= ~Pair.LaneMask;
0326     return PrevMask;
0327   }
0328 
0329   size_t size() const {
0330     return Regs.size();
0331   }
0332 
0333   void appendTo(SmallVectorImpl<VRegMaskOrUnit> &To) const {
0334     for (const IndexMaskPair &P : Regs) {
0335       Register Reg = getRegFromSparseIndex(P.Index);
0336       if (P.LaneMask.any())
0337         To.emplace_back(Reg, P.LaneMask);
0338     }
0339   }
0340 };
0341 
0342 /// Track the current register pressure at some position in the instruction
0343 /// stream, and remember the high water mark within the region traversed. This
0344 /// does not automatically consider live-through ranges. The client may
0345 /// independently adjust for global liveness.
0346 ///
0347 /// Each RegPressureTracker only works within a MachineBasicBlock. Pressure can
0348 /// be tracked across a larger region by storing a RegisterPressure result at
0349 /// each block boundary and explicitly adjusting pressure to account for block
0350 /// live-in and live-out register sets.
0351 ///
0352 /// RegPressureTracker holds a reference to a RegisterPressure result that it
0353 /// computes incrementally. During downward tracking, P.BottomIdx or P.BottomPos
0354 /// is invalid until it reaches the end of the block or closeRegion() is
0355 /// explicitly called. Similarly, P.TopIdx is invalid during upward
0356 /// tracking. Changing direction has the side effect of closing region, and
0357 /// traversing past TopIdx or BottomIdx reopens it.
0358 class RegPressureTracker {
0359   const MachineFunction *MF = nullptr;
0360   const TargetRegisterInfo *TRI = nullptr;
0361   const RegisterClassInfo *RCI = nullptr;
0362   const MachineRegisterInfo *MRI = nullptr;
0363   const LiveIntervals *LIS = nullptr;
0364 
0365   /// We currently only allow pressure tracking within a block.
0366   const MachineBasicBlock *MBB = nullptr;
0367 
0368   /// Track the max pressure within the region traversed so far.
0369   RegisterPressure &P;
0370 
0371   /// Run in two modes dependending on whether constructed with IntervalPressure
0372   /// or RegisterPressure. If requireIntervals is false, LIS are ignored.
0373   bool RequireIntervals;
0374 
0375   /// True if UntiedDefs will be populated.
0376   bool TrackUntiedDefs = false;
0377 
0378   /// True if lanemasks should be tracked.
0379   bool TrackLaneMasks = false;
0380 
0381   /// Register pressure corresponds to liveness before this instruction
0382   /// iterator. It may point to the end of the block or a DebugValue rather than
0383   /// an instruction.
0384   MachineBasicBlock::const_iterator CurrPos;
0385 
0386   /// Pressure map indexed by pressure set ID, not class ID.
0387   std::vector<unsigned> CurrSetPressure;
0388 
0389   /// Set of live registers.
0390   LiveRegSet LiveRegs;
0391 
0392   /// Set of vreg defs that start a live range.
0393   SparseSet<Register, VirtReg2IndexFunctor> UntiedDefs;
0394   /// Live-through pressure.
0395   std::vector<unsigned> LiveThruPressure;
0396 
0397 public:
0398   RegPressureTracker(IntervalPressure &rp) : P(rp), RequireIntervals(true) {}
0399   RegPressureTracker(RegionPressure &rp) : P(rp), RequireIntervals(false) {}
0400 
0401   void reset();
0402 
0403   void init(const MachineFunction *mf, const RegisterClassInfo *rci,
0404             const LiveIntervals *lis, const MachineBasicBlock *mbb,
0405             MachineBasicBlock::const_iterator pos,
0406             bool TrackLaneMasks, bool TrackUntiedDefs);
0407 
0408   /// Force liveness of virtual registers or physical register
0409   /// units. Particularly useful to initialize the livein/out state of the
0410   /// tracker before the first call to advance/recede.
0411   void addLiveRegs(ArrayRef<VRegMaskOrUnit> Regs);
0412 
0413   /// Get the MI position corresponding to this register pressure.
0414   MachineBasicBlock::const_iterator getPos() const { return CurrPos; }
0415 
0416   // Reset the MI position corresponding to the register pressure. This allows
0417   // schedulers to move instructions above the RegPressureTracker's
0418   // CurrPos. Since the pressure is computed before CurrPos, the iterator
0419   // position changes while pressure does not.
0420   void setPos(MachineBasicBlock::const_iterator Pos) { CurrPos = Pos; }
0421 
0422   /// Recede across the previous instruction.
0423   void recede(SmallVectorImpl<VRegMaskOrUnit> *LiveUses = nullptr);
0424 
0425   /// Recede across the previous instruction.
0426   /// This "low-level" variant assumes that recedeSkipDebugValues() was
0427   /// called previously and takes precomputed RegisterOperands for the
0428   /// instruction.
0429   void recede(const RegisterOperands &RegOpers,
0430               SmallVectorImpl<VRegMaskOrUnit> *LiveUses = nullptr);
0431 
0432   /// Recede until we find an instruction which is not a DebugValue.
0433   void recedeSkipDebugValues();
0434 
0435   /// Advance across the current instruction.
0436   void advance();
0437 
0438   /// Advance across the current instruction.
0439   /// This is a "low-level" variant of advance() which takes precomputed
0440   /// RegisterOperands of the instruction.
0441   void advance(const RegisterOperands &RegOpers);
0442 
0443   /// Finalize the region boundaries and recored live ins and live outs.
0444   void closeRegion();
0445 
0446   /// Initialize the LiveThru pressure set based on the untied defs found in
0447   /// RPTracker.
0448   void initLiveThru(const RegPressureTracker &RPTracker);
0449 
0450   /// Copy an existing live thru pressure result.
0451   void initLiveThru(ArrayRef<unsigned> PressureSet) {
0452     LiveThruPressure.assign(PressureSet.begin(), PressureSet.end());
0453   }
0454 
0455   ArrayRef<unsigned> getLiveThru() const { return LiveThruPressure; }
0456 
0457   /// Get the resulting register pressure over the traversed region.
0458   /// This result is complete if closeRegion() was explicitly invoked.
0459   RegisterPressure &getPressure() { return P; }
0460   const RegisterPressure &getPressure() const { return P; }
0461 
0462   /// Get the register set pressure at the current position, which may be less
0463   /// than the pressure across the traversed region.
0464   const std::vector<unsigned> &getRegSetPressureAtPos() const {
0465     return CurrSetPressure;
0466   }
0467 
0468   bool isTopClosed() const;
0469   bool isBottomClosed() const;
0470 
0471   void closeTop();
0472   void closeBottom();
0473 
0474   /// Consider the pressure increase caused by traversing this instruction
0475   /// bottom-up. Find the pressure set with the most change beyond its pressure
0476   /// limit based on the tracker's current pressure, and record the number of
0477   /// excess register units of that pressure set introduced by this instruction.
0478   void getMaxUpwardPressureDelta(const MachineInstr *MI,
0479                                  PressureDiff *PDiff,
0480                                  RegPressureDelta &Delta,
0481                                  ArrayRef<PressureChange> CriticalPSets,
0482                                  ArrayRef<unsigned> MaxPressureLimit);
0483 
0484   void getUpwardPressureDelta(const MachineInstr *MI,
0485                               /*const*/ PressureDiff &PDiff,
0486                               RegPressureDelta &Delta,
0487                               ArrayRef<PressureChange> CriticalPSets,
0488                               ArrayRef<unsigned> MaxPressureLimit) const;
0489 
0490   /// Consider the pressure increase caused by traversing this instruction
0491   /// top-down. Find the pressure set with the most change beyond its pressure
0492   /// limit based on the tracker's current pressure, and record the number of
0493   /// excess register units of that pressure set introduced by this instruction.
0494   void getMaxDownwardPressureDelta(const MachineInstr *MI,
0495                                    RegPressureDelta &Delta,
0496                                    ArrayRef<PressureChange> CriticalPSets,
0497                                    ArrayRef<unsigned> MaxPressureLimit);
0498 
0499   /// Find the pressure set with the most change beyond its pressure limit after
0500   /// traversing this instruction either upward or downward depending on the
0501   /// closed end of the current region.
0502   void getMaxPressureDelta(const MachineInstr *MI,
0503                            RegPressureDelta &Delta,
0504                            ArrayRef<PressureChange> CriticalPSets,
0505                            ArrayRef<unsigned> MaxPressureLimit) {
0506     if (isTopClosed())
0507       return getMaxDownwardPressureDelta(MI, Delta, CriticalPSets,
0508                                          MaxPressureLimit);
0509 
0510     assert(isBottomClosed() && "Uninitialized pressure tracker");
0511     return getMaxUpwardPressureDelta(MI, nullptr, Delta, CriticalPSets,
0512                                      MaxPressureLimit);
0513   }
0514 
0515   /// Get the pressure of each PSet after traversing this instruction bottom-up.
0516   void getUpwardPressure(const MachineInstr *MI,
0517                          std::vector<unsigned> &PressureResult,
0518                          std::vector<unsigned> &MaxPressureResult);
0519 
0520   /// Get the pressure of each PSet after traversing this instruction top-down.
0521   void getDownwardPressure(const MachineInstr *MI,
0522                            std::vector<unsigned> &PressureResult,
0523                            std::vector<unsigned> &MaxPressureResult);
0524 
0525   void getPressureAfterInst(const MachineInstr *MI,
0526                             std::vector<unsigned> &PressureResult,
0527                             std::vector<unsigned> &MaxPressureResult) {
0528     if (isTopClosed())
0529       return getUpwardPressure(MI, PressureResult, MaxPressureResult);
0530 
0531     assert(isBottomClosed() && "Uninitialized pressure tracker");
0532     return getDownwardPressure(MI, PressureResult, MaxPressureResult);
0533   }
0534 
0535   bool hasUntiedDef(Register VirtReg) const {
0536     return UntiedDefs.count(VirtReg);
0537   }
0538 
0539   void dump() const;
0540 
0541   void increaseRegPressure(Register RegUnit, LaneBitmask PreviousMask,
0542                            LaneBitmask NewMask);
0543   void decreaseRegPressure(Register RegUnit, LaneBitmask PreviousMask,
0544                            LaneBitmask NewMask);
0545 
0546 protected:
0547   /// Add Reg to the live out set and increase max pressure.
0548   void discoverLiveOut(VRegMaskOrUnit Pair);
0549   /// Add Reg to the live in set and increase max pressure.
0550   void discoverLiveIn(VRegMaskOrUnit Pair);
0551 
0552   /// Get the SlotIndex for the first nondebug instruction including or
0553   /// after the current position.
0554   SlotIndex getCurrSlot() const;
0555 
0556   void bumpDeadDefs(ArrayRef<VRegMaskOrUnit> DeadDefs);
0557 
0558   void bumpUpwardPressure(const MachineInstr *MI);
0559   void bumpDownwardPressure(const MachineInstr *MI);
0560 
0561   void discoverLiveInOrOut(VRegMaskOrUnit Pair,
0562                            SmallVectorImpl<VRegMaskOrUnit> &LiveInOrOut);
0563 
0564   LaneBitmask getLastUsedLanes(Register RegUnit, SlotIndex Pos) const;
0565   LaneBitmask getLiveLanesAt(Register RegUnit, SlotIndex Pos) const;
0566   LaneBitmask getLiveThroughAt(Register RegUnit, SlotIndex Pos) const;
0567 };
0568 
0569 void dumpRegSetPressure(ArrayRef<unsigned> SetPressure,
0570                         const TargetRegisterInfo *TRI);
0571 
0572 } // end namespace llvm
0573 
0574 #endif // LLVM_CODEGEN_REGISTERPRESSURE_H