llvm/CodeGen/RegisterBank.h

0001 //==-- llvm/CodeGen/RegisterBank.h - Register Bank ---------------*- C++ -*-==//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 //
0009 /// \file This file declares the API of register banks.
0010 //
0011 //===----------------------------------------------------------------------===//
0012
0013 #ifndef LLVM_CODEGEN_REGISTERBANK_H
0014 #define LLVM_CODEGEN_REGISTERBANK_H
0015
0016 #include <cstdint>
0017
0018 namespace llvm {
0019 // Forward declarations.
0020 class RegisterBankInfo;
0021 class raw_ostream;
0022 class TargetRegisterClass;
0023 class TargetRegisterInfo;
0024
0025 /// This class implements the register bank concept.
0026 /// Two instances of RegisterBank must have different ID.
0027 /// This property is enforced by the RegisterBankInfo class.
0028 class RegisterBank {
0029 private:
0030   unsigned ID;
0031   unsigned NumRegClasses;
0032   const char *Name;
0033   const uint32_t *CoveredClasses;
0034
0035   /// Only the RegisterBankInfo can initialize RegisterBank properly.
0036   friend RegisterBankInfo;
0037
0038 public:
0039   constexpr RegisterBank(unsigned ID, const char *Name,
0040                          const uint32_t *CoveredClasses, unsigned NumRegClasses)
0041       : ID(ID), NumRegClasses(NumRegClasses), Name(Name),
0042         CoveredClasses(CoveredClasses) {}
0043
0044   /// Get the identifier of this register bank.
0045   unsigned getID() const { return ID; }
0046
0047   /// Get a user friendly name of this register bank.
0048   /// Should be used only for debugging purposes.
0049   const char *getName() const { return Name; }
0050
0051   /// Check if this register bank is valid. In other words,
0052   /// if it has been properly constructed.
0053   ///
0054   /// \note This method does not check anything when assertions are disabled.
0055   ///
0056   /// \return True is the check was successful.
0057   bool verify(const RegisterBankInfo &RBI, const TargetRegisterInfo &TRI) const;
0058
0059   /// Check whether this register bank covers \p RC.
0060   /// In other words, check if this register bank fully covers
0061   /// the registers that \p RC contains.
0062   bool covers(const TargetRegisterClass &RC) const;
0063
0064   /// Check whether \p OtherRB is the same as this.
0065   bool operator==(const RegisterBank &OtherRB) const;
0066   bool operator!=(const RegisterBank &OtherRB) const {
0067     return !this->operator==(OtherRB);
0068   }
0069
0070   /// Dump the register mask on dbgs() stream.
0071   /// The dump is verbose.
0072   void dump(const TargetRegisterInfo *TRI = nullptr) const;
0073
0074   /// Print the register mask on OS.
0075   /// If IsForDebug is false, then only the name of the register bank
0076   /// is printed. Otherwise, all the fields are printing.
0077   /// TRI is then used to print the name of the register classes that
0078   /// this register bank covers.
0079   void print(raw_ostream &OS, bool IsForDebug = false,
0080              const TargetRegisterInfo *TRI = nullptr) const;
0081 };
0082
0083 inline raw_ostream &operator<<(raw_ostream &OS, const RegisterBank &RegBank) {
0084   RegBank.print(OS);
0085   return OS;
0086 }
0087 } // End namespace llvm.
0088
0089 #endif