CodeGen/GlobalISel/InlineAsmLowering.h

0001 //===- llvm/CodeGen/GlobalISel/InlineAsmLowering.h --------------*- C++ -*-===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 ///
0009 /// \file
0010 /// This file describes how to lower LLVM inline asm to machine code INLINEASM.
0011 ///
0012 //===----------------------------------------------------------------------===//
0013
0014 #ifndef LLVM_CODEGEN_GLOBALISEL_INLINEASMLOWERING_H
0015 #define LLVM_CODEGEN_GLOBALISEL_INLINEASMLOWERING_H
0016
0017 #include "llvm/ADT/ArrayRef.h"
0018 #include <functional>
0019
0020 namespace llvm {
0021 class CallBase;
0022 class MachineIRBuilder;
0023 class MachineOperand;
0024 class Register;
0025 class TargetLowering;
0026 class Value;
0027
0028 class InlineAsmLowering {
0029   const TargetLowering *TLI;
0030
0031   virtual void anchor();
0032
0033 public:
0034   /// Lower the given inline asm call instruction
0035   /// \p GetOrCreateVRegs is a callback to materialize a register for the
0036   /// input and output operands of the inline asm
0037   /// \return True if the lowering succeeds, false otherwise.
0038   bool lowerInlineAsm(MachineIRBuilder &MIRBuilder, const CallBase &CB,
0039                       std::function<ArrayRef<Register>(const Value &Val)>
0040                           GetOrCreateVRegs) const;
0041
0042   /// Lower the specified operand into the Ops vector.
0043   /// \p Val is the IR input value to be lowered
0044   /// \p Constraint is the user supplied constraint string
0045   /// \p Ops is the vector to be filled with the lowered operands
0046   /// \return True if the lowering succeeds, false otherwise.
0047   virtual bool lowerAsmOperandForConstraint(Value *Val, StringRef Constraint,
0048                                             std::vector<MachineOperand> &Ops,
0049                                             MachineIRBuilder &MIRBuilder) const;
0050
0051 protected:
0052   /// Getter for generic TargetLowering class.
0053   const TargetLowering *getTLI() const { return TLI; }
0054
0055   /// Getter for target specific TargetLowering class.
0056   template <class XXXTargetLowering> const XXXTargetLowering *getTLI() const {
0057     return static_cast<const XXXTargetLowering *>(TLI);
0058   }
0059
0060 public:
0061   InlineAsmLowering(const TargetLowering *TLI) : TLI(TLI) {}
0062   virtual ~InlineAsmLowering() = default;
0063 };
0064
0065 } // end namespace llvm
0066
0067 #endif // LLVM_CODEGEN_GLOBALISEL_INLINEASMLOWERING_H