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File indexing completed on 2026-05-10 08:43:23
0001 //===- llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h -----------*- C++ -*-===// 0002 // 0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 0004 // See https://llvm.org/LICENSE.txt for license information. 0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 0006 // 0007 //===----------------------------------------------------------------------===// 0008 // 0009 /// \file This file declares the GIMatchTableExecutor API, the opcodes supported 0010 /// by the match table, and some associated data structures used by the 0011 /// executor's implementation (see `GIMatchTableExecutorImpl.h`). 0012 // 0013 //===----------------------------------------------------------------------===// 0014 0015 #ifndef LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H 0016 #define LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H 0017 0018 #include "llvm/ADT/ArrayRef.h" 0019 #include "llvm/ADT/Bitset.h" 0020 #include "llvm/ADT/DenseMap.h" 0021 #include "llvm/ADT/SmallVector.h" 0022 #include "llvm/CodeGen/GlobalISel/Utils.h" 0023 #include "llvm/CodeGen/MachineFunction.h" 0024 #include "llvm/CodeGen/MachineInstr.h" 0025 #include "llvm/CodeGenTypes/LowLevelType.h" 0026 #include "llvm/IR/Function.h" 0027 #include "llvm/Transforms/Utils/SizeOpts.h" 0028 #include <bitset> 0029 #include <cstddef> 0030 #include <cstdint> 0031 #include <functional> 0032 #include <initializer_list> 0033 #include <optional> 0034 #include <vector> 0035 0036 namespace llvm { 0037 0038 class BlockFrequencyInfo; 0039 class CodeGenCoverage; 0040 class MachineBasicBlock; 0041 class ProfileSummaryInfo; 0042 class APInt; 0043 class APFloat; 0044 class GISelKnownBits; 0045 class MachineInstr; 0046 class MachineIRBuilder; 0047 class MachineInstrBuilder; 0048 class MachineFunction; 0049 class MachineOperand; 0050 class MachineRegisterInfo; 0051 class RegisterBankInfo; 0052 class TargetInstrInfo; 0053 class TargetRegisterInfo; 0054 0055 enum { 0056 GICXXPred_Invalid = 0, 0057 GICXXCustomAction_Invalid = 0, 0058 }; 0059 0060 /// The MatchTable is encoded as an array of bytes. 0061 /// Thus, opcodes are expected to be <255. 0062 /// 0063 /// Operands can be variable-sized, their size is always after their name 0064 /// in the docs, e.g. "Foo(4)" means that "Foo" takes 4 entries in the table, 0065 /// so 4 bytes. "Foo()" 0066 /// 0067 /// As a general rule of thumb: 0068 /// - Instruction & Operand IDs are ULEB128 0069 /// - LLT IDs are 1 byte 0070 /// - Predicates and target opcodes, register and register class IDs are 2 0071 /// bytes. 0072 /// - Indexes into the table are 4 bytes. 0073 /// - Inline constants are 8 bytes 0074 /// 0075 /// Design notes: 0076 /// - Inst/Op IDs have to be LEB128 because some targets generate 0077 /// extremely long patterns which need more than 255 temporaries. 0078 /// We could just use 2 bytes everytime, but then some targets like 0079 /// X86/AMDGPU that have no need for it will pay the price all the time. 0080 enum { 0081 /// Begin a try-block to attempt a match and jump to OnFail if it is 0082 /// unsuccessful. 0083 /// - OnFail(4) - The MatchTable entry at which to resume if the match fails. 0084 /// 0085 /// FIXME: This ought to take an argument indicating the number of try-blocks 0086 /// to exit on failure. It's usually one but the last match attempt of 0087 /// a block will need more. The (implemented) alternative is to tack a 0088 /// GIM_Reject on the end of each try-block which is simpler but 0089 /// requires an extra opcode and iteration in the interpreter on each 0090 /// failed match. 0091 GIM_Try, 0092 0093 /// Switch over the opcode on the specified instruction 0094 /// - InsnID(ULEB128) - Instruction ID 0095 /// - LowerBound(2) - numerically minimum opcode supported 0096 /// - UpperBound(2) - numerically maximum + 1 opcode supported 0097 /// - Default(4) - failure jump target 0098 /// - JumpTable(4)... - (UpperBound - LowerBound) (at least 2) jump targets 0099 GIM_SwitchOpcode, 0100 0101 /// Switch over the LLT on the specified instruction operand 0102 /// - InsnID(ULEB128) - Instruction ID 0103 /// - OpIdx(ULEB128) - Operand index 0104 /// - LowerBound(2) - numerically minimum Type ID supported 0105 /// - UpperBound(2) - numerically maximum + 1 Type ID supported 0106 /// - Default(4) - failure jump target 0107 /// - JumpTable(4)... - (UpperBound - LowerBound) (at least 2) jump targets 0108 GIM_SwitchType, 0109 0110 /// Record the specified instruction. 0111 /// The IgnoreCopies variant ignores COPY instructions. 0112 /// - NewInsnID(ULEB128) - Instruction ID to define 0113 /// - InsnID(ULEB128) - Instruction ID 0114 /// - OpIdx(ULEB128) - Operand index 0115 GIM_RecordInsn, 0116 GIM_RecordInsnIgnoreCopies, 0117 0118 /// Check the feature bits 0119 /// Feature(2) - Expected features 0120 GIM_CheckFeatures, 0121 0122 /// Check the opcode on the specified instruction 0123 /// - InsnID(ULEB128) - Instruction ID 0124 /// - Opc(2) - Expected opcode 0125 GIM_CheckOpcode, 0126 0127 /// Check the opcode on the specified instruction, checking 2 acceptable 0128 /// alternatives. 0129 /// - InsnID(ULEB128) - Instruction ID 0130 /// - Opc(2) - Expected opcode 0131 /// - Opc(2) - Alternative expected opcode 0132 GIM_CheckOpcodeIsEither, 0133 0134 /// Check the instruction has the right number of operands 0135 /// - InsnID(ULEB128) - Instruction ID 0136 /// - Ops(ULEB128) - Expected number of operands 0137 GIM_CheckNumOperands, 0138 0139 /// Check the instruction has a number of operands <= or >= than given number. 0140 /// - InsnID(ULEB128) - Instruction ID 0141 /// - Ops(ULEB128) - Number of operands 0142 GIM_CheckNumOperandsLE, 0143 GIM_CheckNumOperandsGE, 0144 0145 /// Check an immediate predicate on the specified instruction 0146 /// - InsnID(ULEB128) - Instruction ID 0147 /// - Pred(2) - The predicate to test 0148 GIM_CheckI64ImmPredicate, 0149 /// Check an immediate predicate on the specified instruction via an APInt. 0150 /// - InsnID(ULEB128) - Instruction ID 0151 /// - Pred(2) - The predicate to test 0152 GIM_CheckAPIntImmPredicate, 0153 /// Check a floating point immediate predicate on the specified instruction. 0154 /// - InsnID(ULEB128) - Instruction ID 0155 /// - Pred(2) - The predicate to test 0156 GIM_CheckAPFloatImmPredicate, 0157 /// Check an immediate predicate on the specified instruction 0158 /// - InsnID(ULEB128) - Instruction ID 0159 /// - OpIdx(ULEB128) - Operand index 0160 /// - Pred(2) - The predicate to test 0161 GIM_CheckImmOperandPredicate, 0162 0163 /// Check a memory operation has the specified atomic ordering. 0164 /// - InsnID(ULEB128) - Instruction ID 0165 /// - Ordering(ULEB128) - The AtomicOrdering value 0166 GIM_CheckAtomicOrdering, 0167 GIM_CheckAtomicOrderingOrStrongerThan, 0168 GIM_CheckAtomicOrderingWeakerThan, 0169 0170 /// Check the size of the memory access for the given machine memory operand. 0171 /// - InsnID(ULEB128) - Instruction ID 0172 /// - MMOIdx(ULEB128) - MMO index 0173 /// - Size(4) - The size in bytes of the memory access 0174 GIM_CheckMemorySizeEqualTo, 0175 0176 /// Check the address space of the memory access for the given machine memory 0177 /// operand. 0178 /// - InsnID(ULEB128) - Instruction ID 0179 /// - MMOIdx(ULEB128) - MMO index 0180 /// - NumAddrSpace(1) - Number of valid address spaces 0181 /// - AddrSpaceN(ULEB128) - An allowed space of the memory access 0182 /// - AddrSpaceN+1 ... 0183 GIM_CheckMemoryAddressSpace, 0184 0185 /// Check the minimum alignment of the memory access for the given machine 0186 /// memory operand. 0187 /// - InsnID(ULEB128) - Instruction ID 0188 /// - MMOIdx(ULEB128) - MMO index 0189 /// - MinAlign(1) - Minimum acceptable alignment 0190 GIM_CheckMemoryAlignment, 0191 0192 /// Check the size of the memory access for the given machine memory operand 0193 /// against the size of an operand. 0194 /// - InsnID(ULEB128) - Instruction ID 0195 /// - MMOIdx(ULEB128) - MMO index 0196 /// - OpIdx(ULEB128) - The operand index to compare the MMO against 0197 GIM_CheckMemorySizeEqualToLLT, 0198 GIM_CheckMemorySizeLessThanLLT, 0199 GIM_CheckMemorySizeGreaterThanLLT, 0200 0201 /// Check if this is a vector that can be treated as a vector splat 0202 /// constant. This is valid for both G_BUILD_VECTOR as well as 0203 /// G_BUILD_VECTOR_TRUNC. For AllOnes refers to individual bits, so a -1 0204 /// element. 0205 /// - InsnID(ULEB128) - Instruction ID 0206 GIM_CheckIsBuildVectorAllOnes, 0207 GIM_CheckIsBuildVectorAllZeros, 0208 0209 /// Check a trivial predicate which takes no arguments. 0210 /// This can be used by executors to implement custom flags that don't fit in 0211 /// target features. 0212 /// - Pred(2) - Predicate ID to check. 0213 GIM_CheckSimplePredicate, 0214 0215 /// Check a generic C++ instruction predicate 0216 /// - InsnID(ULEB128) - Instruction ID 0217 /// - PredicateID(2) - The ID of the predicate function to call 0218 GIM_CheckCxxInsnPredicate, 0219 0220 /// Check if there's no use of the first result. 0221 /// - InsnID(ULEB128) - Instruction ID 0222 GIM_CheckHasNoUse, 0223 0224 /// Check if there's one use of the first result. 0225 /// - InsnID(ULEB128) - Instruction ID 0226 GIM_CheckHasOneUse, 0227 0228 /// Check the type for the specified operand 0229 /// - InsnID(ULEB128) - Instruction ID 0230 /// - OpIdx(ULEB128) - Operand index 0231 /// - Ty(1) - Expected type 0232 GIM_CheckType, 0233 /// GIM_CheckType but InsnID is omitted and defaults to zero. 0234 GIM_RootCheckType, 0235 0236 /// Check the type of a pointer to any address space. 0237 /// - InsnID(ULEB128) - Instruction ID 0238 /// - OpIdx(ULEB128) - Operand index 0239 /// - SizeInBits(ULEB128) - The size of the pointer value in bits. 0240 GIM_CheckPointerToAny, 0241 0242 /// Check the register bank for the specified operand 0243 /// - InsnID(ULEB128) - Instruction ID 0244 /// - OpIdx(ULEB128) - Operand index 0245 /// - RC(2) - Expected register bank (specified as a register class) 0246 GIM_CheckRegBankForClass, 0247 /// GIM_CheckRegBankForClass but InsnID is omitted and defaults to zero. 0248 GIM_RootCheckRegBankForClass, 0249 0250 /// Check the operand matches a complex predicate 0251 /// - InsnID(ULEB128) - Instruction ID 0252 /// - OpIdx(ULEB128) - Operand index 0253 /// - RendererID(2) - The renderer to hold the result 0254 /// - Pred(2) - Complex predicate ID 0255 GIM_CheckComplexPattern, 0256 0257 /// Check the operand is a specific integer 0258 /// - InsnID(ULEB128) - Instruction ID 0259 /// - OpIdx(ULEB128) - Operand index 0260 /// - Val(8) Expected integer 0261 GIM_CheckConstantInt, 0262 0263 /// Check the operand is a specific 8-bit signed integer 0264 /// - InsnID(ULEB128) - Instruction ID 0265 /// - OpIdx(ULEB128) - Operand index 0266 /// - Val(1) Expected integer 0267 GIM_CheckConstantInt8, 0268 0269 /// Check the operand is a specific literal integer (i.e. MO.isImm() or 0270 /// MO.isCImm() is true). 0271 /// - InsnID(ULEB128) - Instruction ID 0272 /// - OpIdx(ULEB128) - Operand index 0273 /// - Val(8) - Expected integer 0274 GIM_CheckLiteralInt, 0275 0276 /// Check the operand is a specific intrinsic ID 0277 /// - InsnID(ULEB128) - Instruction ID 0278 /// - OpIdx(ULEB128) - Operand index 0279 /// - IID(2) - Expected Intrinsic ID 0280 GIM_CheckIntrinsicID, 0281 0282 /// Check the operand is a specific predicate 0283 /// - InsnID(ULEB128) - Instruction ID 0284 /// - OpIdx(ULEB128) - Operand index 0285 /// - Pred(2) - Expected predicate 0286 GIM_CheckCmpPredicate, 0287 0288 /// Check the specified operand is an MBB 0289 /// - InsnID(ULEB128) - Instruction ID 0290 /// - OpIdx(ULEB128) - Operand index 0291 GIM_CheckIsMBB, 0292 0293 /// Check the specified operand is an Imm 0294 /// - InsnID(ULEB128) - Instruction ID 0295 /// - OpIdx(ULEB128) - Operand index 0296 GIM_CheckIsImm, 0297 0298 /// Checks if the matched instructions numbered [1, 1+N) can 0299 /// be folded into the root (inst 0). 0300 /// - Num(1) 0301 GIM_CheckIsSafeToFold, 0302 0303 /// Check the specified operands are identical. 0304 /// The IgnoreCopies variant looks through COPY instructions before 0305 /// comparing the operands. 0306 /// The "All" variants check all operands starting from the index. 0307 /// - InsnID(ULEB128) - Instruction ID 0308 /// - OpIdx(ULEB128) - Operand index 0309 /// - OtherInsnID(ULEB128) - Other instruction ID 0310 /// - OtherOpIdx(ULEB128) - Other operand index 0311 GIM_CheckIsSameOperand, 0312 GIM_CheckIsSameOperandIgnoreCopies, 0313 GIM_CheckAllSameOperand, 0314 GIM_CheckAllSameOperandIgnoreCopies, 0315 0316 /// Check we can replace all uses of a register with another. 0317 /// - OldInsnID(ULEB128) 0318 /// - OldOpIdx(ULEB128) 0319 /// - NewInsnID(ULEB128) 0320 /// - NewOpIdx(ULEB128) 0321 GIM_CheckCanReplaceReg, 0322 0323 /// Check that a matched instruction has, or doesn't have a MIFlag. 0324 /// 0325 /// - InsnID(ULEB128) - Instruction to check. 0326 /// - Flags(4) - (can be one or more flags OR'd together) 0327 GIM_MIFlags, 0328 GIM_MIFlagsNot, 0329 0330 /// Predicates with 'let PredicateCodeUsesOperands = 1' need to examine some 0331 /// named operands that will be recorded in RecordedOperands. Names of these 0332 /// operands are referenced in predicate argument list. Emitter determines 0333 /// StoreIdx(corresponds to the order in which names appear in argument list). 0334 /// - InsnID(ULEB128) - Instruction ID 0335 /// - OpIdx(ULEB128) - Operand index 0336 /// - StoreIdx(ULEB128) - Store location in RecordedOperands. 0337 GIM_RecordNamedOperand, 0338 0339 /// Records an operand's register type into the set of temporary types. 0340 /// - InsnID(ULEB128) - Instruction ID 0341 /// - OpIdx(ULEB128) - Operand index 0342 /// - TempTypeIdx(1) - Temp Type Index, always negative. 0343 GIM_RecordRegType, 0344 0345 /// Fail the current try-block, or completely fail to match if there is no 0346 /// current try-block. 0347 GIM_Reject, 0348 0349 //=== Renderers === 0350 0351 /// Mutate an instruction 0352 /// - NewInsnID(ULEB128) - Instruction ID to define 0353 /// - OldInsnID(ULEB128) - Instruction ID to mutate 0354 /// - NewOpcode(2) - The new opcode to use 0355 GIR_MutateOpcode, 0356 0357 /// Build a new instruction 0358 /// - InsnID(ULEB128) - Instruction ID to define 0359 /// - Opcode(2) - The new opcode to use 0360 GIR_BuildMI, 0361 /// GIR_BuildMI but InsnID is omitted and defaults to zero. 0362 GIR_BuildRootMI, 0363 0364 /// Builds a constant and stores its result in a TempReg. 0365 /// - TempRegID(ULEB128) - Temp Register to define. 0366 /// - Imm(8) - The immediate to add 0367 GIR_BuildConstant, 0368 0369 /// Copy an operand to the specified instruction 0370 /// - NewInsnID(ULEB128) - Instruction ID to modify 0371 /// - OldInsnID(ULEB128) - Instruction ID to copy from 0372 /// - OpIdx(ULEB128) - The operand to copy 0373 GIR_Copy, 0374 /// GIR_Copy but with both New/OldInsnIDs omitted and defaulting to zero. 0375 GIR_RootToRootCopy, 0376 0377 /// Copies all operand starting from OpIdx in OldInsnID into the new 0378 /// instruction NewInsnID. 0379 /// - NewInsnID(ULEB128) - Instruction ID to modify 0380 /// - OldInsnID(ULEB128) - Instruction ID to copy from 0381 /// - OpIdx(ULEB128) - The first operand to copy 0382 GIR_CopyRemaining, 0383 0384 /// Copy an operand to the specified instruction or add a zero register if the 0385 /// operand is a zero immediate. 0386 /// - NewInsnID(ULEB128) - Instruction ID to modify 0387 /// - OldInsnID(ULEB128) - Instruction ID to copy from 0388 /// - OpIdx(ULEB128) - The operand to copy 0389 /// - ZeroReg(2) - The zero register to use 0390 GIR_CopyOrAddZeroReg, 0391 /// Copy an operand to the specified instruction 0392 /// - NewInsnID(ULEB128) - Instruction ID to modify 0393 /// - OldInsnID(ULEB128) - Instruction ID to copy from 0394 /// - OpIdx(ULEB128) - The operand to copy 0395 /// - SubRegIdx(2) - The subregister to copy 0396 GIR_CopySubReg, 0397 0398 /// Add an implicit register def to the specified instruction 0399 /// - InsnID(ULEB128) - Instruction ID to modify 0400 /// - RegNum(2) - The register to add 0401 /// - Flags(2) - Register Flags 0402 GIR_AddImplicitDef, 0403 /// Add an implicit register use to the specified instruction 0404 /// - InsnID(ULEB128) - Instruction ID to modify 0405 /// - RegNum(2) - The register to add 0406 GIR_AddImplicitUse, 0407 /// Add an register to the specified instruction 0408 /// - InsnID(ULEB128) - Instruction ID to modify 0409 /// - RegNum(2) - The register to add 0410 /// - Flags(2) - Register Flags 0411 GIR_AddRegister, 0412 0413 /// Adds an intrinsic ID to the specified instruction. 0414 /// - InsnID(ULEB128) - Instruction ID to modify 0415 /// - IID(2) - Intrinsic ID 0416 GIR_AddIntrinsicID, 0417 0418 /// Marks the implicit def of a register as dead. 0419 /// - InsnID(ULEB128) - Instruction ID to modify 0420 /// - OpIdx(ULEB128) - The implicit def operand index 0421 /// 0422 /// OpIdx starts at 0 for the first implicit def. 0423 GIR_SetImplicitDefDead, 0424 0425 /// Set or unset a MIFlag on an instruction. 0426 /// 0427 /// - InsnID(ULEB128) - Instruction to modify. 0428 /// - Flags(4) - (can be one or more flags OR'd together) 0429 GIR_SetMIFlags, 0430 GIR_UnsetMIFlags, 0431 0432 /// Copy the MIFlags of a matched instruction into an 0433 /// output instruction. The flags are OR'd together. 0434 /// 0435 /// - InsnID(ULEB128) - Instruction to modify. 0436 /// - OldInsnID(ULEB128) - Matched instruction to copy flags from. 0437 GIR_CopyMIFlags, 0438 0439 /// Add a temporary register to the specified instruction 0440 /// - InsnID(ULEB128) - Instruction ID to modify 0441 /// - TempRegID(ULEB128) - The temporary register ID to add 0442 /// - TempRegFlags(2) - The register flags to set 0443 GIR_AddTempRegister, 0444 0445 /// Add a temporary register to the specified instruction without 0446 /// setting any flags. 0447 /// - InsnID(ULEB128) - Instruction ID to modify 0448 /// - TempRegID(ULEB128) - The temporary register ID to add 0449 GIR_AddSimpleTempRegister, 0450 0451 /// Add a temporary register to the specified instruction 0452 /// - InsnID(ULEB128) - Instruction ID to modify 0453 /// - TempRegID(ULEB128) - The temporary register ID to add 0454 /// - TempRegFlags(2) - The register flags to set 0455 /// - SubRegIndex(2) - The subregister index to set 0456 GIR_AddTempSubRegister, 0457 0458 /// Add an immediate to the specified instruction 0459 /// - InsnID(ULEB128) - Instruction ID to modify 0460 /// - Imm(8) - The immediate to add 0461 GIR_AddImm, 0462 0463 /// Add signed 8 bit immediate to the specified instruction 0464 /// - InsnID(ULEB128) - Instruction ID to modify 0465 /// - Imm(1) - The immediate to add 0466 GIR_AddImm8, 0467 0468 /// Add an CImm to the specified instruction 0469 /// - InsnID(ULEB128) - Instruction ID to modify 0470 /// - Ty(1) - Type of the constant immediate. 0471 /// - Imm(8) - The immediate to add 0472 GIR_AddCImm, 0473 0474 /// Render complex operands to the specified instruction 0475 /// - InsnID(ULEB128) - Instruction ID to modify 0476 /// - RendererID(2) - The renderer to call 0477 GIR_ComplexRenderer, 0478 /// Render sub-operands of complex operands to the specified instruction 0479 /// - InsnID(ULEB128) - Instruction ID to modify 0480 /// - RendererID(2) - The renderer to call 0481 /// - RenderOpID(ULEB128) - The suboperand to render. 0482 GIR_ComplexSubOperandRenderer, 0483 /// Render subregisters of suboperands of complex operands to the 0484 /// specified instruction 0485 /// - InsnID(ULEB128) - Instruction ID to modify 0486 /// - RendererID(2) - The renderer to call 0487 /// - RenderOpID(ULEB128) - The suboperand to render 0488 /// - SubRegIdx(2) - The subregister to extract 0489 GIR_ComplexSubOperandSubRegRenderer, 0490 0491 /// Render operands to the specified instruction using a custom function 0492 /// - InsnID(ULEB128) - Instruction ID to modify 0493 /// - OldInsnID(ULEB128) - Instruction ID to get the matched operand from 0494 /// - RendererFnID(2) - Custom renderer function to call 0495 GIR_CustomRenderer, 0496 0497 /// Calls a C++ function that concludes the current match. 0498 /// The C++ function is free to return false and reject the match, or 0499 /// return true and mutate the instruction(s) (or do nothing, even). 0500 /// - FnID(2) - The function to call. 0501 GIR_DoneWithCustomAction, 0502 0503 /// Render operands to the specified instruction using a custom function, 0504 /// reading from a specific operand. 0505 /// - InsnID(ULEB128) - Instruction ID to modify 0506 /// - OldInsnID(ULEB128) - Instruction ID to get the matched operand from 0507 /// - OpIdx(ULEB128) - Operand index in OldInsnID the render function should 0508 /// read 0509 /// from.. 0510 /// - RendererFnID(2) - Custom renderer function to call 0511 GIR_CustomOperandRenderer, 0512 0513 /// Render a G_CONSTANT operator as a sign-extended immediate. 0514 /// - NewInsnID(ULEB128) - Instruction ID to modify 0515 /// - OldInsnID(ULEB128) - Instruction ID to copy from 0516 /// The operand index is implicitly 1. 0517 GIR_CopyConstantAsSImm, 0518 0519 /// Render a G_FCONSTANT operator as a sign-extended immediate. 0520 /// - NewInsnID(ULEB128) - Instruction ID to modify 0521 /// - OldInsnID(ULEB128) - Instruction ID to copy from 0522 /// The operand index is implicitly 1. 0523 GIR_CopyFConstantAsFPImm, 0524 0525 /// Constrain an instruction operand to a register class. 0526 /// - InsnID(ULEB128) - Instruction ID to modify 0527 /// - OpIdx(ULEB128) - Operand index 0528 /// - RCEnum(2) - Register class enumeration value 0529 GIR_ConstrainOperandRC, 0530 0531 /// Constrain an instructions operands according to the instruction 0532 /// description. 0533 /// - InsnID(ULEB128) - Instruction ID to modify 0534 GIR_ConstrainSelectedInstOperands, 0535 /// GIR_ConstrainSelectedInstOperands but InsnID is omitted and defaults to 0536 /// zero. 0537 GIR_RootConstrainSelectedInstOperands, 0538 0539 /// Merge all memory operands into instruction. 0540 /// - InsnID(ULEB128) - Instruction ID to modify 0541 /// - NumInsnID(1) - Number of instruction IDs following this argument 0542 /// - MergeInsnID(ULEB128)... - One or more Instruction ID to merge into the 0543 /// result. 0544 GIR_MergeMemOperands, 0545 0546 /// Erase from parent. 0547 /// - InsnID(ULEB128) - Instruction ID to erase 0548 GIR_EraseFromParent, 0549 0550 /// Combines both a GIR_EraseFromParent 0 + GIR_Done 0551 GIR_EraseRootFromParent_Done, 0552 0553 /// Create a new temporary register that's not constrained. 0554 /// - TempRegID(ULEB128) - The temporary register ID to initialize. 0555 /// - Ty(1) - Expected type 0556 GIR_MakeTempReg, 0557 0558 /// Replaces all references to a register from an instruction 0559 /// with another register from another instruction. 0560 /// - OldInsnID(ULEB128) 0561 /// - OldOpIdx(ULEB128) 0562 /// - NewInsnID(ULEB128) 0563 /// - NewOpIdx(ULEB128) 0564 GIR_ReplaceReg, 0565 0566 /// Replaces all references to a register with a temporary register. 0567 /// - OldInsnID(ULEB128) 0568 /// - OldOpIdx(ULEB128) 0569 /// - TempRegIdx(ULEB128) 0570 GIR_ReplaceRegWithTempReg, 0571 0572 /// A successful emission 0573 GIR_Done, 0574 0575 /// Increment the rule coverage counter. 0576 /// - RuleID(4) - The ID of the rule that was covered. 0577 GIR_Coverage, 0578 0579 /// Keeping track of the number of the GI opcodes. Must be the last entry. 0580 GIU_NumOpcodes, 0581 }; 0582 0583 /// Provides the logic to execute GlobalISel match tables, which are used by the 0584 /// instruction selector and instruction combiners as their engine to match and 0585 /// apply MIR patterns. 0586 class GIMatchTableExecutor { 0587 public: 0588 virtual ~GIMatchTableExecutor() = default; 0589 0590 CodeGenCoverage *CoverageInfo = nullptr; 0591 GISelKnownBits *KB = nullptr; 0592 MachineFunction *MF = nullptr; 0593 ProfileSummaryInfo *PSI = nullptr; 0594 BlockFrequencyInfo *BFI = nullptr; 0595 // For some predicates, we need to track the current MBB. 0596 MachineBasicBlock *CurMBB = nullptr; 0597 0598 virtual void setupGeneratedPerFunctionState(MachineFunction &MF) = 0; 0599 0600 /// Setup per-MF executor state. 0601 virtual void setupMF(MachineFunction &mf, GISelKnownBits *kb, 0602 CodeGenCoverage *covinfo = nullptr, 0603 ProfileSummaryInfo *psi = nullptr, 0604 BlockFrequencyInfo *bfi = nullptr) { 0605 CoverageInfo = covinfo; 0606 KB = kb; 0607 MF = &mf; 0608 PSI = psi; 0609 BFI = bfi; 0610 CurMBB = nullptr; 0611 setupGeneratedPerFunctionState(mf); 0612 } 0613 0614 protected: 0615 using ComplexRendererFns = 0616 std::optional<SmallVector<std::function<void(MachineInstrBuilder &)>, 4>>; 0617 using RecordedMIVector = SmallVector<MachineInstr *, 4>; 0618 using NewMIVector = SmallVector<MachineInstrBuilder, 4>; 0619 0620 struct MatcherState { 0621 std::vector<ComplexRendererFns::value_type> Renderers; 0622 RecordedMIVector MIs; 0623 DenseMap<unsigned, unsigned> TempRegisters; 0624 /// Named operands that predicate with 'let PredicateCodeUsesOperands = 1' 0625 /// referenced in its argument list. Operands are inserted at index set by 0626 /// emitter, it corresponds to the order in which names appear in argument 0627 /// list. Currently such predicates don't have more then 3 arguments. 0628 std::array<const MachineOperand *, 3> RecordedOperands; 0629 0630 /// Types extracted from an instruction's operand. 0631 /// Whenever a type index is negative, we look here instead. 0632 SmallVector<LLT, 4> RecordedTypes; 0633 0634 MatcherState(unsigned MaxRenderers); 0635 }; 0636 0637 bool shouldOptForSize(const MachineFunction *MF) const { 0638 const auto &F = MF->getFunction(); 0639 if (F.hasOptSize()) 0640 return true; 0641 if (CurMBB) 0642 if (auto *BB = CurMBB->getBasicBlock()) 0643 return llvm::shouldOptimizeForSize(BB, PSI, BFI); 0644 return false; 0645 } 0646 0647 public: 0648 template <class PredicateBitset, class ComplexMatcherMemFn, 0649 class CustomRendererFn> 0650 struct ExecInfoTy { 0651 ExecInfoTy(const LLT *TypeObjects, size_t NumTypeObjects, 0652 const PredicateBitset *FeatureBitsets, 0653 const ComplexMatcherMemFn *ComplexPredicates, 0654 const CustomRendererFn *CustomRenderers) 0655 : TypeObjects(TypeObjects), FeatureBitsets(FeatureBitsets), 0656 ComplexPredicates(ComplexPredicates), 0657 CustomRenderers(CustomRenderers) { 0658 0659 for (size_t I = 0; I < NumTypeObjects; ++I) 0660 TypeIDMap[TypeObjects[I]] = I; 0661 } 0662 const LLT *TypeObjects; 0663 const PredicateBitset *FeatureBitsets; 0664 const ComplexMatcherMemFn *ComplexPredicates; 0665 const CustomRendererFn *CustomRenderers; 0666 0667 SmallDenseMap<LLT, unsigned, 64> TypeIDMap; 0668 }; 0669 0670 protected: 0671 GIMatchTableExecutor(); 0672 0673 /// Execute a given matcher table and return true if the match was successful 0674 /// and false otherwise. 0675 template <class TgtExecutor, class PredicateBitset, class ComplexMatcherMemFn, 0676 class CustomRendererFn> 0677 bool executeMatchTable(TgtExecutor &Exec, MatcherState &State, 0678 const ExecInfoTy<PredicateBitset, ComplexMatcherMemFn, 0679 CustomRendererFn> &ExecInfo, 0680 MachineIRBuilder &Builder, const uint8_t *MatchTable, 0681 const TargetInstrInfo &TII, MachineRegisterInfo &MRI, 0682 const TargetRegisterInfo &TRI, 0683 const RegisterBankInfo &RBI, 0684 const PredicateBitset &AvailableFeatures, 0685 CodeGenCoverage *CoverageInfo) const; 0686 0687 virtual const uint8_t *getMatchTable() const { 0688 llvm_unreachable("Should have been overridden by tablegen if used"); 0689 } 0690 0691 virtual bool testImmPredicate_I64(unsigned, int64_t) const { 0692 llvm_unreachable( 0693 "Subclasses must override this with a tablegen-erated function"); 0694 } 0695 virtual bool testImmPredicate_APInt(unsigned, const APInt &) const { 0696 llvm_unreachable( 0697 "Subclasses must override this with a tablegen-erated function"); 0698 } 0699 virtual bool testImmPredicate_APFloat(unsigned, const APFloat &) const { 0700 llvm_unreachable( 0701 "Subclasses must override this with a tablegen-erated function"); 0702 } 0703 virtual bool testMIPredicate_MI(unsigned, const MachineInstr &, 0704 const MatcherState &State) const { 0705 llvm_unreachable( 0706 "Subclasses must override this with a tablegen-erated function"); 0707 } 0708 0709 virtual bool testSimplePredicate(unsigned) const { 0710 llvm_unreachable("Subclass does not implement testSimplePredicate!"); 0711 } 0712 0713 virtual bool runCustomAction(unsigned, const MatcherState &State, 0714 NewMIVector &OutMIs) const { 0715 llvm_unreachable("Subclass does not implement runCustomAction!"); 0716 } 0717 0718 bool isOperandImmEqual(const MachineOperand &MO, int64_t Value, 0719 const MachineRegisterInfo &MRI, 0720 bool Splat = false) const; 0721 0722 /// Return true if the specified operand is a G_PTR_ADD with a G_CONSTANT on 0723 /// the right-hand side. GlobalISel's separation of pointer and integer types 0724 /// means that we don't need to worry about G_OR with equivalent semantics. 0725 bool isBaseWithConstantOffset(const MachineOperand &Root, 0726 const MachineRegisterInfo &MRI) const; 0727 0728 /// Return true if MI can obviously be folded into IntoMI. 0729 /// MI and IntoMI do not need to be in the same basic blocks, but MI must 0730 /// preceed IntoMI. 0731 bool isObviouslySafeToFold(MachineInstr &MI, MachineInstr &IntoMI) const; 0732 0733 template <typename Ty> static Ty readBytesAs(const uint8_t *MatchTable) { 0734 Ty Ret; 0735 memcpy(&Ret, MatchTable, sizeof(Ret)); 0736 return Ret; 0737 } 0738 0739 static ArrayRef<MachineOperand> getRemainingOperands(const MachineInstr &MI, 0740 unsigned FirstVarOp) { 0741 auto Operands = drop_begin(MI.operands(), FirstVarOp); 0742 return {Operands.begin(), Operands.end()}; 0743 } 0744 0745 public: 0746 // Faster ULEB128 decoder tailored for the Match Table Executor. 0747 // 0748 // - Arguments are fixed to avoid mid-function checks. 0749 // - Unchecked execution, assumes no error. 0750 // - Fast common case handling (1 byte values). 0751 LLVM_ATTRIBUTE_ALWAYS_INLINE static uint64_t 0752 fastDecodeULEB128(const uint8_t *LLVM_ATTRIBUTE_RESTRICT MatchTable, 0753 uint64_t &CurrentIdx) { 0754 uint64_t Value = MatchTable[CurrentIdx++]; 0755 if (LLVM_UNLIKELY(Value >= 128)) { 0756 Value &= 0x7f; 0757 unsigned Shift = 7; 0758 do { 0759 uint64_t Slice = MatchTable[CurrentIdx] & 0x7f; 0760 Value += Slice << Shift; 0761 Shift += 7; 0762 } while (MatchTable[CurrentIdx++] >= 128); 0763 } 0764 return Value; 0765 } 0766 }; 0767 0768 } // end namespace llvm 0769 0770 #endif // LLVM_CODEGEN_GLOBALISEL_GIMATCHTABLEEXECUTOR_H
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