Back to home page

EIC code displayed by LXR

 
 

    


File indexing completed on 2026-05-10 08:43:16

0001 //===- PHITransAddr.h - PHI Translation for Addresses -----------*- C++ -*-===//
0002 //
0003 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
0004 // See https://llvm.org/LICENSE.txt for license information.
0005 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
0006 //
0007 //===----------------------------------------------------------------------===//
0008 //
0009 // This file declares the PHITransAddr class.
0010 //
0011 //===----------------------------------------------------------------------===//
0012 
0013 #ifndef LLVM_ANALYSIS_PHITRANSADDR_H
0014 #define LLVM_ANALYSIS_PHITRANSADDR_H
0015 
0016 #include "llvm/ADT/SmallVector.h"
0017 #include "llvm/IR/Instruction.h"
0018 
0019 namespace llvm {
0020 class AssumptionCache;
0021 class DominatorTree;
0022 class DataLayout;
0023 class TargetLibraryInfo;
0024 
0025 /// PHITransAddr - An address value which tracks and handles phi translation.
0026 /// As we walk "up" the CFG through predecessors, we need to ensure that the
0027 /// address we're tracking is kept up to date.  For example, if we're analyzing
0028 /// an address of "&A[i]" and walk through the definition of 'i' which is a PHI
0029 /// node, we *must* phi translate i to get "&A[j]" or else we will analyze an
0030 /// incorrect pointer in the predecessor block.
0031 ///
0032 /// This is designed to be a relatively small object that lives on the stack and
0033 /// is copyable.
0034 ///
0035 class PHITransAddr {
0036   /// Addr - The actual address we're analyzing.
0037   Value *Addr;
0038 
0039   /// The DataLayout we are playing with.
0040   const DataLayout &DL;
0041 
0042   /// TLI - The target library info if known, otherwise null.
0043   const TargetLibraryInfo *TLI = nullptr;
0044 
0045   /// A cache of \@llvm.assume calls used by SimplifyInstruction.
0046   AssumptionCache *AC;
0047 
0048   /// InstInputs - The inputs for our symbolic address.
0049   SmallVector<Instruction*, 4> InstInputs;
0050 
0051 public:
0052   PHITransAddr(Value *Addr, const DataLayout &DL, AssumptionCache *AC)
0053       : Addr(Addr), DL(DL), AC(AC) {
0054     // If the address is an instruction, the whole thing is considered an input.
0055     addAsInput(Addr);
0056   }
0057 
0058   Value *getAddr() const { return Addr; }
0059 
0060   /// needsPHITranslationFromBlock - Return true if moving from the specified
0061   /// BasicBlock to its predecessors requires PHI translation.
0062   bool needsPHITranslationFromBlock(BasicBlock *BB) const {
0063     // We do need translation if one of our input instructions is defined in
0064     // this block.
0065     return any_of(InstInputs, [BB](const auto &InstInput) {
0066       return InstInput->getParent() == BB;
0067     });
0068   }
0069 
0070   /// isPotentiallyPHITranslatable - If this needs PHI translation, return true
0071   /// if we have some hope of doing it.  This should be used as a filter to
0072   /// avoid calling PHITranslateValue in hopeless situations.
0073   bool isPotentiallyPHITranslatable() const;
0074 
0075   /// translateValue - PHI translate the current address up the CFG from
0076   /// CurBB to Pred, updating our state to reflect any needed changes.  If
0077   /// 'MustDominate' is true, the translated value must dominate PredBB.
0078   Value *translateValue(BasicBlock *CurBB, BasicBlock *PredBB,
0079                         const DominatorTree *DT, bool MustDominate);
0080 
0081   /// translateWithInsertion - PHI translate this value into the specified
0082   /// predecessor block, inserting a computation of the value if it is
0083   /// unavailable.
0084   ///
0085   /// All newly created instructions are added to the NewInsts list.  This
0086   /// returns null on failure.
0087   ///
0088   Value *translateWithInsertion(BasicBlock *CurBB, BasicBlock *PredBB,
0089                                 const DominatorTree &DT,
0090                                 SmallVectorImpl<Instruction *> &NewInsts);
0091 
0092   void dump() const;
0093 
0094   /// verify - Check internal consistency of this data structure.  If the
0095   /// structure is valid, it returns true.  If invalid, it prints errors and
0096   /// returns false.
0097   bool verify() const;
0098 
0099 private:
0100   Value *translateSubExpr(Value *V, BasicBlock *CurBB, BasicBlock *PredBB,
0101                           const DominatorTree *DT);
0102 
0103   /// insertTranslatedSubExpr - Insert a computation of the PHI translated
0104   /// version of 'V' for the edge PredBB->CurBB into the end of the PredBB
0105   /// block.  All newly created instructions are added to the NewInsts list.
0106   /// This returns null on failure.
0107   ///
0108   Value *insertTranslatedSubExpr(Value *InVal, BasicBlock *CurBB,
0109                                  BasicBlock *PredBB, const DominatorTree &DT,
0110                                  SmallVectorImpl<Instruction *> &NewInsts);
0111 
0112   /// addAsInput - If the specified value is an instruction, add it as an input.
0113   Value *addAsInput(Value *V) {
0114     // If V is an instruction, it is now an input.
0115     if (Instruction *VI = dyn_cast<Instruction>(V))
0116       InstInputs.push_back(VI);
0117     return V;
0118   }
0119 };
0120 
0121 } // end namespace llvm
0122 
0123 #endif