File indexing completed on 2026-11-07 10:15:27
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0016 #ifndef LONGLONG_ASM_GNU_H
0017 #define LONGLONG_ASM_GNU_H
0018
0019
0020
0021 #ifndef LSYM_PREFIX
0022 # define LSYM_PREFIX ".L"
0023 #endif
0024
0025
0026
0027
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0032
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0034
0035 #define ASM_L(name) LSYM_PREFIX "asm_%=_" #name
0036
0037 #if !FLINT_WANT_ASSERT && defined(__amd64__)
0038 # define MPN_IORD_U(ptr, incr, aors) \
0039 do { \
0040 nn_ptr __ptr_dummy; \
0041 if (__builtin_constant_p(incr) && (incr) == 0) \
0042 { \
0043 } \
0044 else if (__builtin_constant_p(incr) && (incr) == 1) \
0045 { \
0046 __asm__ volatile \
0047 ("\n" ASM_L(top) ":\n" \
0048 "\t" aors "\t$1, (%0)\n" \
0049 "\tlea\t%c2(%0), %0\n" \
0050 "\tjc\t" ASM_L(top) \
0051 : "=r" (__ptr_dummy) \
0052 : "0" (ptr), "n" (sizeof(ulong)) \
0053 : "memory"); \
0054 } \
0055 else \
0056 { \
0057 __asm__ volatile \
0058 ( aors "\t%2, (%0)\n" \
0059 "\tjnc\t" ASM_L(done) "\n" \
0060 ASM_L(top) ":\n" \
0061 "\t" aors "\t$1, %c3(%0)\n" \
0062 "\tlea\t%c3(%0), %0\n" \
0063 "\tjc\t" ASM_L(top) "\n" \
0064 ASM_L(done) ":\n" \
0065 : "=r" (__ptr_dummy) \
0066 : "0" (ptr), \
0067 "re" ((ulong) (incr)), "n" (sizeof(ulong)) \
0068 : "memory"); \
0069 } \
0070 } while (0)
0071
0072 # if FLINT_BITS == 32
0073 # define MPN_INCR_U(ptr, size, incr) MPN_IORD_U(ptr, incr, "addl")
0074 # define MPN_DECR_U(ptr, size, incr) MPN_IORD_U(ptr, incr, "subl")
0075 # else
0076 # define MPN_INCR_U(ptr, size, incr) MPN_IORD_U(ptr, incr, "addq")
0077 # define MPN_DECR_U(ptr, size, incr) MPN_IORD_U(ptr, incr, "subq")
0078 # endif
0079 #elif !FLINT_WANT_ASSERT && (FLINT_BITS == 64 && defined(__aarch64__))
0080 # define MPN_IORD_U(ptr, incr, aors, cond, anticond) \
0081 do { \
0082 nn_ptr __ptr_dummy; \
0083 ulong __reg_dummy; \
0084 if (__builtin_constant_p (incr) && (incr) == 0) \
0085 { \
0086 } \
0087 else if (__builtin_constant_p (incr) && (incr) == 1) \
0088 { \
0089 __asm__ volatile \
0090 ("\n" ASM_L(top) ":\n" \
0091 "\tldr\t%1, [%0]\n" \
0092 "\t" aors "\t%1, %1, #1\n" \
0093 "\tstr\t%1, [%0], #8\n" \
0094 "\tb." cond "\t" ASM_L(top) "\n" \
0095 : "=r" (__ptr_dummy), "=&r" (__reg_dummy) \
0096 : "0" (ptr) \
0097 : "memory"); \
0098 } \
0099 else \
0100 { \
0101 __asm__ volatile \
0102 ("\tldr\t%1, [%0]\n" \
0103 "\t" aors "\t%1, %1, %3\n" \
0104 "\tstr\t%1, [%0], #8\n" \
0105 "\tb." anticond "\t" ASM_L(done) "\n" \
0106 "\n" ASM_L(top) ":\n" \
0107 "\tldr\t%1, [%0]\n" \
0108 "\t" aors "\t%1, %1, #1\n" \
0109 "\tstr\t%1, [%0], #8\n" \
0110 "\tb." cond "\t" ASM_L(top) "\n" \
0111 ASM_L(done) ":\n" \
0112 : "=r" (__ptr_dummy), "=&r" (__reg_dummy) \
0113 : "0" (ptr), "rI" ((ulong) (incr)) \
0114 : "memory"); \
0115 } \
0116 } while (0)
0117
0118 # define MPN_INCR_U(ptr, size, incr) MPN_IORD_U(ptr, incr, "adds", "cs", "cc")
0119 # define MPN_DECR_U(ptr, size, incr) MPN_IORD_U(ptr, incr, "subs", "cc", "cs")
0120 #endif
0121
0122 #endif