Warning, /include/clang/Basic/riscv_sifive_vector_builtin_cg.inc is written in an unsupported language. File is not indexed.
0001 case RISCVVector::BI__builtin_rvv_sf_vc_fv_se:
0002 ID = Intrinsic::riscv_sf_vc_fv_se;
0003 PolicyAttrs = 3;
0004 SegInstSEW = 0;
0005 IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0006 break;
0007 case RISCVVector::BI__builtin_rvv_sf_vc_fvv_se:
0008 ID = Intrinsic::riscv_sf_vc_fvv_se;
0009 PolicyAttrs = 3;
0010 SegInstSEW = 0;
0011 IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0012 break;
0013 case RISCVVector::BI__builtin_rvv_sf_vc_fvw_se:
0014 ID = Intrinsic::riscv_sf_vc_fvw_se;
0015 PolicyAttrs = 3;
0016 SegInstSEW = 0;
0017 IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0018 break;
0019 case RISCVVector::BI__builtin_rvv_sf_vc_i_se:
0020 ID = Intrinsic::riscv_sf_vc_i_se;
0021 PolicyAttrs = 3;
0022 SegInstSEW = 0;
0023 IntrinsicTypes = {Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0024 break;
0025 case RISCVVector::BI__builtin_rvv_sf_vc_iv_se:
0026 ID = Intrinsic::riscv_sf_vc_iv_se;
0027 PolicyAttrs = 3;
0028 SegInstSEW = 0;
0029 IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0030 break;
0031 case RISCVVector::BI__builtin_rvv_sf_vc_ivv_se:
0032 ID = Intrinsic::riscv_sf_vc_ivv_se;
0033 PolicyAttrs = 3;
0034 SegInstSEW = 0;
0035 IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0036 break;
0037 case RISCVVector::BI__builtin_rvv_sf_vc_ivw_se:
0038 ID = Intrinsic::riscv_sf_vc_ivw_se;
0039 PolicyAttrs = 3;
0040 SegInstSEW = 0;
0041 IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0042 break;
0043 case RISCVVector::BI__builtin_rvv_sf_vc_v_fv:
0044 ID = Intrinsic::riscv_sf_vc_v_fv;
0045 PolicyAttrs = 3;
0046 SegInstSEW = 0;
0047 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0048 break;
0049 case RISCVVector::BI__builtin_rvv_sf_vc_v_fv_se:
0050 ID = Intrinsic::riscv_sf_vc_v_fv_se;
0051 PolicyAttrs = 3;
0052 SegInstSEW = 0;
0053 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0054 break;
0055 case RISCVVector::BI__builtin_rvv_sf_vc_v_fvv:
0056 ID = Intrinsic::riscv_sf_vc_v_fvv;
0057 PolicyAttrs = 3;
0058 SegInstSEW = 0;
0059 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0060 break;
0061 case RISCVVector::BI__builtin_rvv_sf_vc_v_fvv_se:
0062 ID = Intrinsic::riscv_sf_vc_v_fvv_se;
0063 PolicyAttrs = 3;
0064 SegInstSEW = 0;
0065 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0066 break;
0067 case RISCVVector::BI__builtin_rvv_sf_vc_v_fvw:
0068 ID = Intrinsic::riscv_sf_vc_v_fvw;
0069 PolicyAttrs = 3;
0070 SegInstSEW = 0;
0071 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0072 break;
0073 case RISCVVector::BI__builtin_rvv_sf_vc_v_fvw_se:
0074 ID = Intrinsic::riscv_sf_vc_v_fvw_se;
0075 PolicyAttrs = 3;
0076 SegInstSEW = 0;
0077 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0078 break;
0079 case RISCVVector::BI__builtin_rvv_sf_vc_v_i:
0080 ID = Intrinsic::riscv_sf_vc_v_i;
0081 PolicyAttrs = 3;
0082 SegInstSEW = 0;
0083 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0084 break;
0085 case RISCVVector::BI__builtin_rvv_sf_vc_v_i_se:
0086 ID = Intrinsic::riscv_sf_vc_v_i_se;
0087 PolicyAttrs = 3;
0088 SegInstSEW = 0;
0089 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0090 break;
0091 case RISCVVector::BI__builtin_rvv_sf_vc_v_iv:
0092 ID = Intrinsic::riscv_sf_vc_v_iv;
0093 PolicyAttrs = 3;
0094 SegInstSEW = 0;
0095 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0096 break;
0097 case RISCVVector::BI__builtin_rvv_sf_vc_v_iv_se:
0098 ID = Intrinsic::riscv_sf_vc_v_iv_se;
0099 PolicyAttrs = 3;
0100 SegInstSEW = 0;
0101 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0102 break;
0103 case RISCVVector::BI__builtin_rvv_sf_vc_v_ivv:
0104 ID = Intrinsic::riscv_sf_vc_v_ivv;
0105 PolicyAttrs = 3;
0106 SegInstSEW = 0;
0107 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0108 break;
0109 case RISCVVector::BI__builtin_rvv_sf_vc_v_ivv_se:
0110 ID = Intrinsic::riscv_sf_vc_v_ivv_se;
0111 PolicyAttrs = 3;
0112 SegInstSEW = 0;
0113 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0114 break;
0115 case RISCVVector::BI__builtin_rvv_sf_vc_v_ivw:
0116 ID = Intrinsic::riscv_sf_vc_v_ivw;
0117 PolicyAttrs = 3;
0118 SegInstSEW = 0;
0119 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0120 break;
0121 case RISCVVector::BI__builtin_rvv_sf_vc_v_ivw_se:
0122 ID = Intrinsic::riscv_sf_vc_v_ivw_se;
0123 PolicyAttrs = 3;
0124 SegInstSEW = 0;
0125 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0126 break;
0127 case RISCVVector::BI__builtin_rvv_sf_vc_v_vv:
0128 ID = Intrinsic::riscv_sf_vc_v_vv;
0129 PolicyAttrs = 3;
0130 SegInstSEW = 0;
0131 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0132 break;
0133 case RISCVVector::BI__builtin_rvv_sf_vc_v_vv_se:
0134 ID = Intrinsic::riscv_sf_vc_v_vv_se;
0135 PolicyAttrs = 3;
0136 SegInstSEW = 0;
0137 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0138 break;
0139 case RISCVVector::BI__builtin_rvv_sf_vc_v_vvv:
0140 ID = Intrinsic::riscv_sf_vc_v_vvv;
0141 PolicyAttrs = 3;
0142 SegInstSEW = 0;
0143 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0144 break;
0145 case RISCVVector::BI__builtin_rvv_sf_vc_v_vvv_se:
0146 ID = Intrinsic::riscv_sf_vc_v_vvv_se;
0147 PolicyAttrs = 3;
0148 SegInstSEW = 0;
0149 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0150 break;
0151 case RISCVVector::BI__builtin_rvv_sf_vc_v_vvw:
0152 ID = Intrinsic::riscv_sf_vc_v_vvw;
0153 PolicyAttrs = 3;
0154 SegInstSEW = 0;
0155 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0156 break;
0157 case RISCVVector::BI__builtin_rvv_sf_vc_v_vvw_se:
0158 ID = Intrinsic::riscv_sf_vc_v_vvw_se;
0159 PolicyAttrs = 3;
0160 SegInstSEW = 0;
0161 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0162 break;
0163 case RISCVVector::BI__builtin_rvv_sf_vc_v_x:
0164 ID = Intrinsic::riscv_sf_vc_v_x;
0165 PolicyAttrs = 3;
0166 SegInstSEW = 0;
0167 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0168 break;
0169 case RISCVVector::BI__builtin_rvv_sf_vc_v_x_se:
0170 ID = Intrinsic::riscv_sf_vc_v_x_se;
0171 PolicyAttrs = 3;
0172 SegInstSEW = 0;
0173 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0174 break;
0175 case RISCVVector::BI__builtin_rvv_sf_vc_v_xv:
0176 ID = Intrinsic::riscv_sf_vc_v_xv;
0177 PolicyAttrs = 3;
0178 SegInstSEW = 0;
0179 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0180 break;
0181 case RISCVVector::BI__builtin_rvv_sf_vc_v_xv_se:
0182 ID = Intrinsic::riscv_sf_vc_v_xv_se;
0183 PolicyAttrs = 3;
0184 SegInstSEW = 0;
0185 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0186 break;
0187 case RISCVVector::BI__builtin_rvv_sf_vc_v_xvv:
0188 ID = Intrinsic::riscv_sf_vc_v_xvv;
0189 PolicyAttrs = 3;
0190 SegInstSEW = 0;
0191 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0192 break;
0193 case RISCVVector::BI__builtin_rvv_sf_vc_v_xvv_se:
0194 ID = Intrinsic::riscv_sf_vc_v_xvv_se;
0195 PolicyAttrs = 3;
0196 SegInstSEW = 0;
0197 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0198 break;
0199 case RISCVVector::BI__builtin_rvv_sf_vc_v_xvw:
0200 ID = Intrinsic::riscv_sf_vc_v_xvw;
0201 PolicyAttrs = 3;
0202 SegInstSEW = 0;
0203 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0204 break;
0205 case RISCVVector::BI__builtin_rvv_sf_vc_v_xvw_se:
0206 ID = Intrinsic::riscv_sf_vc_v_xvw_se;
0207 PolicyAttrs = 3;
0208 SegInstSEW = 0;
0209 IntrinsicTypes = {ResultType, Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0210 break;
0211 case RISCVVector::BI__builtin_rvv_sf_vc_vv_se:
0212 ID = Intrinsic::riscv_sf_vc_vv_se;
0213 PolicyAttrs = 3;
0214 SegInstSEW = 0;
0215 IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0216 break;
0217 case RISCVVector::BI__builtin_rvv_sf_vc_vvv_se:
0218 ID = Intrinsic::riscv_sf_vc_vvv_se;
0219 PolicyAttrs = 3;
0220 SegInstSEW = 0;
0221 IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0222 break;
0223 case RISCVVector::BI__builtin_rvv_sf_vc_vvw_se:
0224 ID = Intrinsic::riscv_sf_vc_vvw_se;
0225 PolicyAttrs = 3;
0226 SegInstSEW = 0;
0227 IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0228 break;
0229 case RISCVVector::BI__builtin_rvv_sf_vc_x_se:
0230 ID = Intrinsic::riscv_sf_vc_x_se;
0231 PolicyAttrs = 3;
0232 SegInstSEW = 0;
0233 IntrinsicTypes = {Ops[0]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0234 break;
0235 case RISCVVector::BI__builtin_rvv_sf_vc_xv_se:
0236 ID = Intrinsic::riscv_sf_vc_xv_se;
0237 PolicyAttrs = 3;
0238 SegInstSEW = 0;
0239 IntrinsicTypes = {Ops[0]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0240 break;
0241 case RISCVVector::BI__builtin_rvv_sf_vc_xvv_se:
0242 ID = Intrinsic::riscv_sf_vc_xvv_se;
0243 PolicyAttrs = 3;
0244 SegInstSEW = 0;
0245 IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0246 break;
0247 case RISCVVector::BI__builtin_rvv_sf_vc_xvw_se:
0248 ID = Intrinsic::riscv_sf_vc_xvw_se;
0249 PolicyAttrs = 3;
0250 SegInstSEW = 0;
0251 IntrinsicTypes = {Ops[0]->getType(), Ops[1]->getType(), Ops[2]->getType(), Ops[3]->getType(), Ops.back()->getType()};
0252 break;
0253 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_tu:
0254 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_tu:
0255 ID = Intrinsic::riscv_sf_vfnrclip_x_f_qf;
0256 PolicyAttrs = 2;
0257 SegInstSEW = 0;
0258 IsMasked = false;
0259 if (SegInstSEW == (unsigned)-1) {
0260 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0261 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0262 }
0263
0264 {
0265 // LLVM intrinsic
0266 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0267 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0268
0269 SmallVector<llvm::Value*, 7> Operands;
0270 bool HasMaskedOff = !(
0271 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0272 (!IsMasked && PolicyAttrs & RVV_VTA));
0273 bool HasRoundModeOp = IsMasked ?
0274 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0275 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0276
0277 unsigned Offset = IsMasked ?
0278 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0279
0280 if (!HasMaskedOff)
0281 Operands.push_back(llvm::PoisonValue::get(ResultType));
0282 else
0283 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0284
0285 Operands.push_back(Ops[Offset]); // op0
0286 Operands.push_back(Ops[Offset + 1]); // op1
0287
0288 if (IsMasked)
0289 Operands.push_back(Ops[0]); // mask
0290
0291 if (HasRoundModeOp) {
0292 Operands.push_back(Ops[Offset + 2]); // frm
0293 Operands.push_back(Ops[Offset + 3]); // vl
0294 } else {
0295 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0296 Operands.push_back(Ops[Offset + 2]); // vl
0297 }
0298
0299 if (IsMasked)
0300 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0301
0302 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0303 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0304 return Builder.CreateCall(F, Operands, "");
0305 }
0306 break;
0307 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm:
0308 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf:
0309 ID = Intrinsic::riscv_sf_vfnrclip_x_f_qf;
0310 PolicyAttrs = 3;
0311 SegInstSEW = 0;
0312 IsMasked = false;
0313 if (SegInstSEW == (unsigned)-1) {
0314 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0315 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0316 }
0317
0318 {
0319 // LLVM intrinsic
0320 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0321 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0322
0323 SmallVector<llvm::Value*, 7> Operands;
0324 bool HasMaskedOff = !(
0325 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0326 (!IsMasked && PolicyAttrs & RVV_VTA));
0327 bool HasRoundModeOp = IsMasked ?
0328 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0329 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0330
0331 unsigned Offset = IsMasked ?
0332 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0333
0334 if (!HasMaskedOff)
0335 Operands.push_back(llvm::PoisonValue::get(ResultType));
0336 else
0337 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0338
0339 Operands.push_back(Ops[Offset]); // op0
0340 Operands.push_back(Ops[Offset + 1]); // op1
0341
0342 if (IsMasked)
0343 Operands.push_back(Ops[0]); // mask
0344
0345 if (HasRoundModeOp) {
0346 Operands.push_back(Ops[Offset + 2]); // frm
0347 Operands.push_back(Ops[Offset + 3]); // vl
0348 } else {
0349 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0350 Operands.push_back(Ops[Offset + 2]); // vl
0351 }
0352
0353 if (IsMasked)
0354 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0355
0356 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0357 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0358 return Builder.CreateCall(F, Operands, "");
0359 }
0360 break;
0361 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_tum:
0362 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_tum:
0363 ID = Intrinsic::riscv_sf_vfnrclip_x_f_qf_mask;
0364 PolicyAttrs = 2;
0365 SegInstSEW = 0;
0366 IsMasked = true;
0367 if (SegInstSEW == (unsigned)-1) {
0368 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0369 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0370 }
0371
0372 {
0373 // LLVM intrinsic
0374 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0375 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0376
0377 SmallVector<llvm::Value*, 7> Operands;
0378 bool HasMaskedOff = !(
0379 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0380 (!IsMasked && PolicyAttrs & RVV_VTA));
0381 bool HasRoundModeOp = IsMasked ?
0382 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0383 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0384
0385 unsigned Offset = IsMasked ?
0386 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0387
0388 if (!HasMaskedOff)
0389 Operands.push_back(llvm::PoisonValue::get(ResultType));
0390 else
0391 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0392
0393 Operands.push_back(Ops[Offset]); // op0
0394 Operands.push_back(Ops[Offset + 1]); // op1
0395
0396 if (IsMasked)
0397 Operands.push_back(Ops[0]); // mask
0398
0399 if (HasRoundModeOp) {
0400 Operands.push_back(Ops[Offset + 2]); // frm
0401 Operands.push_back(Ops[Offset + 3]); // vl
0402 } else {
0403 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0404 Operands.push_back(Ops[Offset + 2]); // vl
0405 }
0406
0407 if (IsMasked)
0408 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0409
0410 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0411 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0412 return Builder.CreateCall(F, Operands, "");
0413 }
0414 break;
0415 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_m:
0416 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_m:
0417 ID = Intrinsic::riscv_sf_vfnrclip_x_f_qf_mask;
0418 PolicyAttrs = 3;
0419 SegInstSEW = 0;
0420 IsMasked = true;
0421 if (SegInstSEW == (unsigned)-1) {
0422 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0423 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0424 }
0425
0426 {
0427 // LLVM intrinsic
0428 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0429 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0430
0431 SmallVector<llvm::Value*, 7> Operands;
0432 bool HasMaskedOff = !(
0433 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0434 (!IsMasked && PolicyAttrs & RVV_VTA));
0435 bool HasRoundModeOp = IsMasked ?
0436 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0437 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0438
0439 unsigned Offset = IsMasked ?
0440 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0441
0442 if (!HasMaskedOff)
0443 Operands.push_back(llvm::PoisonValue::get(ResultType));
0444 else
0445 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0446
0447 Operands.push_back(Ops[Offset]); // op0
0448 Operands.push_back(Ops[Offset + 1]); // op1
0449
0450 if (IsMasked)
0451 Operands.push_back(Ops[0]); // mask
0452
0453 if (HasRoundModeOp) {
0454 Operands.push_back(Ops[Offset + 2]); // frm
0455 Operands.push_back(Ops[Offset + 3]); // vl
0456 } else {
0457 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0458 Operands.push_back(Ops[Offset + 2]); // vl
0459 }
0460
0461 if (IsMasked)
0462 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0463
0464 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0465 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0466 return Builder.CreateCall(F, Operands, "");
0467 }
0468 break;
0469 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_tumu:
0470 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_tumu:
0471 ID = Intrinsic::riscv_sf_vfnrclip_x_f_qf_mask;
0472 PolicyAttrs = 0;
0473 SegInstSEW = 0;
0474 IsMasked = true;
0475 if (SegInstSEW == (unsigned)-1) {
0476 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0477 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0478 }
0479
0480 {
0481 // LLVM intrinsic
0482 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0483 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0484
0485 SmallVector<llvm::Value*, 7> Operands;
0486 bool HasMaskedOff = !(
0487 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0488 (!IsMasked && PolicyAttrs & RVV_VTA));
0489 bool HasRoundModeOp = IsMasked ?
0490 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0491 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0492
0493 unsigned Offset = IsMasked ?
0494 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0495
0496 if (!HasMaskedOff)
0497 Operands.push_back(llvm::PoisonValue::get(ResultType));
0498 else
0499 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0500
0501 Operands.push_back(Ops[Offset]); // op0
0502 Operands.push_back(Ops[Offset + 1]); // op1
0503
0504 if (IsMasked)
0505 Operands.push_back(Ops[0]); // mask
0506
0507 if (HasRoundModeOp) {
0508 Operands.push_back(Ops[Offset + 2]); // frm
0509 Operands.push_back(Ops[Offset + 3]); // vl
0510 } else {
0511 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0512 Operands.push_back(Ops[Offset + 2]); // vl
0513 }
0514
0515 if (IsMasked)
0516 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0517
0518 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0519 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0520 return Builder.CreateCall(F, Operands, "");
0521 }
0522 break;
0523 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_rm_mu:
0524 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_x_f_qf_mu:
0525 ID = Intrinsic::riscv_sf_vfnrclip_x_f_qf_mask;
0526 PolicyAttrs = 1;
0527 SegInstSEW = 0;
0528 IsMasked = true;
0529 if (SegInstSEW == (unsigned)-1) {
0530 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0531 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0532 }
0533
0534 {
0535 // LLVM intrinsic
0536 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0537 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0538
0539 SmallVector<llvm::Value*, 7> Operands;
0540 bool HasMaskedOff = !(
0541 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0542 (!IsMasked && PolicyAttrs & RVV_VTA));
0543 bool HasRoundModeOp = IsMasked ?
0544 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0545 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0546
0547 unsigned Offset = IsMasked ?
0548 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0549
0550 if (!HasMaskedOff)
0551 Operands.push_back(llvm::PoisonValue::get(ResultType));
0552 else
0553 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0554
0555 Operands.push_back(Ops[Offset]); // op0
0556 Operands.push_back(Ops[Offset + 1]); // op1
0557
0558 if (IsMasked)
0559 Operands.push_back(Ops[0]); // mask
0560
0561 if (HasRoundModeOp) {
0562 Operands.push_back(Ops[Offset + 2]); // frm
0563 Operands.push_back(Ops[Offset + 3]); // vl
0564 } else {
0565 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0566 Operands.push_back(Ops[Offset + 2]); // vl
0567 }
0568
0569 if (IsMasked)
0570 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0571
0572 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0573 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0574 return Builder.CreateCall(F, Operands, "");
0575 }
0576 break;
0577 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_tu:
0578 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_tu:
0579 ID = Intrinsic::riscv_sf_vfnrclip_xu_f_qf;
0580 PolicyAttrs = 2;
0581 SegInstSEW = 0;
0582 IsMasked = false;
0583 if (SegInstSEW == (unsigned)-1) {
0584 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0585 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0586 }
0587
0588 {
0589 // LLVM intrinsic
0590 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0591 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0592
0593 SmallVector<llvm::Value*, 7> Operands;
0594 bool HasMaskedOff = !(
0595 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0596 (!IsMasked && PolicyAttrs & RVV_VTA));
0597 bool HasRoundModeOp = IsMasked ?
0598 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0599 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0600
0601 unsigned Offset = IsMasked ?
0602 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0603
0604 if (!HasMaskedOff)
0605 Operands.push_back(llvm::PoisonValue::get(ResultType));
0606 else
0607 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0608
0609 Operands.push_back(Ops[Offset]); // op0
0610 Operands.push_back(Ops[Offset + 1]); // op1
0611
0612 if (IsMasked)
0613 Operands.push_back(Ops[0]); // mask
0614
0615 if (HasRoundModeOp) {
0616 Operands.push_back(Ops[Offset + 2]); // frm
0617 Operands.push_back(Ops[Offset + 3]); // vl
0618 } else {
0619 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0620 Operands.push_back(Ops[Offset + 2]); // vl
0621 }
0622
0623 if (IsMasked)
0624 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0625
0626 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0627 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0628 return Builder.CreateCall(F, Operands, "");
0629 }
0630 break;
0631 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm:
0632 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf:
0633 ID = Intrinsic::riscv_sf_vfnrclip_xu_f_qf;
0634 PolicyAttrs = 3;
0635 SegInstSEW = 0;
0636 IsMasked = false;
0637 if (SegInstSEW == (unsigned)-1) {
0638 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0639 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0640 }
0641
0642 {
0643 // LLVM intrinsic
0644 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0645 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0646
0647 SmallVector<llvm::Value*, 7> Operands;
0648 bool HasMaskedOff = !(
0649 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0650 (!IsMasked && PolicyAttrs & RVV_VTA));
0651 bool HasRoundModeOp = IsMasked ?
0652 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0653 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0654
0655 unsigned Offset = IsMasked ?
0656 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0657
0658 if (!HasMaskedOff)
0659 Operands.push_back(llvm::PoisonValue::get(ResultType));
0660 else
0661 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0662
0663 Operands.push_back(Ops[Offset]); // op0
0664 Operands.push_back(Ops[Offset + 1]); // op1
0665
0666 if (IsMasked)
0667 Operands.push_back(Ops[0]); // mask
0668
0669 if (HasRoundModeOp) {
0670 Operands.push_back(Ops[Offset + 2]); // frm
0671 Operands.push_back(Ops[Offset + 3]); // vl
0672 } else {
0673 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0674 Operands.push_back(Ops[Offset + 2]); // vl
0675 }
0676
0677 if (IsMasked)
0678 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0679
0680 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0681 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0682 return Builder.CreateCall(F, Operands, "");
0683 }
0684 break;
0685 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_tum:
0686 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_tum:
0687 ID = Intrinsic::riscv_sf_vfnrclip_xu_f_qf_mask;
0688 PolicyAttrs = 2;
0689 SegInstSEW = 0;
0690 IsMasked = true;
0691 if (SegInstSEW == (unsigned)-1) {
0692 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0693 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0694 }
0695
0696 {
0697 // LLVM intrinsic
0698 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0699 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0700
0701 SmallVector<llvm::Value*, 7> Operands;
0702 bool HasMaskedOff = !(
0703 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0704 (!IsMasked && PolicyAttrs & RVV_VTA));
0705 bool HasRoundModeOp = IsMasked ?
0706 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0707 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0708
0709 unsigned Offset = IsMasked ?
0710 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0711
0712 if (!HasMaskedOff)
0713 Operands.push_back(llvm::PoisonValue::get(ResultType));
0714 else
0715 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0716
0717 Operands.push_back(Ops[Offset]); // op0
0718 Operands.push_back(Ops[Offset + 1]); // op1
0719
0720 if (IsMasked)
0721 Operands.push_back(Ops[0]); // mask
0722
0723 if (HasRoundModeOp) {
0724 Operands.push_back(Ops[Offset + 2]); // frm
0725 Operands.push_back(Ops[Offset + 3]); // vl
0726 } else {
0727 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0728 Operands.push_back(Ops[Offset + 2]); // vl
0729 }
0730
0731 if (IsMasked)
0732 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0733
0734 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0735 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0736 return Builder.CreateCall(F, Operands, "");
0737 }
0738 break;
0739 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_m:
0740 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_m:
0741 ID = Intrinsic::riscv_sf_vfnrclip_xu_f_qf_mask;
0742 PolicyAttrs = 3;
0743 SegInstSEW = 0;
0744 IsMasked = true;
0745 if (SegInstSEW == (unsigned)-1) {
0746 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0747 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0748 }
0749
0750 {
0751 // LLVM intrinsic
0752 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0753 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0754
0755 SmallVector<llvm::Value*, 7> Operands;
0756 bool HasMaskedOff = !(
0757 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0758 (!IsMasked && PolicyAttrs & RVV_VTA));
0759 bool HasRoundModeOp = IsMasked ?
0760 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0761 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0762
0763 unsigned Offset = IsMasked ?
0764 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0765
0766 if (!HasMaskedOff)
0767 Operands.push_back(llvm::PoisonValue::get(ResultType));
0768 else
0769 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0770
0771 Operands.push_back(Ops[Offset]); // op0
0772 Operands.push_back(Ops[Offset + 1]); // op1
0773
0774 if (IsMasked)
0775 Operands.push_back(Ops[0]); // mask
0776
0777 if (HasRoundModeOp) {
0778 Operands.push_back(Ops[Offset + 2]); // frm
0779 Operands.push_back(Ops[Offset + 3]); // vl
0780 } else {
0781 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0782 Operands.push_back(Ops[Offset + 2]); // vl
0783 }
0784
0785 if (IsMasked)
0786 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0787
0788 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0789 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0790 return Builder.CreateCall(F, Operands, "");
0791 }
0792 break;
0793 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_tumu:
0794 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_tumu:
0795 ID = Intrinsic::riscv_sf_vfnrclip_xu_f_qf_mask;
0796 PolicyAttrs = 0;
0797 SegInstSEW = 0;
0798 IsMasked = true;
0799 if (SegInstSEW == (unsigned)-1) {
0800 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0801 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0802 }
0803
0804 {
0805 // LLVM intrinsic
0806 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0807 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0808
0809 SmallVector<llvm::Value*, 7> Operands;
0810 bool HasMaskedOff = !(
0811 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0812 (!IsMasked && PolicyAttrs & RVV_VTA));
0813 bool HasRoundModeOp = IsMasked ?
0814 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0815 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0816
0817 unsigned Offset = IsMasked ?
0818 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0819
0820 if (!HasMaskedOff)
0821 Operands.push_back(llvm::PoisonValue::get(ResultType));
0822 else
0823 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0824
0825 Operands.push_back(Ops[Offset]); // op0
0826 Operands.push_back(Ops[Offset + 1]); // op1
0827
0828 if (IsMasked)
0829 Operands.push_back(Ops[0]); // mask
0830
0831 if (HasRoundModeOp) {
0832 Operands.push_back(Ops[Offset + 2]); // frm
0833 Operands.push_back(Ops[Offset + 3]); // vl
0834 } else {
0835 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0836 Operands.push_back(Ops[Offset + 2]); // vl
0837 }
0838
0839 if (IsMasked)
0840 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0841
0842 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0843 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0844 return Builder.CreateCall(F, Operands, "");
0845 }
0846 break;
0847 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_rm_mu:
0848 case RISCVVector::BI__builtin_rvv_sf_vfnrclip_xu_f_qf_mu:
0849 ID = Intrinsic::riscv_sf_vfnrclip_xu_f_qf_mask;
0850 PolicyAttrs = 1;
0851 SegInstSEW = 0;
0852 IsMasked = true;
0853 if (SegInstSEW == (unsigned)-1) {
0854 auto PointeeType = E->getArg(4294967295 )->getType()->getPointeeType();
0855 SegInstSEW = llvm::Log2_64(getContext().getTypeSize(PointeeType));
0856 }
0857
0858 {
0859 // LLVM intrinsic
0860 // Unmasked: (passthru, vector_in, scalar_in, frm, vl)
0861 // Masked: (passthru, vector_in, scalar_in, mask, frm, vl, policy)
0862
0863 SmallVector<llvm::Value*, 7> Operands;
0864 bool HasMaskedOff = !(
0865 (IsMasked && (PolicyAttrs & RVV_VTA) && (PolicyAttrs & RVV_VMA)) ||
0866 (!IsMasked && PolicyAttrs & RVV_VTA));
0867 bool HasRoundModeOp = IsMasked ?
0868 (HasMaskedOff ? Ops.size() == 6 : Ops.size() == 5) :
0869 (HasMaskedOff ? Ops.size() == 5 : Ops.size() == 4);
0870
0871 unsigned Offset = IsMasked ?
0872 (HasMaskedOff ? 2 : 1) : (HasMaskedOff ? 1 : 0);
0873
0874 if (!HasMaskedOff)
0875 Operands.push_back(llvm::PoisonValue::get(ResultType));
0876 else
0877 Operands.push_back(Ops[IsMasked ? 1 : 0]);
0878
0879 Operands.push_back(Ops[Offset]); // op0
0880 Operands.push_back(Ops[Offset + 1]); // op1
0881
0882 if (IsMasked)
0883 Operands.push_back(Ops[0]); // mask
0884
0885 if (HasRoundModeOp) {
0886 Operands.push_back(Ops[Offset + 2]); // frm
0887 Operands.push_back(Ops[Offset + 3]); // vl
0888 } else {
0889 Operands.push_back(ConstantInt::get(Ops[Offset + 2]->getType(), 7)); // frm
0890 Operands.push_back(Ops[Offset + 2]); // vl
0891 }
0892
0893 if (IsMasked)
0894 Operands.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0895
0896 IntrinsicTypes = {ResultType, Ops[Offset]->getType(), Operands.back()->getType()};
0897 llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
0898 return Builder.CreateCall(F, Operands, "");
0899 }
0900 break;
0901 case RISCVVector::BI__builtin_rvv_sf_vfwmacc_4x4x4_tu:
0902 ID = Intrinsic::riscv_sf_vfwmacc_4x4x4;
0903 PolicyAttrs = 2;
0904 SegInstSEW = 0;
0905 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0906 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0907 break;
0908 case RISCVVector::BI__builtin_rvv_sf_vfwmacc_4x4x4:
0909 ID = Intrinsic::riscv_sf_vfwmacc_4x4x4;
0910 PolicyAttrs = 3;
0911 SegInstSEW = 0;
0912 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0913 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0914 break;
0915 case RISCVVector::BI__builtin_rvv_sf_vqmacc_2x8x2_tu:
0916 ID = Intrinsic::riscv_sf_vqmacc_2x8x2;
0917 PolicyAttrs = 2;
0918 SegInstSEW = 0;
0919 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0920 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0921 break;
0922 case RISCVVector::BI__builtin_rvv_sf_vqmacc_2x8x2:
0923 ID = Intrinsic::riscv_sf_vqmacc_2x8x2;
0924 PolicyAttrs = 3;
0925 SegInstSEW = 0;
0926 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0927 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0928 break;
0929 case RISCVVector::BI__builtin_rvv_sf_vqmacc_4x8x4_tu:
0930 ID = Intrinsic::riscv_sf_vqmacc_4x8x4;
0931 PolicyAttrs = 2;
0932 SegInstSEW = 0;
0933 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0934 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0935 break;
0936 case RISCVVector::BI__builtin_rvv_sf_vqmacc_4x8x4:
0937 ID = Intrinsic::riscv_sf_vqmacc_4x8x4;
0938 PolicyAttrs = 3;
0939 SegInstSEW = 0;
0940 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0941 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0942 break;
0943 case RISCVVector::BI__builtin_rvv_sf_vqmaccsu_2x8x2_tu:
0944 ID = Intrinsic::riscv_sf_vqmaccsu_2x8x2;
0945 PolicyAttrs = 2;
0946 SegInstSEW = 0;
0947 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0948 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0949 break;
0950 case RISCVVector::BI__builtin_rvv_sf_vqmaccsu_2x8x2:
0951 ID = Intrinsic::riscv_sf_vqmaccsu_2x8x2;
0952 PolicyAttrs = 3;
0953 SegInstSEW = 0;
0954 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0955 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0956 break;
0957 case RISCVVector::BI__builtin_rvv_sf_vqmaccsu_4x8x4_tu:
0958 ID = Intrinsic::riscv_sf_vqmaccsu_4x8x4;
0959 PolicyAttrs = 2;
0960 SegInstSEW = 0;
0961 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0962 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0963 break;
0964 case RISCVVector::BI__builtin_rvv_sf_vqmaccsu_4x8x4:
0965 ID = Intrinsic::riscv_sf_vqmaccsu_4x8x4;
0966 PolicyAttrs = 3;
0967 SegInstSEW = 0;
0968 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0969 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0970 break;
0971 case RISCVVector::BI__builtin_rvv_sf_vqmaccu_2x8x2_tu:
0972 ID = Intrinsic::riscv_sf_vqmaccu_2x8x2;
0973 PolicyAttrs = 2;
0974 SegInstSEW = 0;
0975 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0976 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0977 break;
0978 case RISCVVector::BI__builtin_rvv_sf_vqmaccu_2x8x2:
0979 ID = Intrinsic::riscv_sf_vqmaccu_2x8x2;
0980 PolicyAttrs = 3;
0981 SegInstSEW = 0;
0982 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0983 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0984 break;
0985 case RISCVVector::BI__builtin_rvv_sf_vqmaccu_4x8x4_tu:
0986 ID = Intrinsic::riscv_sf_vqmaccu_4x8x4;
0987 PolicyAttrs = 2;
0988 SegInstSEW = 0;
0989 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0990 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0991 break;
0992 case RISCVVector::BI__builtin_rvv_sf_vqmaccu_4x8x4:
0993 ID = Intrinsic::riscv_sf_vqmaccu_4x8x4;
0994 PolicyAttrs = 3;
0995 SegInstSEW = 0;
0996 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
0997 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
0998 break;
0999 case RISCVVector::BI__builtin_rvv_sf_vqmaccus_2x8x2_tu:
1000 ID = Intrinsic::riscv_sf_vqmaccus_2x8x2;
1001 PolicyAttrs = 2;
1002 SegInstSEW = 0;
1003 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
1004 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
1005 break;
1006 case RISCVVector::BI__builtin_rvv_sf_vqmaccus_2x8x2:
1007 ID = Intrinsic::riscv_sf_vqmaccus_2x8x2;
1008 PolicyAttrs = 3;
1009 SegInstSEW = 0;
1010 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
1011 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
1012 break;
1013 case RISCVVector::BI__builtin_rvv_sf_vqmaccus_4x8x4_tu:
1014 ID = Intrinsic::riscv_sf_vqmaccus_4x8x4;
1015 PolicyAttrs = 2;
1016 SegInstSEW = 0;
1017 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
1018 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
1019 break;
1020 case RISCVVector::BI__builtin_rvv_sf_vqmaccus_4x8x4:
1021 ID = Intrinsic::riscv_sf_vqmaccus_4x8x4;
1022 PolicyAttrs = 3;
1023 SegInstSEW = 0;
1024 Ops.push_back(ConstantInt::get(Ops.back()->getType(), PolicyAttrs));
1025 IntrinsicTypes = {ResultType, Ops[1]->getType(), Ops[2]->getType(), Ops.back()->getType()};
1026 break;
1027
