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EIC code displayed by LXR

 
 

    


Warning, /include/clang/Basic/arm_sve_sema_rangechecks.inc is written in an unsupported language. File is not indexed.

0001 #ifdef GET_SVE_IMMEDIATE_CHECK
0002 case SVE::BI__builtin_sve_svasrd_n_s16_m:
0003 ImmChecks.emplace_back(2, 3, 16);
0004   break;
0005 case SVE::BI__builtin_sve_svasrd_n_s16_x:
0006 ImmChecks.emplace_back(2, 3, 16);
0007   break;
0008 case SVE::BI__builtin_sve_svasrd_n_s16_z:
0009 ImmChecks.emplace_back(2, 3, 16);
0010   break;
0011 case SVE::BI__builtin_sve_svasrd_n_s32_m:
0012 ImmChecks.emplace_back(2, 3, 32);
0013   break;
0014 case SVE::BI__builtin_sve_svasrd_n_s32_x:
0015 ImmChecks.emplace_back(2, 3, 32);
0016   break;
0017 case SVE::BI__builtin_sve_svasrd_n_s32_z:
0018 ImmChecks.emplace_back(2, 3, 32);
0019   break;
0020 case SVE::BI__builtin_sve_svasrd_n_s64_m:
0021 ImmChecks.emplace_back(2, 3, 64);
0022   break;
0023 case SVE::BI__builtin_sve_svasrd_n_s64_x:
0024 ImmChecks.emplace_back(2, 3, 64);
0025   break;
0026 case SVE::BI__builtin_sve_svasrd_n_s64_z:
0027 ImmChecks.emplace_back(2, 3, 64);
0028   break;
0029 case SVE::BI__builtin_sve_svasrd_n_s8_m:
0030 ImmChecks.emplace_back(2, 3, 8);
0031   break;
0032 case SVE::BI__builtin_sve_svasrd_n_s8_x:
0033 ImmChecks.emplace_back(2, 3, 8);
0034   break;
0035 case SVE::BI__builtin_sve_svasrd_n_s8_z:
0036 ImmChecks.emplace_back(2, 3, 8);
0037   break;
0038 case SVE::BI__builtin_sve_svbfdot_lane_f32:
0039 ImmChecks.emplace_back(3, 16, 0);
0040   break;
0041 case SVE::BI__builtin_sve_svbfmlalb_lane_f32:
0042 ImmChecks.emplace_back(3, 6, 0);
0043   break;
0044 case SVE::BI__builtin_sve_svbfmlalt_lane_f32:
0045 ImmChecks.emplace_back(3, 6, 0);
0046   break;
0047 case SVE::BI__builtin_sve_svbfmlslb_lane_f32:
0048 ImmChecks.emplace_back(3, 6, 0);
0049   break;
0050 case SVE::BI__builtin_sve_svbfmlslt_lane_f32:
0051 ImmChecks.emplace_back(3, 6, 0);
0052   break;
0053 case SVE::BI__builtin_sve_svcadd_f16_m:
0054 ImmChecks.emplace_back(3, 11, 0);
0055   break;
0056 case SVE::BI__builtin_sve_svcadd_f16_x:
0057 ImmChecks.emplace_back(3, 11, 0);
0058   break;
0059 case SVE::BI__builtin_sve_svcadd_f16_z:
0060 ImmChecks.emplace_back(3, 11, 0);
0061   break;
0062 case SVE::BI__builtin_sve_svcadd_f32_m:
0063 ImmChecks.emplace_back(3, 11, 0);
0064   break;
0065 case SVE::BI__builtin_sve_svcadd_f32_x:
0066 ImmChecks.emplace_back(3, 11, 0);
0067   break;
0068 case SVE::BI__builtin_sve_svcadd_f32_z:
0069 ImmChecks.emplace_back(3, 11, 0);
0070   break;
0071 case SVE::BI__builtin_sve_svcadd_f64_m:
0072 ImmChecks.emplace_back(3, 11, 0);
0073   break;
0074 case SVE::BI__builtin_sve_svcadd_f64_x:
0075 ImmChecks.emplace_back(3, 11, 0);
0076   break;
0077 case SVE::BI__builtin_sve_svcadd_f64_z:
0078 ImmChecks.emplace_back(3, 11, 0);
0079   break;
0080 case SVE::BI__builtin_sve_svcadd_s16:
0081 ImmChecks.emplace_back(2, 11, 0);
0082   break;
0083 case SVE::BI__builtin_sve_svcadd_s32:
0084 ImmChecks.emplace_back(2, 11, 0);
0085   break;
0086 case SVE::BI__builtin_sve_svcadd_s64:
0087 ImmChecks.emplace_back(2, 11, 0);
0088   break;
0089 case SVE::BI__builtin_sve_svcadd_s8:
0090 ImmChecks.emplace_back(2, 11, 0);
0091   break;
0092 case SVE::BI__builtin_sve_svcadd_u16:
0093 ImmChecks.emplace_back(2, 11, 0);
0094   break;
0095 case SVE::BI__builtin_sve_svcadd_u32:
0096 ImmChecks.emplace_back(2, 11, 0);
0097   break;
0098 case SVE::BI__builtin_sve_svcadd_u64:
0099 ImmChecks.emplace_back(2, 11, 0);
0100   break;
0101 case SVE::BI__builtin_sve_svcadd_u8:
0102 ImmChecks.emplace_back(2, 11, 0);
0103   break;
0104 case SVE::BI__builtin_sve_svcdot_lane_s32:
0105 ImmChecks.emplace_back(4, 12, 0);
0106 ImmChecks.emplace_back(3, 10, 8);
0107   break;
0108 case SVE::BI__builtin_sve_svcdot_lane_s64:
0109 ImmChecks.emplace_back(4, 12, 0);
0110 ImmChecks.emplace_back(3, 10, 16);
0111   break;
0112 case SVE::BI__builtin_sve_svcdot_s32:
0113 ImmChecks.emplace_back(3, 12, 0);
0114   break;
0115 case SVE::BI__builtin_sve_svcdot_s64:
0116 ImmChecks.emplace_back(3, 12, 0);
0117   break;
0118 case SVE::BI__builtin_sve_svcmla_f16_m:
0119 ImmChecks.emplace_back(4, 12, 0);
0120   break;
0121 case SVE::BI__builtin_sve_svcmla_f16_x:
0122 ImmChecks.emplace_back(4, 12, 0);
0123   break;
0124 case SVE::BI__builtin_sve_svcmla_f16_z:
0125 ImmChecks.emplace_back(4, 12, 0);
0126   break;
0127 case SVE::BI__builtin_sve_svcmla_f32_m:
0128 ImmChecks.emplace_back(4, 12, 0);
0129   break;
0130 case SVE::BI__builtin_sve_svcmla_f32_x:
0131 ImmChecks.emplace_back(4, 12, 0);
0132   break;
0133 case SVE::BI__builtin_sve_svcmla_f32_z:
0134 ImmChecks.emplace_back(4, 12, 0);
0135   break;
0136 case SVE::BI__builtin_sve_svcmla_f64_m:
0137 ImmChecks.emplace_back(4, 12, 0);
0138   break;
0139 case SVE::BI__builtin_sve_svcmla_f64_x:
0140 ImmChecks.emplace_back(4, 12, 0);
0141   break;
0142 case SVE::BI__builtin_sve_svcmla_f64_z:
0143 ImmChecks.emplace_back(4, 12, 0);
0144   break;
0145 case SVE::BI__builtin_sve_svcmla_lane_f16:
0146 ImmChecks.emplace_back(3, 9, 16);
0147 ImmChecks.emplace_back(4, 12, 0);
0148   break;
0149 case SVE::BI__builtin_sve_svcmla_lane_f32:
0150 ImmChecks.emplace_back(3, 9, 32);
0151 ImmChecks.emplace_back(4, 12, 0);
0152   break;
0153 case SVE::BI__builtin_sve_svcmla_lane_s16:
0154 ImmChecks.emplace_back(3, 9, 16);
0155 ImmChecks.emplace_back(4, 12, 0);
0156   break;
0157 case SVE::BI__builtin_sve_svcmla_lane_s32:
0158 ImmChecks.emplace_back(3, 9, 32);
0159 ImmChecks.emplace_back(4, 12, 0);
0160   break;
0161 case SVE::BI__builtin_sve_svcmla_lane_u16:
0162 ImmChecks.emplace_back(3, 9, 16);
0163 ImmChecks.emplace_back(4, 12, 0);
0164   break;
0165 case SVE::BI__builtin_sve_svcmla_lane_u32:
0166 ImmChecks.emplace_back(3, 9, 32);
0167 ImmChecks.emplace_back(4, 12, 0);
0168   break;
0169 case SVE::BI__builtin_sve_svcmla_s16:
0170 ImmChecks.emplace_back(3, 12, 0);
0171   break;
0172 case SVE::BI__builtin_sve_svcmla_s32:
0173 ImmChecks.emplace_back(3, 12, 0);
0174   break;
0175 case SVE::BI__builtin_sve_svcmla_s64:
0176 ImmChecks.emplace_back(3, 12, 0);
0177   break;
0178 case SVE::BI__builtin_sve_svcmla_s8:
0179 ImmChecks.emplace_back(3, 12, 0);
0180   break;
0181 case SVE::BI__builtin_sve_svcmla_u16:
0182 ImmChecks.emplace_back(3, 12, 0);
0183   break;
0184 case SVE::BI__builtin_sve_svcmla_u32:
0185 ImmChecks.emplace_back(3, 12, 0);
0186   break;
0187 case SVE::BI__builtin_sve_svcmla_u64:
0188 ImmChecks.emplace_back(3, 12, 0);
0189   break;
0190 case SVE::BI__builtin_sve_svcmla_u8:
0191 ImmChecks.emplace_back(3, 12, 0);
0192   break;
0193 case SVE::BI__builtin_sve_svcntb_pat:
0194 ImmChecks.emplace_back(0, 0, 0);
0195   break;
0196 case SVE::BI__builtin_sve_svcntd_pat:
0197 ImmChecks.emplace_back(0, 0, 0);
0198   break;
0199 case SVE::BI__builtin_sve_svcnth_pat:
0200 ImmChecks.emplace_back(0, 0, 0);
0201   break;
0202 case SVE::BI__builtin_sve_svcntp_c16:
0203 ImmChecks.emplace_back(1, 20, 0);
0204   break;
0205 case SVE::BI__builtin_sve_svcntp_c32:
0206 ImmChecks.emplace_back(1, 20, 0);
0207   break;
0208 case SVE::BI__builtin_sve_svcntp_c64:
0209 ImmChecks.emplace_back(1, 20, 0);
0210   break;
0211 case SVE::BI__builtin_sve_svcntp_c8:
0212 ImmChecks.emplace_back(1, 20, 0);
0213   break;
0214 case SVE::BI__builtin_sve_svcntw_pat:
0215 ImmChecks.emplace_back(0, 0, 0);
0216   break;
0217 case SVE::BI__builtin_sve_svdot_lane_f16_mf8_fpm:
0218 ImmChecks.emplace_back(3, 6, 0);
0219   break;
0220 case SVE::BI__builtin_sve_svdot_lane_f32_f16:
0221 ImmChecks.emplace_back(3, 16, 0);
0222   break;
0223 case SVE::BI__builtin_sve_svdot_lane_f32_mf8_fpm:
0224 ImmChecks.emplace_back(3, 16, 0);
0225   break;
0226 case SVE::BI__builtin_sve_svdot_lane_s32:
0227 ImmChecks.emplace_back(3, 10, 8);
0228   break;
0229 case SVE::BI__builtin_sve_svdot_lane_s32_s16:
0230 ImmChecks.emplace_back(3, 16, 0);
0231   break;
0232 case SVE::BI__builtin_sve_svdot_lane_s64:
0233 ImmChecks.emplace_back(3, 10, 16);
0234   break;
0235 case SVE::BI__builtin_sve_svdot_lane_u32:
0236 ImmChecks.emplace_back(3, 10, 8);
0237   break;
0238 case SVE::BI__builtin_sve_svdot_lane_u32_u16:
0239 ImmChecks.emplace_back(3, 16, 0);
0240   break;
0241 case SVE::BI__builtin_sve_svdot_lane_u64:
0242 ImmChecks.emplace_back(3, 10, 16);
0243   break;
0244 case SVE::BI__builtin_sve_svdup_laneq_bf16:
0245 ImmChecks.emplace_back(1, 6, 0);
0246   break;
0247 case SVE::BI__builtin_sve_svdup_laneq_f16:
0248 ImmChecks.emplace_back(1, 6, 0);
0249   break;
0250 case SVE::BI__builtin_sve_svdup_laneq_f32:
0251 ImmChecks.emplace_back(1, 16, 0);
0252   break;
0253 case SVE::BI__builtin_sve_svdup_laneq_f64:
0254 ImmChecks.emplace_back(1, 14, 0);
0255   break;
0256 case SVE::BI__builtin_sve_svdup_laneq_mf8:
0257 ImmChecks.emplace_back(1, 18, 0);
0258   break;
0259 case SVE::BI__builtin_sve_svdup_laneq_s16:
0260 ImmChecks.emplace_back(1, 6, 0);
0261   break;
0262 case SVE::BI__builtin_sve_svdup_laneq_s32:
0263 ImmChecks.emplace_back(1, 16, 0);
0264   break;
0265 case SVE::BI__builtin_sve_svdup_laneq_s64:
0266 ImmChecks.emplace_back(1, 14, 0);
0267   break;
0268 case SVE::BI__builtin_sve_svdup_laneq_s8:
0269 ImmChecks.emplace_back(1, 18, 0);
0270   break;
0271 case SVE::BI__builtin_sve_svdup_laneq_u16:
0272 ImmChecks.emplace_back(1, 6, 0);
0273   break;
0274 case SVE::BI__builtin_sve_svdup_laneq_u32:
0275 ImmChecks.emplace_back(1, 16, 0);
0276   break;
0277 case SVE::BI__builtin_sve_svdup_laneq_u64:
0278 ImmChecks.emplace_back(1, 14, 0);
0279   break;
0280 case SVE::BI__builtin_sve_svdup_laneq_u8:
0281 ImmChecks.emplace_back(1, 18, 0);
0282   break;
0283 case SVE::BI__builtin_sve_svext_bf16:
0284 ImmChecks.emplace_back(2, 2, 16);
0285   break;
0286 case SVE::BI__builtin_sve_svext_f16:
0287 ImmChecks.emplace_back(2, 2, 16);
0288   break;
0289 case SVE::BI__builtin_sve_svext_f32:
0290 ImmChecks.emplace_back(2, 2, 32);
0291   break;
0292 case SVE::BI__builtin_sve_svext_f64:
0293 ImmChecks.emplace_back(2, 2, 64);
0294   break;
0295 case SVE::BI__builtin_sve_svext_s16:
0296 ImmChecks.emplace_back(2, 2, 16);
0297   break;
0298 case SVE::BI__builtin_sve_svext_s32:
0299 ImmChecks.emplace_back(2, 2, 32);
0300   break;
0301 case SVE::BI__builtin_sve_svext_s64:
0302 ImmChecks.emplace_back(2, 2, 64);
0303   break;
0304 case SVE::BI__builtin_sve_svext_s8:
0305 ImmChecks.emplace_back(2, 2, 8);
0306   break;
0307 case SVE::BI__builtin_sve_svext_u16:
0308 ImmChecks.emplace_back(2, 2, 16);
0309   break;
0310 case SVE::BI__builtin_sve_svext_u32:
0311 ImmChecks.emplace_back(2, 2, 32);
0312   break;
0313 case SVE::BI__builtin_sve_svext_u64:
0314 ImmChecks.emplace_back(2, 2, 64);
0315   break;
0316 case SVE::BI__builtin_sve_svext_u8:
0317 ImmChecks.emplace_back(2, 2, 8);
0318   break;
0319 case SVE::BI__builtin_sve_svextq_bf16:
0320 ImmChecks.emplace_back(2, 7, 16);
0321   break;
0322 case SVE::BI__builtin_sve_svextq_f16:
0323 ImmChecks.emplace_back(2, 7, 16);
0324   break;
0325 case SVE::BI__builtin_sve_svextq_f32:
0326 ImmChecks.emplace_back(2, 7, 32);
0327   break;
0328 case SVE::BI__builtin_sve_svextq_f64:
0329 ImmChecks.emplace_back(2, 7, 64);
0330   break;
0331 case SVE::BI__builtin_sve_svextq_mf8:
0332 ImmChecks.emplace_back(2, 7, 8);
0333   break;
0334 case SVE::BI__builtin_sve_svextq_s16:
0335 ImmChecks.emplace_back(2, 7, 16);
0336   break;
0337 case SVE::BI__builtin_sve_svextq_s32:
0338 ImmChecks.emplace_back(2, 7, 32);
0339   break;
0340 case SVE::BI__builtin_sve_svextq_s64:
0341 ImmChecks.emplace_back(2, 7, 64);
0342   break;
0343 case SVE::BI__builtin_sve_svextq_s8:
0344 ImmChecks.emplace_back(2, 7, 8);
0345   break;
0346 case SVE::BI__builtin_sve_svextq_u16:
0347 ImmChecks.emplace_back(2, 7, 16);
0348   break;
0349 case SVE::BI__builtin_sve_svextq_u32:
0350 ImmChecks.emplace_back(2, 7, 32);
0351   break;
0352 case SVE::BI__builtin_sve_svextq_u64:
0353 ImmChecks.emplace_back(2, 7, 64);
0354   break;
0355 case SVE::BI__builtin_sve_svextq_u8:
0356 ImmChecks.emplace_back(2, 7, 8);
0357   break;
0358 case SVE::BI__builtin_sve_svget2_b:
0359 ImmChecks.emplace_back(1, 14, 0);
0360   break;
0361 case SVE::BI__builtin_sve_svget2_bf16:
0362 ImmChecks.emplace_back(1, 14, 0);
0363   break;
0364 case SVE::BI__builtin_sve_svget2_f16:
0365 ImmChecks.emplace_back(1, 14, 0);
0366   break;
0367 case SVE::BI__builtin_sve_svget2_f32:
0368 ImmChecks.emplace_back(1, 14, 0);
0369   break;
0370 case SVE::BI__builtin_sve_svget2_f64:
0371 ImmChecks.emplace_back(1, 14, 0);
0372   break;
0373 case SVE::BI__builtin_sve_svget2_s16:
0374 ImmChecks.emplace_back(1, 14, 0);
0375   break;
0376 case SVE::BI__builtin_sve_svget2_s32:
0377 ImmChecks.emplace_back(1, 14, 0);
0378   break;
0379 case SVE::BI__builtin_sve_svget2_s64:
0380 ImmChecks.emplace_back(1, 14, 0);
0381   break;
0382 case SVE::BI__builtin_sve_svget2_s8:
0383 ImmChecks.emplace_back(1, 14, 0);
0384   break;
0385 case SVE::BI__builtin_sve_svget2_u16:
0386 ImmChecks.emplace_back(1, 14, 0);
0387   break;
0388 case SVE::BI__builtin_sve_svget2_u32:
0389 ImmChecks.emplace_back(1, 14, 0);
0390   break;
0391 case SVE::BI__builtin_sve_svget2_u64:
0392 ImmChecks.emplace_back(1, 14, 0);
0393   break;
0394 case SVE::BI__builtin_sve_svget2_u8:
0395 ImmChecks.emplace_back(1, 14, 0);
0396   break;
0397 case SVE::BI__builtin_sve_svget3_bf16:
0398 ImmChecks.emplace_back(1, 15, 0);
0399   break;
0400 case SVE::BI__builtin_sve_svget3_f16:
0401 ImmChecks.emplace_back(1, 15, 0);
0402   break;
0403 case SVE::BI__builtin_sve_svget3_f32:
0404 ImmChecks.emplace_back(1, 15, 0);
0405   break;
0406 case SVE::BI__builtin_sve_svget3_f64:
0407 ImmChecks.emplace_back(1, 15, 0);
0408   break;
0409 case SVE::BI__builtin_sve_svget3_s16:
0410 ImmChecks.emplace_back(1, 15, 0);
0411   break;
0412 case SVE::BI__builtin_sve_svget3_s32:
0413 ImmChecks.emplace_back(1, 15, 0);
0414   break;
0415 case SVE::BI__builtin_sve_svget3_s64:
0416 ImmChecks.emplace_back(1, 15, 0);
0417   break;
0418 case SVE::BI__builtin_sve_svget3_s8:
0419 ImmChecks.emplace_back(1, 15, 0);
0420   break;
0421 case SVE::BI__builtin_sve_svget3_u16:
0422 ImmChecks.emplace_back(1, 15, 0);
0423   break;
0424 case SVE::BI__builtin_sve_svget3_u32:
0425 ImmChecks.emplace_back(1, 15, 0);
0426   break;
0427 case SVE::BI__builtin_sve_svget3_u64:
0428 ImmChecks.emplace_back(1, 15, 0);
0429   break;
0430 case SVE::BI__builtin_sve_svget3_u8:
0431 ImmChecks.emplace_back(1, 15, 0);
0432   break;
0433 case SVE::BI__builtin_sve_svget4_b:
0434 ImmChecks.emplace_back(1, 16, 0);
0435   break;
0436 case SVE::BI__builtin_sve_svget4_bf16:
0437 ImmChecks.emplace_back(1, 16, 0);
0438   break;
0439 case SVE::BI__builtin_sve_svget4_f16:
0440 ImmChecks.emplace_back(1, 16, 0);
0441   break;
0442 case SVE::BI__builtin_sve_svget4_f32:
0443 ImmChecks.emplace_back(1, 16, 0);
0444   break;
0445 case SVE::BI__builtin_sve_svget4_f64:
0446 ImmChecks.emplace_back(1, 16, 0);
0447   break;
0448 case SVE::BI__builtin_sve_svget4_s16:
0449 ImmChecks.emplace_back(1, 16, 0);
0450   break;
0451 case SVE::BI__builtin_sve_svget4_s32:
0452 ImmChecks.emplace_back(1, 16, 0);
0453   break;
0454 case SVE::BI__builtin_sve_svget4_s64:
0455 ImmChecks.emplace_back(1, 16, 0);
0456   break;
0457 case SVE::BI__builtin_sve_svget4_s8:
0458 ImmChecks.emplace_back(1, 16, 0);
0459   break;
0460 case SVE::BI__builtin_sve_svget4_u16:
0461 ImmChecks.emplace_back(1, 16, 0);
0462   break;
0463 case SVE::BI__builtin_sve_svget4_u32:
0464 ImmChecks.emplace_back(1, 16, 0);
0465   break;
0466 case SVE::BI__builtin_sve_svget4_u64:
0467 ImmChecks.emplace_back(1, 16, 0);
0468   break;
0469 case SVE::BI__builtin_sve_svget4_u8:
0470 ImmChecks.emplace_back(1, 16, 0);
0471   break;
0472 case SVE::BI__builtin_sve_svluti2_lane_bf16:
0473 ImmChecks.emplace_back(2, 6, 0);
0474   break;
0475 case SVE::BI__builtin_sve_svluti2_lane_f16:
0476 ImmChecks.emplace_back(2, 6, 0);
0477   break;
0478 case SVE::BI__builtin_sve_svluti2_lane_s16:
0479 ImmChecks.emplace_back(2, 6, 0);
0480   break;
0481 case SVE::BI__builtin_sve_svluti2_lane_s8:
0482 ImmChecks.emplace_back(2, 16, 0);
0483   break;
0484 case SVE::BI__builtin_sve_svluti2_lane_u16:
0485 ImmChecks.emplace_back(2, 6, 0);
0486   break;
0487 case SVE::BI__builtin_sve_svluti2_lane_u8:
0488 ImmChecks.emplace_back(2, 16, 0);
0489   break;
0490 case SVE::BI__builtin_sve_svluti4_lane_bf16:
0491 ImmChecks.emplace_back(2, 16, 0);
0492   break;
0493 case SVE::BI__builtin_sve_svluti4_lane_bf16_x2:
0494 ImmChecks.emplace_back(2, 16, 0);
0495   break;
0496 case SVE::BI__builtin_sve_svluti4_lane_f16:
0497 ImmChecks.emplace_back(2, 16, 0);
0498   break;
0499 case SVE::BI__builtin_sve_svluti4_lane_f16_x2:
0500 ImmChecks.emplace_back(2, 16, 0);
0501   break;
0502 case SVE::BI__builtin_sve_svluti4_lane_s16:
0503 ImmChecks.emplace_back(2, 16, 0);
0504   break;
0505 case SVE::BI__builtin_sve_svluti4_lane_s16_x2:
0506 ImmChecks.emplace_back(2, 16, 0);
0507   break;
0508 case SVE::BI__builtin_sve_svluti4_lane_s8:
0509 ImmChecks.emplace_back(2, 14, 0);
0510   break;
0511 case SVE::BI__builtin_sve_svluti4_lane_u16:
0512 ImmChecks.emplace_back(2, 16, 0);
0513   break;
0514 case SVE::BI__builtin_sve_svluti4_lane_u16_x2:
0515 ImmChecks.emplace_back(2, 16, 0);
0516   break;
0517 case SVE::BI__builtin_sve_svluti4_lane_u8:
0518 ImmChecks.emplace_back(2, 14, 0);
0519   break;
0520 case SVE::BI__builtin_sve_svmla_lane_bf16:
0521 ImmChecks.emplace_back(3, 7, 16);
0522   break;
0523 case SVE::BI__builtin_sve_svmla_lane_f16:
0524 ImmChecks.emplace_back(3, 7, 16);
0525   break;
0526 case SVE::BI__builtin_sve_svmla_lane_f32:
0527 ImmChecks.emplace_back(3, 7, 32);
0528   break;
0529 case SVE::BI__builtin_sve_svmla_lane_f64:
0530 ImmChecks.emplace_back(3, 7, 64);
0531   break;
0532 case SVE::BI__builtin_sve_svmla_lane_s16:
0533 ImmChecks.emplace_back(3, 7, 16);
0534   break;
0535 case SVE::BI__builtin_sve_svmla_lane_s32:
0536 ImmChecks.emplace_back(3, 7, 32);
0537   break;
0538 case SVE::BI__builtin_sve_svmla_lane_s64:
0539 ImmChecks.emplace_back(3, 7, 64);
0540   break;
0541 case SVE::BI__builtin_sve_svmla_lane_u16:
0542 ImmChecks.emplace_back(3, 7, 16);
0543   break;
0544 case SVE::BI__builtin_sve_svmla_lane_u32:
0545 ImmChecks.emplace_back(3, 7, 32);
0546   break;
0547 case SVE::BI__builtin_sve_svmla_lane_u64:
0548 ImmChecks.emplace_back(3, 7, 64);
0549   break;
0550 case SVE::BI__builtin_sve_svmlalb_lane_f16_mf8_fpm:
0551 ImmChecks.emplace_back(3, 18, 0);
0552   break;
0553 case SVE::BI__builtin_sve_svmlalb_lane_f32:
0554 ImmChecks.emplace_back(3, 7, 16);
0555   break;
0556 case SVE::BI__builtin_sve_svmlalb_lane_s32:
0557 ImmChecks.emplace_back(3, 7, 16);
0558   break;
0559 case SVE::BI__builtin_sve_svmlalb_lane_s64:
0560 ImmChecks.emplace_back(3, 7, 32);
0561   break;
0562 case SVE::BI__builtin_sve_svmlalb_lane_u32:
0563 ImmChecks.emplace_back(3, 7, 16);
0564   break;
0565 case SVE::BI__builtin_sve_svmlalb_lane_u64:
0566 ImmChecks.emplace_back(3, 7, 32);
0567   break;
0568 case SVE::BI__builtin_sve_svmlallbb_lane_f32_mf8_fpm:
0569 ImmChecks.emplace_back(3, 6, 0);
0570   break;
0571 case SVE::BI__builtin_sve_svmlallbt_lane_f32_mf8_fpm:
0572 ImmChecks.emplace_back(3, 6, 0);
0573   break;
0574 case SVE::BI__builtin_sve_svmlalltb_lane_f32_mf8_fpm:
0575 ImmChecks.emplace_back(3, 6, 0);
0576   break;
0577 case SVE::BI__builtin_sve_svmlalltt_lane_f32_mf8_fpm:
0578 ImmChecks.emplace_back(3, 6, 0);
0579   break;
0580 case SVE::BI__builtin_sve_svmlalt_lane_f16_mf8_fpm:
0581 ImmChecks.emplace_back(3, 18, 0);
0582   break;
0583 case SVE::BI__builtin_sve_svmlalt_lane_f32:
0584 ImmChecks.emplace_back(3, 7, 16);
0585   break;
0586 case SVE::BI__builtin_sve_svmlalt_lane_s32:
0587 ImmChecks.emplace_back(3, 7, 16);
0588   break;
0589 case SVE::BI__builtin_sve_svmlalt_lane_s64:
0590 ImmChecks.emplace_back(3, 7, 32);
0591   break;
0592 case SVE::BI__builtin_sve_svmlalt_lane_u32:
0593 ImmChecks.emplace_back(3, 7, 16);
0594   break;
0595 case SVE::BI__builtin_sve_svmlalt_lane_u64:
0596 ImmChecks.emplace_back(3, 7, 32);
0597   break;
0598 case SVE::BI__builtin_sve_svmls_lane_bf16:
0599 ImmChecks.emplace_back(3, 7, 16);
0600   break;
0601 case SVE::BI__builtin_sve_svmls_lane_f16:
0602 ImmChecks.emplace_back(3, 7, 16);
0603   break;
0604 case SVE::BI__builtin_sve_svmls_lane_f32:
0605 ImmChecks.emplace_back(3, 7, 32);
0606   break;
0607 case SVE::BI__builtin_sve_svmls_lane_f64:
0608 ImmChecks.emplace_back(3, 7, 64);
0609   break;
0610 case SVE::BI__builtin_sve_svmls_lane_s16:
0611 ImmChecks.emplace_back(3, 7, 16);
0612   break;
0613 case SVE::BI__builtin_sve_svmls_lane_s32:
0614 ImmChecks.emplace_back(3, 7, 32);
0615   break;
0616 case SVE::BI__builtin_sve_svmls_lane_s64:
0617 ImmChecks.emplace_back(3, 7, 64);
0618   break;
0619 case SVE::BI__builtin_sve_svmls_lane_u16:
0620 ImmChecks.emplace_back(3, 7, 16);
0621   break;
0622 case SVE::BI__builtin_sve_svmls_lane_u32:
0623 ImmChecks.emplace_back(3, 7, 32);
0624   break;
0625 case SVE::BI__builtin_sve_svmls_lane_u64:
0626 ImmChecks.emplace_back(3, 7, 64);
0627   break;
0628 case SVE::BI__builtin_sve_svmlslb_lane_f32:
0629 ImmChecks.emplace_back(3, 7, 16);
0630   break;
0631 case SVE::BI__builtin_sve_svmlslb_lane_s32:
0632 ImmChecks.emplace_back(3, 7, 16);
0633   break;
0634 case SVE::BI__builtin_sve_svmlslb_lane_s64:
0635 ImmChecks.emplace_back(3, 7, 32);
0636   break;
0637 case SVE::BI__builtin_sve_svmlslb_lane_u32:
0638 ImmChecks.emplace_back(3, 7, 16);
0639   break;
0640 case SVE::BI__builtin_sve_svmlslb_lane_u64:
0641 ImmChecks.emplace_back(3, 7, 32);
0642   break;
0643 case SVE::BI__builtin_sve_svmlslt_lane_f32:
0644 ImmChecks.emplace_back(3, 7, 16);
0645   break;
0646 case SVE::BI__builtin_sve_svmlslt_lane_s32:
0647 ImmChecks.emplace_back(3, 7, 16);
0648   break;
0649 case SVE::BI__builtin_sve_svmlslt_lane_s64:
0650 ImmChecks.emplace_back(3, 7, 32);
0651   break;
0652 case SVE::BI__builtin_sve_svmlslt_lane_u32:
0653 ImmChecks.emplace_back(3, 7, 16);
0654   break;
0655 case SVE::BI__builtin_sve_svmlslt_lane_u64:
0656 ImmChecks.emplace_back(3, 7, 32);
0657   break;
0658 case SVE::BI__builtin_sve_svmul_lane_bf16:
0659 ImmChecks.emplace_back(2, 7, 16);
0660   break;
0661 case SVE::BI__builtin_sve_svmul_lane_f16:
0662 ImmChecks.emplace_back(2, 7, 16);
0663   break;
0664 case SVE::BI__builtin_sve_svmul_lane_f32:
0665 ImmChecks.emplace_back(2, 7, 32);
0666   break;
0667 case SVE::BI__builtin_sve_svmul_lane_f64:
0668 ImmChecks.emplace_back(2, 7, 64);
0669   break;
0670 case SVE::BI__builtin_sve_svmul_lane_s16:
0671 ImmChecks.emplace_back(2, 7, 16);
0672   break;
0673 case SVE::BI__builtin_sve_svmul_lane_s32:
0674 ImmChecks.emplace_back(2, 7, 32);
0675   break;
0676 case SVE::BI__builtin_sve_svmul_lane_s64:
0677 ImmChecks.emplace_back(2, 7, 64);
0678   break;
0679 case SVE::BI__builtin_sve_svmul_lane_u16:
0680 ImmChecks.emplace_back(2, 7, 16);
0681   break;
0682 case SVE::BI__builtin_sve_svmul_lane_u32:
0683 ImmChecks.emplace_back(2, 7, 32);
0684   break;
0685 case SVE::BI__builtin_sve_svmul_lane_u64:
0686 ImmChecks.emplace_back(2, 7, 64);
0687   break;
0688 case SVE::BI__builtin_sve_svmullb_lane_s32:
0689 ImmChecks.emplace_back(2, 7, 16);
0690   break;
0691 case SVE::BI__builtin_sve_svmullb_lane_s64:
0692 ImmChecks.emplace_back(2, 7, 32);
0693   break;
0694 case SVE::BI__builtin_sve_svmullb_lane_u32:
0695 ImmChecks.emplace_back(2, 7, 16);
0696   break;
0697 case SVE::BI__builtin_sve_svmullb_lane_u64:
0698 ImmChecks.emplace_back(2, 7, 32);
0699   break;
0700 case SVE::BI__builtin_sve_svmullt_lane_s32:
0701 ImmChecks.emplace_back(2, 7, 16);
0702   break;
0703 case SVE::BI__builtin_sve_svmullt_lane_s64:
0704 ImmChecks.emplace_back(2, 7, 32);
0705   break;
0706 case SVE::BI__builtin_sve_svmullt_lane_u32:
0707 ImmChecks.emplace_back(2, 7, 16);
0708   break;
0709 case SVE::BI__builtin_sve_svmullt_lane_u64:
0710 ImmChecks.emplace_back(2, 7, 32);
0711   break;
0712 case SVE::BI__builtin_sve_svpext_lane_c16:
0713 ImmChecks.emplace_back(1, 16, 0);
0714   break;
0715 case SVE::BI__builtin_sve_svpext_lane_c16_x2:
0716 ImmChecks.emplace_back(1, 14, 0);
0717   break;
0718 case SVE::BI__builtin_sve_svpext_lane_c32:
0719 ImmChecks.emplace_back(1, 16, 0);
0720   break;
0721 case SVE::BI__builtin_sve_svpext_lane_c32_x2:
0722 ImmChecks.emplace_back(1, 14, 0);
0723   break;
0724 case SVE::BI__builtin_sve_svpext_lane_c64:
0725 ImmChecks.emplace_back(1, 16, 0);
0726   break;
0727 case SVE::BI__builtin_sve_svpext_lane_c64_x2:
0728 ImmChecks.emplace_back(1, 14, 0);
0729   break;
0730 case SVE::BI__builtin_sve_svpext_lane_c8:
0731 ImmChecks.emplace_back(1, 16, 0);
0732   break;
0733 case SVE::BI__builtin_sve_svpext_lane_c8_x2:
0734 ImmChecks.emplace_back(1, 14, 0);
0735   break;
0736 case SVE::BI__builtin_sve_svpmov_lane_s16:
0737 ImmChecks.emplace_back(1, 14, 0);
0738   break;
0739 case SVE::BI__builtin_sve_svpmov_lane_s16_m:
0740 ImmChecks.emplace_back(2, 21, 0);
0741   break;
0742 case SVE::BI__builtin_sve_svpmov_lane_s32:
0743 ImmChecks.emplace_back(1, 16, 0);
0744   break;
0745 case SVE::BI__builtin_sve_svpmov_lane_s32_m:
0746 ImmChecks.emplace_back(2, 22, 0);
0747   break;
0748 case SVE::BI__builtin_sve_svpmov_lane_s64:
0749 ImmChecks.emplace_back(1, 6, 0);
0750   break;
0751 case SVE::BI__builtin_sve_svpmov_lane_s64_m:
0752 ImmChecks.emplace_back(2, 23, 0);
0753   break;
0754 case SVE::BI__builtin_sve_svpmov_lane_s8:
0755 ImmChecks.emplace_back(1, 17, 0);
0756   break;
0757 case SVE::BI__builtin_sve_svpmov_lane_u16:
0758 ImmChecks.emplace_back(1, 14, 0);
0759   break;
0760 case SVE::BI__builtin_sve_svpmov_lane_u16_m:
0761 ImmChecks.emplace_back(2, 21, 0);
0762   break;
0763 case SVE::BI__builtin_sve_svpmov_lane_u32:
0764 ImmChecks.emplace_back(1, 16, 0);
0765   break;
0766 case SVE::BI__builtin_sve_svpmov_lane_u32_m:
0767 ImmChecks.emplace_back(2, 22, 0);
0768   break;
0769 case SVE::BI__builtin_sve_svpmov_lane_u64:
0770 ImmChecks.emplace_back(1, 6, 0);
0771   break;
0772 case SVE::BI__builtin_sve_svpmov_lane_u64_m:
0773 ImmChecks.emplace_back(2, 23, 0);
0774   break;
0775 case SVE::BI__builtin_sve_svpmov_lane_u8:
0776 ImmChecks.emplace_back(1, 17, 0);
0777   break;
0778 case SVE::BI__builtin_sve_svprfb:
0779 ImmChecks.emplace_back(2, 13, 0);
0780   break;
0781 case SVE::BI__builtin_sve_svprfb_gather_s32offset:
0782 ImmChecks.emplace_back(3, 13, 0);
0783   break;
0784 case SVE::BI__builtin_sve_svprfb_gather_s64offset:
0785 ImmChecks.emplace_back(3, 13, 0);
0786   break;
0787 case SVE::BI__builtin_sve_svprfb_gather_u32base:
0788 ImmChecks.emplace_back(2, 13, 0);
0789   break;
0790 case SVE::BI__builtin_sve_svprfb_gather_u32base_offset:
0791 ImmChecks.emplace_back(3, 13, 0);
0792   break;
0793 case SVE::BI__builtin_sve_svprfb_gather_u32offset:
0794 ImmChecks.emplace_back(3, 13, 0);
0795   break;
0796 case SVE::BI__builtin_sve_svprfb_gather_u64base:
0797 ImmChecks.emplace_back(2, 13, 0);
0798   break;
0799 case SVE::BI__builtin_sve_svprfb_gather_u64base_offset:
0800 ImmChecks.emplace_back(3, 13, 0);
0801   break;
0802 case SVE::BI__builtin_sve_svprfb_gather_u64offset:
0803 ImmChecks.emplace_back(3, 13, 0);
0804   break;
0805 case SVE::BI__builtin_sve_svprfb_vnum:
0806 ImmChecks.emplace_back(3, 13, 0);
0807   break;
0808 case SVE::BI__builtin_sve_svprfd:
0809 ImmChecks.emplace_back(2, 13, 0);
0810   break;
0811 case SVE::BI__builtin_sve_svprfd_gather_s32index:
0812 ImmChecks.emplace_back(3, 13, 0);
0813   break;
0814 case SVE::BI__builtin_sve_svprfd_gather_s64index:
0815 ImmChecks.emplace_back(3, 13, 0);
0816   break;
0817 case SVE::BI__builtin_sve_svprfd_gather_u32base:
0818 ImmChecks.emplace_back(2, 13, 0);
0819   break;
0820 case SVE::BI__builtin_sve_svprfd_gather_u32base_index:
0821 ImmChecks.emplace_back(3, 13, 0);
0822   break;
0823 case SVE::BI__builtin_sve_svprfd_gather_u32index:
0824 ImmChecks.emplace_back(3, 13, 0);
0825   break;
0826 case SVE::BI__builtin_sve_svprfd_gather_u64base:
0827 ImmChecks.emplace_back(2, 13, 0);
0828   break;
0829 case SVE::BI__builtin_sve_svprfd_gather_u64base_index:
0830 ImmChecks.emplace_back(3, 13, 0);
0831   break;
0832 case SVE::BI__builtin_sve_svprfd_gather_u64index:
0833 ImmChecks.emplace_back(3, 13, 0);
0834   break;
0835 case SVE::BI__builtin_sve_svprfd_vnum:
0836 ImmChecks.emplace_back(3, 13, 0);
0837   break;
0838 case SVE::BI__builtin_sve_svprfh:
0839 ImmChecks.emplace_back(2, 13, 0);
0840   break;
0841 case SVE::BI__builtin_sve_svprfh_gather_s32index:
0842 ImmChecks.emplace_back(3, 13, 0);
0843   break;
0844 case SVE::BI__builtin_sve_svprfh_gather_s64index:
0845 ImmChecks.emplace_back(3, 13, 0);
0846   break;
0847 case SVE::BI__builtin_sve_svprfh_gather_u32base:
0848 ImmChecks.emplace_back(2, 13, 0);
0849   break;
0850 case SVE::BI__builtin_sve_svprfh_gather_u32base_index:
0851 ImmChecks.emplace_back(3, 13, 0);
0852   break;
0853 case SVE::BI__builtin_sve_svprfh_gather_u32index:
0854 ImmChecks.emplace_back(3, 13, 0);
0855   break;
0856 case SVE::BI__builtin_sve_svprfh_gather_u64base:
0857 ImmChecks.emplace_back(2, 13, 0);
0858   break;
0859 case SVE::BI__builtin_sve_svprfh_gather_u64base_index:
0860 ImmChecks.emplace_back(3, 13, 0);
0861   break;
0862 case SVE::BI__builtin_sve_svprfh_gather_u64index:
0863 ImmChecks.emplace_back(3, 13, 0);
0864   break;
0865 case SVE::BI__builtin_sve_svprfh_vnum:
0866 ImmChecks.emplace_back(3, 13, 0);
0867   break;
0868 case SVE::BI__builtin_sve_svprfw:
0869 ImmChecks.emplace_back(2, 13, 0);
0870   break;
0871 case SVE::BI__builtin_sve_svprfw_gather_s32index:
0872 ImmChecks.emplace_back(3, 13, 0);
0873   break;
0874 case SVE::BI__builtin_sve_svprfw_gather_s64index:
0875 ImmChecks.emplace_back(3, 13, 0);
0876   break;
0877 case SVE::BI__builtin_sve_svprfw_gather_u32base:
0878 ImmChecks.emplace_back(2, 13, 0);
0879   break;
0880 case SVE::BI__builtin_sve_svprfw_gather_u32base_index:
0881 ImmChecks.emplace_back(3, 13, 0);
0882   break;
0883 case SVE::BI__builtin_sve_svprfw_gather_u32index:
0884 ImmChecks.emplace_back(3, 13, 0);
0885   break;
0886 case SVE::BI__builtin_sve_svprfw_gather_u64base:
0887 ImmChecks.emplace_back(2, 13, 0);
0888   break;
0889 case SVE::BI__builtin_sve_svprfw_gather_u64base_index:
0890 ImmChecks.emplace_back(3, 13, 0);
0891   break;
0892 case SVE::BI__builtin_sve_svprfw_gather_u64index:
0893 ImmChecks.emplace_back(3, 13, 0);
0894   break;
0895 case SVE::BI__builtin_sve_svprfw_vnum:
0896 ImmChecks.emplace_back(3, 13, 0);
0897   break;
0898 case SVE::BI__builtin_sve_svptrue_pat_b16:
0899 ImmChecks.emplace_back(0, 0, 0);
0900   break;
0901 case SVE::BI__builtin_sve_svptrue_pat_b32:
0902 ImmChecks.emplace_back(0, 0, 0);
0903   break;
0904 case SVE::BI__builtin_sve_svptrue_pat_b64:
0905 ImmChecks.emplace_back(0, 0, 0);
0906   break;
0907 case SVE::BI__builtin_sve_svptrue_pat_b8:
0908 ImmChecks.emplace_back(0, 0, 0);
0909   break;
0910 case SVE::BI__builtin_sve_svqcadd_s16:
0911 ImmChecks.emplace_back(2, 11, 0);
0912   break;
0913 case SVE::BI__builtin_sve_svqcadd_s32:
0914 ImmChecks.emplace_back(2, 11, 0);
0915   break;
0916 case SVE::BI__builtin_sve_svqcadd_s64:
0917 ImmChecks.emplace_back(2, 11, 0);
0918   break;
0919 case SVE::BI__builtin_sve_svqcadd_s8:
0920 ImmChecks.emplace_back(2, 11, 0);
0921   break;
0922 case SVE::BI__builtin_sve_svqdecb_n_s32:
0923 ImmChecks.emplace_back(1, 1, 0);
0924   break;
0925 case SVE::BI__builtin_sve_svqdecb_n_s64:
0926 ImmChecks.emplace_back(1, 1, 0);
0927   break;
0928 case SVE::BI__builtin_sve_svqdecb_n_u32:
0929 ImmChecks.emplace_back(1, 1, 0);
0930   break;
0931 case SVE::BI__builtin_sve_svqdecb_n_u64:
0932 ImmChecks.emplace_back(1, 1, 0);
0933   break;
0934 case SVE::BI__builtin_sve_svqdecb_pat_n_s32:
0935 ImmChecks.emplace_back(2, 1, 0);
0936 ImmChecks.emplace_back(1, 0, 0);
0937   break;
0938 case SVE::BI__builtin_sve_svqdecb_pat_n_s64:
0939 ImmChecks.emplace_back(2, 1, 0);
0940 ImmChecks.emplace_back(1, 0, 0);
0941   break;
0942 case SVE::BI__builtin_sve_svqdecb_pat_n_u32:
0943 ImmChecks.emplace_back(2, 1, 0);
0944 ImmChecks.emplace_back(1, 0, 0);
0945   break;
0946 case SVE::BI__builtin_sve_svqdecb_pat_n_u64:
0947 ImmChecks.emplace_back(2, 1, 0);
0948 ImmChecks.emplace_back(1, 0, 0);
0949   break;
0950 case SVE::BI__builtin_sve_svqdecd_n_s32:
0951 ImmChecks.emplace_back(1, 1, 0);
0952   break;
0953 case SVE::BI__builtin_sve_svqdecd_n_s64:
0954 ImmChecks.emplace_back(1, 1, 0);
0955   break;
0956 case SVE::BI__builtin_sve_svqdecd_n_u32:
0957 ImmChecks.emplace_back(1, 1, 0);
0958   break;
0959 case SVE::BI__builtin_sve_svqdecd_n_u64:
0960 ImmChecks.emplace_back(1, 1, 0);
0961   break;
0962 case SVE::BI__builtin_sve_svqdecd_pat_n_s32:
0963 ImmChecks.emplace_back(2, 1, 0);
0964 ImmChecks.emplace_back(1, 0, 0);
0965   break;
0966 case SVE::BI__builtin_sve_svqdecd_pat_n_s64:
0967 ImmChecks.emplace_back(2, 1, 0);
0968 ImmChecks.emplace_back(1, 0, 0);
0969   break;
0970 case SVE::BI__builtin_sve_svqdecd_pat_n_u32:
0971 ImmChecks.emplace_back(2, 1, 0);
0972 ImmChecks.emplace_back(1, 0, 0);
0973   break;
0974 case SVE::BI__builtin_sve_svqdecd_pat_n_u64:
0975 ImmChecks.emplace_back(2, 1, 0);
0976 ImmChecks.emplace_back(1, 0, 0);
0977   break;
0978 case SVE::BI__builtin_sve_svqdecd_pat_s64:
0979 ImmChecks.emplace_back(2, 1, 0);
0980 ImmChecks.emplace_back(1, 0, 0);
0981   break;
0982 case SVE::BI__builtin_sve_svqdecd_pat_u64:
0983 ImmChecks.emplace_back(2, 1, 0);
0984 ImmChecks.emplace_back(1, 0, 0);
0985   break;
0986 case SVE::BI__builtin_sve_svqdecd_s64:
0987 ImmChecks.emplace_back(1, 1, 0);
0988   break;
0989 case SVE::BI__builtin_sve_svqdecd_u64:
0990 ImmChecks.emplace_back(1, 1, 0);
0991   break;
0992 case SVE::BI__builtin_sve_svqdech_n_s32:
0993 ImmChecks.emplace_back(1, 1, 0);
0994   break;
0995 case SVE::BI__builtin_sve_svqdech_n_s64:
0996 ImmChecks.emplace_back(1, 1, 0);
0997   break;
0998 case SVE::BI__builtin_sve_svqdech_n_u32:
0999 ImmChecks.emplace_back(1, 1, 0);
1000   break;
1001 case SVE::BI__builtin_sve_svqdech_n_u64:
1002 ImmChecks.emplace_back(1, 1, 0);
1003   break;
1004 case SVE::BI__builtin_sve_svqdech_pat_n_s32:
1005 ImmChecks.emplace_back(2, 1, 0);
1006 ImmChecks.emplace_back(1, 0, 0);
1007   break;
1008 case SVE::BI__builtin_sve_svqdech_pat_n_s64:
1009 ImmChecks.emplace_back(2, 1, 0);
1010 ImmChecks.emplace_back(1, 0, 0);
1011   break;
1012 case SVE::BI__builtin_sve_svqdech_pat_n_u32:
1013 ImmChecks.emplace_back(2, 1, 0);
1014 ImmChecks.emplace_back(1, 0, 0);
1015   break;
1016 case SVE::BI__builtin_sve_svqdech_pat_n_u64:
1017 ImmChecks.emplace_back(2, 1, 0);
1018 ImmChecks.emplace_back(1, 0, 0);
1019   break;
1020 case SVE::BI__builtin_sve_svqdech_pat_s16:
1021 ImmChecks.emplace_back(2, 1, 0);
1022 ImmChecks.emplace_back(1, 0, 0);
1023   break;
1024 case SVE::BI__builtin_sve_svqdech_pat_u16:
1025 ImmChecks.emplace_back(2, 1, 0);
1026 ImmChecks.emplace_back(1, 0, 0);
1027   break;
1028 case SVE::BI__builtin_sve_svqdech_s16:
1029 ImmChecks.emplace_back(1, 1, 0);
1030   break;
1031 case SVE::BI__builtin_sve_svqdech_u16:
1032 ImmChecks.emplace_back(1, 1, 0);
1033   break;
1034 case SVE::BI__builtin_sve_svqdecw_n_s32:
1035 ImmChecks.emplace_back(1, 1, 0);
1036   break;
1037 case SVE::BI__builtin_sve_svqdecw_n_s64:
1038 ImmChecks.emplace_back(1, 1, 0);
1039   break;
1040 case SVE::BI__builtin_sve_svqdecw_n_u32:
1041 ImmChecks.emplace_back(1, 1, 0);
1042   break;
1043 case SVE::BI__builtin_sve_svqdecw_n_u64:
1044 ImmChecks.emplace_back(1, 1, 0);
1045   break;
1046 case SVE::BI__builtin_sve_svqdecw_pat_n_s32:
1047 ImmChecks.emplace_back(2, 1, 0);
1048 ImmChecks.emplace_back(1, 0, 0);
1049   break;
1050 case SVE::BI__builtin_sve_svqdecw_pat_n_s64:
1051 ImmChecks.emplace_back(2, 1, 0);
1052 ImmChecks.emplace_back(1, 0, 0);
1053   break;
1054 case SVE::BI__builtin_sve_svqdecw_pat_n_u32:
1055 ImmChecks.emplace_back(2, 1, 0);
1056 ImmChecks.emplace_back(1, 0, 0);
1057   break;
1058 case SVE::BI__builtin_sve_svqdecw_pat_n_u64:
1059 ImmChecks.emplace_back(2, 1, 0);
1060 ImmChecks.emplace_back(1, 0, 0);
1061   break;
1062 case SVE::BI__builtin_sve_svqdecw_pat_s32:
1063 ImmChecks.emplace_back(2, 1, 0);
1064 ImmChecks.emplace_back(1, 0, 0);
1065   break;
1066 case SVE::BI__builtin_sve_svqdecw_pat_u32:
1067 ImmChecks.emplace_back(2, 1, 0);
1068 ImmChecks.emplace_back(1, 0, 0);
1069   break;
1070 case SVE::BI__builtin_sve_svqdecw_s32:
1071 ImmChecks.emplace_back(1, 1, 0);
1072   break;
1073 case SVE::BI__builtin_sve_svqdecw_u32:
1074 ImmChecks.emplace_back(1, 1, 0);
1075   break;
1076 case SVE::BI__builtin_sve_svqdmlalb_lane_s32:
1077 ImmChecks.emplace_back(3, 7, 16);
1078   break;
1079 case SVE::BI__builtin_sve_svqdmlalb_lane_s64:
1080 ImmChecks.emplace_back(3, 7, 32);
1081   break;
1082 case SVE::BI__builtin_sve_svqdmlalt_lane_s32:
1083 ImmChecks.emplace_back(3, 7, 16);
1084   break;
1085 case SVE::BI__builtin_sve_svqdmlalt_lane_s64:
1086 ImmChecks.emplace_back(3, 7, 32);
1087   break;
1088 case SVE::BI__builtin_sve_svqdmlslb_lane_s32:
1089 ImmChecks.emplace_back(3, 7, 16);
1090   break;
1091 case SVE::BI__builtin_sve_svqdmlslb_lane_s64:
1092 ImmChecks.emplace_back(3, 7, 32);
1093   break;
1094 case SVE::BI__builtin_sve_svqdmlslt_lane_s32:
1095 ImmChecks.emplace_back(3, 7, 16);
1096   break;
1097 case SVE::BI__builtin_sve_svqdmlslt_lane_s64:
1098 ImmChecks.emplace_back(3, 7, 32);
1099   break;
1100 case SVE::BI__builtin_sve_svqdmulh_lane_s16:
1101 ImmChecks.emplace_back(2, 7, 16);
1102   break;
1103 case SVE::BI__builtin_sve_svqdmulh_lane_s32:
1104 ImmChecks.emplace_back(2, 7, 32);
1105   break;
1106 case SVE::BI__builtin_sve_svqdmulh_lane_s64:
1107 ImmChecks.emplace_back(2, 7, 64);
1108   break;
1109 case SVE::BI__builtin_sve_svqdmullb_lane_s32:
1110 ImmChecks.emplace_back(2, 7, 16);
1111   break;
1112 case SVE::BI__builtin_sve_svqdmullb_lane_s64:
1113 ImmChecks.emplace_back(2, 7, 32);
1114   break;
1115 case SVE::BI__builtin_sve_svqdmullt_lane_s32:
1116 ImmChecks.emplace_back(2, 7, 16);
1117   break;
1118 case SVE::BI__builtin_sve_svqdmullt_lane_s64:
1119 ImmChecks.emplace_back(2, 7, 32);
1120   break;
1121 case SVE::BI__builtin_sve_svqincb_n_s32:
1122 ImmChecks.emplace_back(1, 1, 0);
1123   break;
1124 case SVE::BI__builtin_sve_svqincb_n_s64:
1125 ImmChecks.emplace_back(1, 1, 0);
1126   break;
1127 case SVE::BI__builtin_sve_svqincb_n_u32:
1128 ImmChecks.emplace_back(1, 1, 0);
1129   break;
1130 case SVE::BI__builtin_sve_svqincb_n_u64:
1131 ImmChecks.emplace_back(1, 1, 0);
1132   break;
1133 case SVE::BI__builtin_sve_svqincb_pat_n_s32:
1134 ImmChecks.emplace_back(2, 1, 0);
1135 ImmChecks.emplace_back(1, 0, 0);
1136   break;
1137 case SVE::BI__builtin_sve_svqincb_pat_n_s64:
1138 ImmChecks.emplace_back(2, 1, 0);
1139 ImmChecks.emplace_back(1, 0, 0);
1140   break;
1141 case SVE::BI__builtin_sve_svqincb_pat_n_u32:
1142 ImmChecks.emplace_back(2, 1, 0);
1143 ImmChecks.emplace_back(1, 0, 0);
1144   break;
1145 case SVE::BI__builtin_sve_svqincb_pat_n_u64:
1146 ImmChecks.emplace_back(2, 1, 0);
1147 ImmChecks.emplace_back(1, 0, 0);
1148   break;
1149 case SVE::BI__builtin_sve_svqincd_n_s32:
1150 ImmChecks.emplace_back(1, 1, 0);
1151   break;
1152 case SVE::BI__builtin_sve_svqincd_n_s64:
1153 ImmChecks.emplace_back(1, 1, 0);
1154   break;
1155 case SVE::BI__builtin_sve_svqincd_n_u32:
1156 ImmChecks.emplace_back(1, 1, 0);
1157   break;
1158 case SVE::BI__builtin_sve_svqincd_n_u64:
1159 ImmChecks.emplace_back(1, 1, 0);
1160   break;
1161 case SVE::BI__builtin_sve_svqincd_pat_n_s32:
1162 ImmChecks.emplace_back(2, 1, 0);
1163 ImmChecks.emplace_back(1, 0, 0);
1164   break;
1165 case SVE::BI__builtin_sve_svqincd_pat_n_s64:
1166 ImmChecks.emplace_back(2, 1, 0);
1167 ImmChecks.emplace_back(1, 0, 0);
1168   break;
1169 case SVE::BI__builtin_sve_svqincd_pat_n_u32:
1170 ImmChecks.emplace_back(2, 1, 0);
1171 ImmChecks.emplace_back(1, 0, 0);
1172   break;
1173 case SVE::BI__builtin_sve_svqincd_pat_n_u64:
1174 ImmChecks.emplace_back(2, 1, 0);
1175 ImmChecks.emplace_back(1, 0, 0);
1176   break;
1177 case SVE::BI__builtin_sve_svqincd_pat_s64:
1178 ImmChecks.emplace_back(2, 1, 0);
1179 ImmChecks.emplace_back(1, 0, 0);
1180   break;
1181 case SVE::BI__builtin_sve_svqincd_pat_u64:
1182 ImmChecks.emplace_back(2, 1, 0);
1183 ImmChecks.emplace_back(1, 0, 0);
1184   break;
1185 case SVE::BI__builtin_sve_svqincd_s64:
1186 ImmChecks.emplace_back(1, 1, 0);
1187   break;
1188 case SVE::BI__builtin_sve_svqincd_u64:
1189 ImmChecks.emplace_back(1, 1, 0);
1190   break;
1191 case SVE::BI__builtin_sve_svqinch_n_s32:
1192 ImmChecks.emplace_back(1, 1, 0);
1193   break;
1194 case SVE::BI__builtin_sve_svqinch_n_s64:
1195 ImmChecks.emplace_back(1, 1, 0);
1196   break;
1197 case SVE::BI__builtin_sve_svqinch_n_u32:
1198 ImmChecks.emplace_back(1, 1, 0);
1199   break;
1200 case SVE::BI__builtin_sve_svqinch_n_u64:
1201 ImmChecks.emplace_back(1, 1, 0);
1202   break;
1203 case SVE::BI__builtin_sve_svqinch_pat_n_s32:
1204 ImmChecks.emplace_back(2, 1, 0);
1205 ImmChecks.emplace_back(1, 0, 0);
1206   break;
1207 case SVE::BI__builtin_sve_svqinch_pat_n_s64:
1208 ImmChecks.emplace_back(2, 1, 0);
1209 ImmChecks.emplace_back(1, 0, 0);
1210   break;
1211 case SVE::BI__builtin_sve_svqinch_pat_n_u32:
1212 ImmChecks.emplace_back(2, 1, 0);
1213 ImmChecks.emplace_back(1, 0, 0);
1214   break;
1215 case SVE::BI__builtin_sve_svqinch_pat_n_u64:
1216 ImmChecks.emplace_back(2, 1, 0);
1217 ImmChecks.emplace_back(1, 0, 0);
1218   break;
1219 case SVE::BI__builtin_sve_svqinch_pat_s16:
1220 ImmChecks.emplace_back(2, 1, 0);
1221 ImmChecks.emplace_back(1, 0, 0);
1222   break;
1223 case SVE::BI__builtin_sve_svqinch_pat_u16:
1224 ImmChecks.emplace_back(2, 1, 0);
1225 ImmChecks.emplace_back(1, 0, 0);
1226   break;
1227 case SVE::BI__builtin_sve_svqinch_s16:
1228 ImmChecks.emplace_back(1, 1, 0);
1229   break;
1230 case SVE::BI__builtin_sve_svqinch_u16:
1231 ImmChecks.emplace_back(1, 1, 0);
1232   break;
1233 case SVE::BI__builtin_sve_svqincw_n_s32:
1234 ImmChecks.emplace_back(1, 1, 0);
1235   break;
1236 case SVE::BI__builtin_sve_svqincw_n_s64:
1237 ImmChecks.emplace_back(1, 1, 0);
1238   break;
1239 case SVE::BI__builtin_sve_svqincw_n_u32:
1240 ImmChecks.emplace_back(1, 1, 0);
1241   break;
1242 case SVE::BI__builtin_sve_svqincw_n_u64:
1243 ImmChecks.emplace_back(1, 1, 0);
1244   break;
1245 case SVE::BI__builtin_sve_svqincw_pat_n_s32:
1246 ImmChecks.emplace_back(2, 1, 0);
1247 ImmChecks.emplace_back(1, 0, 0);
1248   break;
1249 case SVE::BI__builtin_sve_svqincw_pat_n_s64:
1250 ImmChecks.emplace_back(2, 1, 0);
1251 ImmChecks.emplace_back(1, 0, 0);
1252   break;
1253 case SVE::BI__builtin_sve_svqincw_pat_n_u32:
1254 ImmChecks.emplace_back(2, 1, 0);
1255 ImmChecks.emplace_back(1, 0, 0);
1256   break;
1257 case SVE::BI__builtin_sve_svqincw_pat_n_u64:
1258 ImmChecks.emplace_back(2, 1, 0);
1259 ImmChecks.emplace_back(1, 0, 0);
1260   break;
1261 case SVE::BI__builtin_sve_svqincw_pat_s32:
1262 ImmChecks.emplace_back(2, 1, 0);
1263 ImmChecks.emplace_back(1, 0, 0);
1264   break;
1265 case SVE::BI__builtin_sve_svqincw_pat_u32:
1266 ImmChecks.emplace_back(2, 1, 0);
1267 ImmChecks.emplace_back(1, 0, 0);
1268   break;
1269 case SVE::BI__builtin_sve_svqincw_s32:
1270 ImmChecks.emplace_back(1, 1, 0);
1271   break;
1272 case SVE::BI__builtin_sve_svqincw_u32:
1273 ImmChecks.emplace_back(1, 1, 0);
1274   break;
1275 case SVE::BI__builtin_sve_svqrdcmlah_lane_s16:
1276 ImmChecks.emplace_back(3, 9, 16);
1277 ImmChecks.emplace_back(4, 12, 0);
1278   break;
1279 case SVE::BI__builtin_sve_svqrdcmlah_lane_s32:
1280 ImmChecks.emplace_back(3, 9, 32);
1281 ImmChecks.emplace_back(4, 12, 0);
1282   break;
1283 case SVE::BI__builtin_sve_svqrdcmlah_s16:
1284 ImmChecks.emplace_back(3, 12, 0);
1285   break;
1286 case SVE::BI__builtin_sve_svqrdcmlah_s32:
1287 ImmChecks.emplace_back(3, 12, 0);
1288   break;
1289 case SVE::BI__builtin_sve_svqrdcmlah_s64:
1290 ImmChecks.emplace_back(3, 12, 0);
1291   break;
1292 case SVE::BI__builtin_sve_svqrdcmlah_s8:
1293 ImmChecks.emplace_back(3, 12, 0);
1294   break;
1295 case SVE::BI__builtin_sve_svqrdmlah_lane_s16:
1296 ImmChecks.emplace_back(3, 7, 16);
1297   break;
1298 case SVE::BI__builtin_sve_svqrdmlah_lane_s32:
1299 ImmChecks.emplace_back(3, 7, 32);
1300   break;
1301 case SVE::BI__builtin_sve_svqrdmlah_lane_s64:
1302 ImmChecks.emplace_back(3, 7, 64);
1303   break;
1304 case SVE::BI__builtin_sve_svqrdmlsh_lane_s16:
1305 ImmChecks.emplace_back(3, 7, 16);
1306   break;
1307 case SVE::BI__builtin_sve_svqrdmlsh_lane_s32:
1308 ImmChecks.emplace_back(3, 7, 32);
1309   break;
1310 case SVE::BI__builtin_sve_svqrdmlsh_lane_s64:
1311 ImmChecks.emplace_back(3, 7, 64);
1312   break;
1313 case SVE::BI__builtin_sve_svqrdmulh_lane_s16:
1314 ImmChecks.emplace_back(2, 7, 16);
1315   break;
1316 case SVE::BI__builtin_sve_svqrdmulh_lane_s32:
1317 ImmChecks.emplace_back(2, 7, 32);
1318   break;
1319 case SVE::BI__builtin_sve_svqrdmulh_lane_s64:
1320 ImmChecks.emplace_back(2, 7, 64);
1321   break;
1322 case SVE::BI__builtin_sve_svqrshr_n_s16_s32_x2:
1323 ImmChecks.emplace_back(1, 1, 0);
1324   break;
1325 case SVE::BI__builtin_sve_svqrshr_n_s16_s64_x4:
1326 ImmChecks.emplace_back(1, 3, 64);
1327   break;
1328 case SVE::BI__builtin_sve_svqrshr_n_s8_s32_x4:
1329 ImmChecks.emplace_back(1, 3, 32);
1330   break;
1331 case SVE::BI__builtin_sve_svqrshr_n_u16_u32_x2:
1332 ImmChecks.emplace_back(1, 1, 0);
1333   break;
1334 case SVE::BI__builtin_sve_svqrshr_n_u16_u64_x4:
1335 ImmChecks.emplace_back(1, 3, 64);
1336   break;
1337 case SVE::BI__builtin_sve_svqrshr_n_u8_u32_x4:
1338 ImmChecks.emplace_back(1, 3, 32);
1339   break;
1340 case SVE::BI__builtin_sve_svqrshrn_n_s16_s32_x2:
1341 ImmChecks.emplace_back(1, 1, 0);
1342   break;
1343 case SVE::BI__builtin_sve_svqrshrn_n_s16_s64_x4:
1344 ImmChecks.emplace_back(1, 3, 64);
1345   break;
1346 case SVE::BI__builtin_sve_svqrshrn_n_s8_s32_x4:
1347 ImmChecks.emplace_back(1, 3, 32);
1348   break;
1349 case SVE::BI__builtin_sve_svqrshrn_n_u16_u32_x2:
1350 ImmChecks.emplace_back(1, 1, 0);
1351   break;
1352 case SVE::BI__builtin_sve_svqrshrn_n_u16_u64_x4:
1353 ImmChecks.emplace_back(1, 3, 64);
1354   break;
1355 case SVE::BI__builtin_sve_svqrshrn_n_u8_u32_x4:
1356 ImmChecks.emplace_back(1, 3, 32);
1357   break;
1358 case SVE::BI__builtin_sve_svqrshrnb_n_s16:
1359 ImmChecks.emplace_back(1, 4, 16);
1360   break;
1361 case SVE::BI__builtin_sve_svqrshrnb_n_s32:
1362 ImmChecks.emplace_back(1, 4, 32);
1363   break;
1364 case SVE::BI__builtin_sve_svqrshrnb_n_s64:
1365 ImmChecks.emplace_back(1, 4, 64);
1366   break;
1367 case SVE::BI__builtin_sve_svqrshrnb_n_u16:
1368 ImmChecks.emplace_back(1, 4, 16);
1369   break;
1370 case SVE::BI__builtin_sve_svqrshrnb_n_u32:
1371 ImmChecks.emplace_back(1, 4, 32);
1372   break;
1373 case SVE::BI__builtin_sve_svqrshrnb_n_u64:
1374 ImmChecks.emplace_back(1, 4, 64);
1375   break;
1376 case SVE::BI__builtin_sve_svqrshrnt_n_s16:
1377 ImmChecks.emplace_back(2, 4, 16);
1378   break;
1379 case SVE::BI__builtin_sve_svqrshrnt_n_s32:
1380 ImmChecks.emplace_back(2, 4, 32);
1381   break;
1382 case SVE::BI__builtin_sve_svqrshrnt_n_s64:
1383 ImmChecks.emplace_back(2, 4, 64);
1384   break;
1385 case SVE::BI__builtin_sve_svqrshrnt_n_u16:
1386 ImmChecks.emplace_back(2, 4, 16);
1387   break;
1388 case SVE::BI__builtin_sve_svqrshrnt_n_u32:
1389 ImmChecks.emplace_back(2, 4, 32);
1390   break;
1391 case SVE::BI__builtin_sve_svqrshrnt_n_u64:
1392 ImmChecks.emplace_back(2, 4, 64);
1393   break;
1394 case SVE::BI__builtin_sve_svqrshru_n_u16_s32_x2:
1395 ImmChecks.emplace_back(1, 1, 0);
1396   break;
1397 case SVE::BI__builtin_sve_svqrshru_n_u16_s64_x4:
1398 ImmChecks.emplace_back(1, 3, 64);
1399   break;
1400 case SVE::BI__builtin_sve_svqrshru_n_u8_s32_x4:
1401 ImmChecks.emplace_back(1, 3, 32);
1402   break;
1403 case SVE::BI__builtin_sve_svqrshrun_n_u16_s32_x2:
1404 ImmChecks.emplace_back(1, 1, 0);
1405   break;
1406 case SVE::BI__builtin_sve_svqrshrun_n_u16_s64_x4:
1407 ImmChecks.emplace_back(1, 3, 64);
1408   break;
1409 case SVE::BI__builtin_sve_svqrshrun_n_u8_s32_x4:
1410 ImmChecks.emplace_back(1, 3, 32);
1411   break;
1412 case SVE::BI__builtin_sve_svqrshrunb_n_s16:
1413 ImmChecks.emplace_back(1, 4, 16);
1414   break;
1415 case SVE::BI__builtin_sve_svqrshrunb_n_s32:
1416 ImmChecks.emplace_back(1, 4, 32);
1417   break;
1418 case SVE::BI__builtin_sve_svqrshrunb_n_s64:
1419 ImmChecks.emplace_back(1, 4, 64);
1420   break;
1421 case SVE::BI__builtin_sve_svqrshrunt_n_s16:
1422 ImmChecks.emplace_back(2, 4, 16);
1423   break;
1424 case SVE::BI__builtin_sve_svqrshrunt_n_s32:
1425 ImmChecks.emplace_back(2, 4, 32);
1426   break;
1427 case SVE::BI__builtin_sve_svqrshrunt_n_s64:
1428 ImmChecks.emplace_back(2, 4, 64);
1429   break;
1430 case SVE::BI__builtin_sve_svqshlu_n_s16_m:
1431 ImmChecks.emplace_back(2, 5, 16);
1432   break;
1433 case SVE::BI__builtin_sve_svqshlu_n_s16_x:
1434 ImmChecks.emplace_back(2, 5, 16);
1435   break;
1436 case SVE::BI__builtin_sve_svqshlu_n_s16_z:
1437 ImmChecks.emplace_back(2, 5, 16);
1438   break;
1439 case SVE::BI__builtin_sve_svqshlu_n_s32_m:
1440 ImmChecks.emplace_back(2, 5, 32);
1441   break;
1442 case SVE::BI__builtin_sve_svqshlu_n_s32_x:
1443 ImmChecks.emplace_back(2, 5, 32);
1444   break;
1445 case SVE::BI__builtin_sve_svqshlu_n_s32_z:
1446 ImmChecks.emplace_back(2, 5, 32);
1447   break;
1448 case SVE::BI__builtin_sve_svqshlu_n_s64_m:
1449 ImmChecks.emplace_back(2, 5, 64);
1450   break;
1451 case SVE::BI__builtin_sve_svqshlu_n_s64_x:
1452 ImmChecks.emplace_back(2, 5, 64);
1453   break;
1454 case SVE::BI__builtin_sve_svqshlu_n_s64_z:
1455 ImmChecks.emplace_back(2, 5, 64);
1456   break;
1457 case SVE::BI__builtin_sve_svqshlu_n_s8_m:
1458 ImmChecks.emplace_back(2, 5, 8);
1459   break;
1460 case SVE::BI__builtin_sve_svqshlu_n_s8_x:
1461 ImmChecks.emplace_back(2, 5, 8);
1462   break;
1463 case SVE::BI__builtin_sve_svqshlu_n_s8_z:
1464 ImmChecks.emplace_back(2, 5, 8);
1465   break;
1466 case SVE::BI__builtin_sve_svqshrnb_n_s16:
1467 ImmChecks.emplace_back(1, 4, 16);
1468   break;
1469 case SVE::BI__builtin_sve_svqshrnb_n_s32:
1470 ImmChecks.emplace_back(1, 4, 32);
1471   break;
1472 case SVE::BI__builtin_sve_svqshrnb_n_s64:
1473 ImmChecks.emplace_back(1, 4, 64);
1474   break;
1475 case SVE::BI__builtin_sve_svqshrnb_n_u16:
1476 ImmChecks.emplace_back(1, 4, 16);
1477   break;
1478 case SVE::BI__builtin_sve_svqshrnb_n_u32:
1479 ImmChecks.emplace_back(1, 4, 32);
1480   break;
1481 case SVE::BI__builtin_sve_svqshrnb_n_u64:
1482 ImmChecks.emplace_back(1, 4, 64);
1483   break;
1484 case SVE::BI__builtin_sve_svqshrnt_n_s16:
1485 ImmChecks.emplace_back(2, 4, 16);
1486   break;
1487 case SVE::BI__builtin_sve_svqshrnt_n_s32:
1488 ImmChecks.emplace_back(2, 4, 32);
1489   break;
1490 case SVE::BI__builtin_sve_svqshrnt_n_s64:
1491 ImmChecks.emplace_back(2, 4, 64);
1492   break;
1493 case SVE::BI__builtin_sve_svqshrnt_n_u16:
1494 ImmChecks.emplace_back(2, 4, 16);
1495   break;
1496 case SVE::BI__builtin_sve_svqshrnt_n_u32:
1497 ImmChecks.emplace_back(2, 4, 32);
1498   break;
1499 case SVE::BI__builtin_sve_svqshrnt_n_u64:
1500 ImmChecks.emplace_back(2, 4, 64);
1501   break;
1502 case SVE::BI__builtin_sve_svqshrunb_n_s16:
1503 ImmChecks.emplace_back(1, 4, 16);
1504   break;
1505 case SVE::BI__builtin_sve_svqshrunb_n_s32:
1506 ImmChecks.emplace_back(1, 4, 32);
1507   break;
1508 case SVE::BI__builtin_sve_svqshrunb_n_s64:
1509 ImmChecks.emplace_back(1, 4, 64);
1510   break;
1511 case SVE::BI__builtin_sve_svqshrunt_n_s16:
1512 ImmChecks.emplace_back(2, 4, 16);
1513   break;
1514 case SVE::BI__builtin_sve_svqshrunt_n_s32:
1515 ImmChecks.emplace_back(2, 4, 32);
1516   break;
1517 case SVE::BI__builtin_sve_svqshrunt_n_s64:
1518 ImmChecks.emplace_back(2, 4, 64);
1519   break;
1520 case SVE::BI__builtin_sve_svrshr_n_s16_m:
1521 ImmChecks.emplace_back(2, 3, 16);
1522   break;
1523 case SVE::BI__builtin_sve_svrshr_n_s16_x:
1524 ImmChecks.emplace_back(2, 3, 16);
1525   break;
1526 case SVE::BI__builtin_sve_svrshr_n_s16_z:
1527 ImmChecks.emplace_back(2, 3, 16);
1528   break;
1529 case SVE::BI__builtin_sve_svrshr_n_s32_m:
1530 ImmChecks.emplace_back(2, 3, 32);
1531   break;
1532 case SVE::BI__builtin_sve_svrshr_n_s32_x:
1533 ImmChecks.emplace_back(2, 3, 32);
1534   break;
1535 case SVE::BI__builtin_sve_svrshr_n_s32_z:
1536 ImmChecks.emplace_back(2, 3, 32);
1537   break;
1538 case SVE::BI__builtin_sve_svrshr_n_s64_m:
1539 ImmChecks.emplace_back(2, 3, 64);
1540   break;
1541 case SVE::BI__builtin_sve_svrshr_n_s64_x:
1542 ImmChecks.emplace_back(2, 3, 64);
1543   break;
1544 case SVE::BI__builtin_sve_svrshr_n_s64_z:
1545 ImmChecks.emplace_back(2, 3, 64);
1546   break;
1547 case SVE::BI__builtin_sve_svrshr_n_s8_m:
1548 ImmChecks.emplace_back(2, 3, 8);
1549   break;
1550 case SVE::BI__builtin_sve_svrshr_n_s8_x:
1551 ImmChecks.emplace_back(2, 3, 8);
1552   break;
1553 case SVE::BI__builtin_sve_svrshr_n_s8_z:
1554 ImmChecks.emplace_back(2, 3, 8);
1555   break;
1556 case SVE::BI__builtin_sve_svrshr_n_u16_m:
1557 ImmChecks.emplace_back(2, 3, 16);
1558   break;
1559 case SVE::BI__builtin_sve_svrshr_n_u16_x:
1560 ImmChecks.emplace_back(2, 3, 16);
1561   break;
1562 case SVE::BI__builtin_sve_svrshr_n_u16_z:
1563 ImmChecks.emplace_back(2, 3, 16);
1564   break;
1565 case SVE::BI__builtin_sve_svrshr_n_u32_m:
1566 ImmChecks.emplace_back(2, 3, 32);
1567   break;
1568 case SVE::BI__builtin_sve_svrshr_n_u32_x:
1569 ImmChecks.emplace_back(2, 3, 32);
1570   break;
1571 case SVE::BI__builtin_sve_svrshr_n_u32_z:
1572 ImmChecks.emplace_back(2, 3, 32);
1573   break;
1574 case SVE::BI__builtin_sve_svrshr_n_u64_m:
1575 ImmChecks.emplace_back(2, 3, 64);
1576   break;
1577 case SVE::BI__builtin_sve_svrshr_n_u64_x:
1578 ImmChecks.emplace_back(2, 3, 64);
1579   break;
1580 case SVE::BI__builtin_sve_svrshr_n_u64_z:
1581 ImmChecks.emplace_back(2, 3, 64);
1582   break;
1583 case SVE::BI__builtin_sve_svrshr_n_u8_m:
1584 ImmChecks.emplace_back(2, 3, 8);
1585   break;
1586 case SVE::BI__builtin_sve_svrshr_n_u8_x:
1587 ImmChecks.emplace_back(2, 3, 8);
1588   break;
1589 case SVE::BI__builtin_sve_svrshr_n_u8_z:
1590 ImmChecks.emplace_back(2, 3, 8);
1591   break;
1592 case SVE::BI__builtin_sve_svrshrnb_n_s16:
1593 ImmChecks.emplace_back(1, 4, 16);
1594   break;
1595 case SVE::BI__builtin_sve_svrshrnb_n_s32:
1596 ImmChecks.emplace_back(1, 4, 32);
1597   break;
1598 case SVE::BI__builtin_sve_svrshrnb_n_s64:
1599 ImmChecks.emplace_back(1, 4, 64);
1600   break;
1601 case SVE::BI__builtin_sve_svrshrnb_n_u16:
1602 ImmChecks.emplace_back(1, 4, 16);
1603   break;
1604 case SVE::BI__builtin_sve_svrshrnb_n_u32:
1605 ImmChecks.emplace_back(1, 4, 32);
1606   break;
1607 case SVE::BI__builtin_sve_svrshrnb_n_u64:
1608 ImmChecks.emplace_back(1, 4, 64);
1609   break;
1610 case SVE::BI__builtin_sve_svrshrnt_n_s16:
1611 ImmChecks.emplace_back(2, 4, 16);
1612   break;
1613 case SVE::BI__builtin_sve_svrshrnt_n_s32:
1614 ImmChecks.emplace_back(2, 4, 32);
1615   break;
1616 case SVE::BI__builtin_sve_svrshrnt_n_s64:
1617 ImmChecks.emplace_back(2, 4, 64);
1618   break;
1619 case SVE::BI__builtin_sve_svrshrnt_n_u16:
1620 ImmChecks.emplace_back(2, 4, 16);
1621   break;
1622 case SVE::BI__builtin_sve_svrshrnt_n_u32:
1623 ImmChecks.emplace_back(2, 4, 32);
1624   break;
1625 case SVE::BI__builtin_sve_svrshrnt_n_u64:
1626 ImmChecks.emplace_back(2, 4, 64);
1627   break;
1628 case SVE::BI__builtin_sve_svrsra_n_s16:
1629 ImmChecks.emplace_back(2, 3, 16);
1630   break;
1631 case SVE::BI__builtin_sve_svrsra_n_s32:
1632 ImmChecks.emplace_back(2, 3, 32);
1633   break;
1634 case SVE::BI__builtin_sve_svrsra_n_s64:
1635 ImmChecks.emplace_back(2, 3, 64);
1636   break;
1637 case SVE::BI__builtin_sve_svrsra_n_s8:
1638 ImmChecks.emplace_back(2, 3, 8);
1639   break;
1640 case SVE::BI__builtin_sve_svrsra_n_u16:
1641 ImmChecks.emplace_back(2, 3, 16);
1642   break;
1643 case SVE::BI__builtin_sve_svrsra_n_u32:
1644 ImmChecks.emplace_back(2, 3, 32);
1645   break;
1646 case SVE::BI__builtin_sve_svrsra_n_u64:
1647 ImmChecks.emplace_back(2, 3, 64);
1648   break;
1649 case SVE::BI__builtin_sve_svrsra_n_u8:
1650 ImmChecks.emplace_back(2, 3, 8);
1651   break;
1652 case SVE::BI__builtin_sve_svset2_b:
1653 ImmChecks.emplace_back(1, 14, 0);
1654   break;
1655 case SVE::BI__builtin_sve_svset2_bf16:
1656 ImmChecks.emplace_back(1, 14, 0);
1657   break;
1658 case SVE::BI__builtin_sve_svset2_f16:
1659 ImmChecks.emplace_back(1, 14, 0);
1660   break;
1661 case SVE::BI__builtin_sve_svset2_f32:
1662 ImmChecks.emplace_back(1, 14, 0);
1663   break;
1664 case SVE::BI__builtin_sve_svset2_f64:
1665 ImmChecks.emplace_back(1, 14, 0);
1666   break;
1667 case SVE::BI__builtin_sve_svset2_s16:
1668 ImmChecks.emplace_back(1, 14, 0);
1669   break;
1670 case SVE::BI__builtin_sve_svset2_s32:
1671 ImmChecks.emplace_back(1, 14, 0);
1672   break;
1673 case SVE::BI__builtin_sve_svset2_s64:
1674 ImmChecks.emplace_back(1, 14, 0);
1675   break;
1676 case SVE::BI__builtin_sve_svset2_s8:
1677 ImmChecks.emplace_back(1, 14, 0);
1678   break;
1679 case SVE::BI__builtin_sve_svset2_u16:
1680 ImmChecks.emplace_back(1, 14, 0);
1681   break;
1682 case SVE::BI__builtin_sve_svset2_u32:
1683 ImmChecks.emplace_back(1, 14, 0);
1684   break;
1685 case SVE::BI__builtin_sve_svset2_u64:
1686 ImmChecks.emplace_back(1, 14, 0);
1687   break;
1688 case SVE::BI__builtin_sve_svset2_u8:
1689 ImmChecks.emplace_back(1, 14, 0);
1690   break;
1691 case SVE::BI__builtin_sve_svset3_bf16:
1692 ImmChecks.emplace_back(1, 15, 0);
1693   break;
1694 case SVE::BI__builtin_sve_svset3_f16:
1695 ImmChecks.emplace_back(1, 15, 0);
1696   break;
1697 case SVE::BI__builtin_sve_svset3_f32:
1698 ImmChecks.emplace_back(1, 15, 0);
1699   break;
1700 case SVE::BI__builtin_sve_svset3_f64:
1701 ImmChecks.emplace_back(1, 15, 0);
1702   break;
1703 case SVE::BI__builtin_sve_svset3_s16:
1704 ImmChecks.emplace_back(1, 15, 0);
1705   break;
1706 case SVE::BI__builtin_sve_svset3_s32:
1707 ImmChecks.emplace_back(1, 15, 0);
1708   break;
1709 case SVE::BI__builtin_sve_svset3_s64:
1710 ImmChecks.emplace_back(1, 15, 0);
1711   break;
1712 case SVE::BI__builtin_sve_svset3_s8:
1713 ImmChecks.emplace_back(1, 15, 0);
1714   break;
1715 case SVE::BI__builtin_sve_svset3_u16:
1716 ImmChecks.emplace_back(1, 15, 0);
1717   break;
1718 case SVE::BI__builtin_sve_svset3_u32:
1719 ImmChecks.emplace_back(1, 15, 0);
1720   break;
1721 case SVE::BI__builtin_sve_svset3_u64:
1722 ImmChecks.emplace_back(1, 15, 0);
1723   break;
1724 case SVE::BI__builtin_sve_svset3_u8:
1725 ImmChecks.emplace_back(1, 15, 0);
1726   break;
1727 case SVE::BI__builtin_sve_svset4_b:
1728 ImmChecks.emplace_back(1, 16, 0);
1729   break;
1730 case SVE::BI__builtin_sve_svset4_bf16:
1731 ImmChecks.emplace_back(1, 16, 0);
1732   break;
1733 case SVE::BI__builtin_sve_svset4_f16:
1734 ImmChecks.emplace_back(1, 16, 0);
1735   break;
1736 case SVE::BI__builtin_sve_svset4_f32:
1737 ImmChecks.emplace_back(1, 16, 0);
1738   break;
1739 case SVE::BI__builtin_sve_svset4_f64:
1740 ImmChecks.emplace_back(1, 16, 0);
1741   break;
1742 case SVE::BI__builtin_sve_svset4_s16:
1743 ImmChecks.emplace_back(1, 16, 0);
1744   break;
1745 case SVE::BI__builtin_sve_svset4_s32:
1746 ImmChecks.emplace_back(1, 16, 0);
1747   break;
1748 case SVE::BI__builtin_sve_svset4_s64:
1749 ImmChecks.emplace_back(1, 16, 0);
1750   break;
1751 case SVE::BI__builtin_sve_svset4_s8:
1752 ImmChecks.emplace_back(1, 16, 0);
1753   break;
1754 case SVE::BI__builtin_sve_svset4_u16:
1755 ImmChecks.emplace_back(1, 16, 0);
1756   break;
1757 case SVE::BI__builtin_sve_svset4_u32:
1758 ImmChecks.emplace_back(1, 16, 0);
1759   break;
1760 case SVE::BI__builtin_sve_svset4_u64:
1761 ImmChecks.emplace_back(1, 16, 0);
1762   break;
1763 case SVE::BI__builtin_sve_svset4_u8:
1764 ImmChecks.emplace_back(1, 16, 0);
1765   break;
1766 case SVE::BI__builtin_sve_svshllb_n_s16:
1767 ImmChecks.emplace_back(1, 5, 8);
1768   break;
1769 case SVE::BI__builtin_sve_svshllb_n_s32:
1770 ImmChecks.emplace_back(1, 5, 16);
1771   break;
1772 case SVE::BI__builtin_sve_svshllb_n_s64:
1773 ImmChecks.emplace_back(1, 5, 32);
1774   break;
1775 case SVE::BI__builtin_sve_svshllb_n_u16:
1776 ImmChecks.emplace_back(1, 5, 8);
1777   break;
1778 case SVE::BI__builtin_sve_svshllb_n_u32:
1779 ImmChecks.emplace_back(1, 5, 16);
1780   break;
1781 case SVE::BI__builtin_sve_svshllb_n_u64:
1782 ImmChecks.emplace_back(1, 5, 32);
1783   break;
1784 case SVE::BI__builtin_sve_svshllt_n_s16:
1785 ImmChecks.emplace_back(1, 5, 8);
1786   break;
1787 case SVE::BI__builtin_sve_svshllt_n_s32:
1788 ImmChecks.emplace_back(1, 5, 16);
1789   break;
1790 case SVE::BI__builtin_sve_svshllt_n_s64:
1791 ImmChecks.emplace_back(1, 5, 32);
1792   break;
1793 case SVE::BI__builtin_sve_svshllt_n_u16:
1794 ImmChecks.emplace_back(1, 5, 8);
1795   break;
1796 case SVE::BI__builtin_sve_svshllt_n_u32:
1797 ImmChecks.emplace_back(1, 5, 16);
1798   break;
1799 case SVE::BI__builtin_sve_svshllt_n_u64:
1800 ImmChecks.emplace_back(1, 5, 32);
1801   break;
1802 case SVE::BI__builtin_sve_svshrnb_n_s16:
1803 ImmChecks.emplace_back(1, 4, 16);
1804   break;
1805 case SVE::BI__builtin_sve_svshrnb_n_s32:
1806 ImmChecks.emplace_back(1, 4, 32);
1807   break;
1808 case SVE::BI__builtin_sve_svshrnb_n_s64:
1809 ImmChecks.emplace_back(1, 4, 64);
1810   break;
1811 case SVE::BI__builtin_sve_svshrnb_n_u16:
1812 ImmChecks.emplace_back(1, 4, 16);
1813   break;
1814 case SVE::BI__builtin_sve_svshrnb_n_u32:
1815 ImmChecks.emplace_back(1, 4, 32);
1816   break;
1817 case SVE::BI__builtin_sve_svshrnb_n_u64:
1818 ImmChecks.emplace_back(1, 4, 64);
1819   break;
1820 case SVE::BI__builtin_sve_svshrnt_n_s16:
1821 ImmChecks.emplace_back(2, 4, 16);
1822   break;
1823 case SVE::BI__builtin_sve_svshrnt_n_s32:
1824 ImmChecks.emplace_back(2, 4, 32);
1825   break;
1826 case SVE::BI__builtin_sve_svshrnt_n_s64:
1827 ImmChecks.emplace_back(2, 4, 64);
1828   break;
1829 case SVE::BI__builtin_sve_svshrnt_n_u16:
1830 ImmChecks.emplace_back(2, 4, 16);
1831   break;
1832 case SVE::BI__builtin_sve_svshrnt_n_u32:
1833 ImmChecks.emplace_back(2, 4, 32);
1834   break;
1835 case SVE::BI__builtin_sve_svshrnt_n_u64:
1836 ImmChecks.emplace_back(2, 4, 64);
1837   break;
1838 case SVE::BI__builtin_sve_svsli_n_s16:
1839 ImmChecks.emplace_back(2, 5, 16);
1840   break;
1841 case SVE::BI__builtin_sve_svsli_n_s32:
1842 ImmChecks.emplace_back(2, 5, 32);
1843   break;
1844 case SVE::BI__builtin_sve_svsli_n_s64:
1845 ImmChecks.emplace_back(2, 5, 64);
1846   break;
1847 case SVE::BI__builtin_sve_svsli_n_s8:
1848 ImmChecks.emplace_back(2, 5, 8);
1849   break;
1850 case SVE::BI__builtin_sve_svsli_n_u16:
1851 ImmChecks.emplace_back(2, 5, 16);
1852   break;
1853 case SVE::BI__builtin_sve_svsli_n_u32:
1854 ImmChecks.emplace_back(2, 5, 32);
1855   break;
1856 case SVE::BI__builtin_sve_svsli_n_u64:
1857 ImmChecks.emplace_back(2, 5, 64);
1858   break;
1859 case SVE::BI__builtin_sve_svsli_n_u8:
1860 ImmChecks.emplace_back(2, 5, 8);
1861   break;
1862 case SVE::BI__builtin_sve_svsra_n_s16:
1863 ImmChecks.emplace_back(2, 3, 16);
1864   break;
1865 case SVE::BI__builtin_sve_svsra_n_s32:
1866 ImmChecks.emplace_back(2, 3, 32);
1867   break;
1868 case SVE::BI__builtin_sve_svsra_n_s64:
1869 ImmChecks.emplace_back(2, 3, 64);
1870   break;
1871 case SVE::BI__builtin_sve_svsra_n_s8:
1872 ImmChecks.emplace_back(2, 3, 8);
1873   break;
1874 case SVE::BI__builtin_sve_svsra_n_u16:
1875 ImmChecks.emplace_back(2, 3, 16);
1876   break;
1877 case SVE::BI__builtin_sve_svsra_n_u32:
1878 ImmChecks.emplace_back(2, 3, 32);
1879   break;
1880 case SVE::BI__builtin_sve_svsra_n_u64:
1881 ImmChecks.emplace_back(2, 3, 64);
1882   break;
1883 case SVE::BI__builtin_sve_svsra_n_u8:
1884 ImmChecks.emplace_back(2, 3, 8);
1885   break;
1886 case SVE::BI__builtin_sve_svsri_n_s16:
1887 ImmChecks.emplace_back(2, 3, 16);
1888   break;
1889 case SVE::BI__builtin_sve_svsri_n_s32:
1890 ImmChecks.emplace_back(2, 3, 32);
1891   break;
1892 case SVE::BI__builtin_sve_svsri_n_s64:
1893 ImmChecks.emplace_back(2, 3, 64);
1894   break;
1895 case SVE::BI__builtin_sve_svsri_n_s8:
1896 ImmChecks.emplace_back(2, 3, 8);
1897   break;
1898 case SVE::BI__builtin_sve_svsri_n_u16:
1899 ImmChecks.emplace_back(2, 3, 16);
1900   break;
1901 case SVE::BI__builtin_sve_svsri_n_u32:
1902 ImmChecks.emplace_back(2, 3, 32);
1903   break;
1904 case SVE::BI__builtin_sve_svsri_n_u64:
1905 ImmChecks.emplace_back(2, 3, 64);
1906   break;
1907 case SVE::BI__builtin_sve_svsri_n_u8:
1908 ImmChecks.emplace_back(2, 3, 8);
1909   break;
1910 case SVE::BI__builtin_sve_svsudot_lane_s32:
1911 ImmChecks.emplace_back(3, 10, 8);
1912   break;
1913 case SVE::BI__builtin_sve_svtmad_f16:
1914 ImmChecks.emplace_back(2, 6, 0);
1915   break;
1916 case SVE::BI__builtin_sve_svtmad_f32:
1917 ImmChecks.emplace_back(2, 6, 0);
1918   break;
1919 case SVE::BI__builtin_sve_svtmad_f64:
1920 ImmChecks.emplace_back(2, 6, 0);
1921   break;
1922 case SVE::BI__builtin_sve_svusdot_lane_s32:
1923 ImmChecks.emplace_back(3, 10, 8);
1924   break;
1925 case SVE::BI__builtin_sve_svwhilege_c16_s64:
1926 ImmChecks.emplace_back(2, 20, 0);
1927   break;
1928 case SVE::BI__builtin_sve_svwhilege_c16_u64:
1929 ImmChecks.emplace_back(2, 20, 0);
1930   break;
1931 case SVE::BI__builtin_sve_svwhilege_c32_s64:
1932 ImmChecks.emplace_back(2, 20, 0);
1933   break;
1934 case SVE::BI__builtin_sve_svwhilege_c32_u64:
1935 ImmChecks.emplace_back(2, 20, 0);
1936   break;
1937 case SVE::BI__builtin_sve_svwhilege_c64_s64:
1938 ImmChecks.emplace_back(2, 20, 0);
1939   break;
1940 case SVE::BI__builtin_sve_svwhilege_c64_u64:
1941 ImmChecks.emplace_back(2, 20, 0);
1942   break;
1943 case SVE::BI__builtin_sve_svwhilege_c8_s64:
1944 ImmChecks.emplace_back(2, 20, 0);
1945   break;
1946 case SVE::BI__builtin_sve_svwhilege_c8_u64:
1947 ImmChecks.emplace_back(2, 20, 0);
1948   break;
1949 case SVE::BI__builtin_sve_svwhilegt_c16_s64:
1950 ImmChecks.emplace_back(2, 20, 0);
1951   break;
1952 case SVE::BI__builtin_sve_svwhilegt_c16_u64:
1953 ImmChecks.emplace_back(2, 20, 0);
1954   break;
1955 case SVE::BI__builtin_sve_svwhilegt_c32_s64:
1956 ImmChecks.emplace_back(2, 20, 0);
1957   break;
1958 case SVE::BI__builtin_sve_svwhilegt_c32_u64:
1959 ImmChecks.emplace_back(2, 20, 0);
1960   break;
1961 case SVE::BI__builtin_sve_svwhilegt_c64_s64:
1962 ImmChecks.emplace_back(2, 20, 0);
1963   break;
1964 case SVE::BI__builtin_sve_svwhilegt_c64_u64:
1965 ImmChecks.emplace_back(2, 20, 0);
1966   break;
1967 case SVE::BI__builtin_sve_svwhilegt_c8_s64:
1968 ImmChecks.emplace_back(2, 20, 0);
1969   break;
1970 case SVE::BI__builtin_sve_svwhilegt_c8_u64:
1971 ImmChecks.emplace_back(2, 20, 0);
1972   break;
1973 case SVE::BI__builtin_sve_svwhilele_c16_s64:
1974 ImmChecks.emplace_back(2, 20, 0);
1975   break;
1976 case SVE::BI__builtin_sve_svwhilele_c16_u64:
1977 ImmChecks.emplace_back(2, 20, 0);
1978   break;
1979 case SVE::BI__builtin_sve_svwhilele_c32_s64:
1980 ImmChecks.emplace_back(2, 20, 0);
1981   break;
1982 case SVE::BI__builtin_sve_svwhilele_c32_u64:
1983 ImmChecks.emplace_back(2, 20, 0);
1984   break;
1985 case SVE::BI__builtin_sve_svwhilele_c64_s64:
1986 ImmChecks.emplace_back(2, 20, 0);
1987   break;
1988 case SVE::BI__builtin_sve_svwhilele_c64_u64:
1989 ImmChecks.emplace_back(2, 20, 0);
1990   break;
1991 case SVE::BI__builtin_sve_svwhilele_c8_s64:
1992 ImmChecks.emplace_back(2, 20, 0);
1993   break;
1994 case SVE::BI__builtin_sve_svwhilele_c8_u64:
1995 ImmChecks.emplace_back(2, 20, 0);
1996   break;
1997 case SVE::BI__builtin_sve_svwhilelt_c16_s64:
1998 ImmChecks.emplace_back(2, 20, 0);
1999   break;
2000 case SVE::BI__builtin_sve_svwhilelt_c16_u64:
2001 ImmChecks.emplace_back(2, 20, 0);
2002   break;
2003 case SVE::BI__builtin_sve_svwhilelt_c32_s64:
2004 ImmChecks.emplace_back(2, 20, 0);
2005   break;
2006 case SVE::BI__builtin_sve_svwhilelt_c32_u64:
2007 ImmChecks.emplace_back(2, 20, 0);
2008   break;
2009 case SVE::BI__builtin_sve_svwhilelt_c64_s64:
2010 ImmChecks.emplace_back(2, 20, 0);
2011   break;
2012 case SVE::BI__builtin_sve_svwhilelt_c64_u64:
2013 ImmChecks.emplace_back(2, 20, 0);
2014   break;
2015 case SVE::BI__builtin_sve_svwhilelt_c8_s64:
2016 ImmChecks.emplace_back(2, 20, 0);
2017   break;
2018 case SVE::BI__builtin_sve_svwhilelt_c8_u64:
2019 ImmChecks.emplace_back(2, 20, 0);
2020   break;
2021 case SVE::BI__builtin_sve_svxar_n_s16:
2022 ImmChecks.emplace_back(2, 3, 16);
2023   break;
2024 case SVE::BI__builtin_sve_svxar_n_s32:
2025 ImmChecks.emplace_back(2, 3, 32);
2026   break;
2027 case SVE::BI__builtin_sve_svxar_n_s64:
2028 ImmChecks.emplace_back(2, 3, 64);
2029   break;
2030 case SVE::BI__builtin_sve_svxar_n_s8:
2031 ImmChecks.emplace_back(2, 3, 8);
2032   break;
2033 case SVE::BI__builtin_sve_svxar_n_u16:
2034 ImmChecks.emplace_back(2, 3, 16);
2035   break;
2036 case SVE::BI__builtin_sve_svxar_n_u32:
2037 ImmChecks.emplace_back(2, 3, 32);
2038   break;
2039 case SVE::BI__builtin_sve_svxar_n_u64:
2040 ImmChecks.emplace_back(2, 3, 64);
2041   break;
2042 case SVE::BI__builtin_sve_svxar_n_u8:
2043 ImmChecks.emplace_back(2, 3, 8);
2044   break;
2045 #endif
2046