Warning, /include/clang/Basic/arm_cde_builtin_sema.inc is written in an unsupported language. File is not indexed.
0001 case ARM::BI__builtin_arm_cde_cx1:
0002 case ARM::BI__builtin_arm_cde_cx1d:
0003 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0004 SemaRef.BuiltinConstantArgRange(TheCall, 1, 0x0, 0x1FFF);
0005 break;
0006 case ARM::BI__builtin_arm_cde_vcx1_u32:
0007 case ARM::BI__builtin_arm_cde_vcx1d_u64:
0008 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0009 SemaRef.BuiltinConstantArgRange(TheCall, 1, 0x0, 0x7FF);
0010 break;
0011 case ARM::BI__builtin_arm_cde_vcx1q_u8:
0012 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0013 SemaRef.BuiltinConstantArgRange(TheCall, 1, 0x0, 0xFFF);
0014 break;
0015 case ARM::BI__builtin_arm_cde_cx2:
0016 case ARM::BI__builtin_arm_cde_cx2d:
0017 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0018 SemaRef.BuiltinConstantArgRange(TheCall, 2, 0x0, 0x1FF);
0019 break;
0020 case ARM::BI__builtin_arm_cde_cx1a:
0021 case ARM::BI__builtin_arm_cde_cx1da:
0022 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0023 SemaRef.BuiltinConstantArgRange(TheCall, 2, 0x0, 0x1FFF);
0024 break;
0025 case ARM::BI__builtin_arm_cde_vcx2_u32:
0026 case ARM::BI__builtin_arm_cde_vcx2d_u64:
0027 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0028 SemaRef.BuiltinConstantArgRange(TheCall, 2, 0x0, 0x3F);
0029 break;
0030 case ARM::BI__builtin_arm_cde_vcx2q_f16:
0031 case ARM::BI__builtin_arm_cde_vcx2q_f32:
0032 case ARM::BI__builtin_arm_cde_vcx2q_s16:
0033 case ARM::BI__builtin_arm_cde_vcx2q_s32:
0034 case ARM::BI__builtin_arm_cde_vcx2q_s64:
0035 case ARM::BI__builtin_arm_cde_vcx2q_s8:
0036 case ARM::BI__builtin_arm_cde_vcx2q_u16:
0037 case ARM::BI__builtin_arm_cde_vcx2q_u32:
0038 case ARM::BI__builtin_arm_cde_vcx2q_u64:
0039 case ARM::BI__builtin_arm_cde_vcx2q_u8:
0040 case ARM::BI__builtin_arm_cde_vcx2q_u8_f16:
0041 case ARM::BI__builtin_arm_cde_vcx2q_u8_f32:
0042 case ARM::BI__builtin_arm_cde_vcx2q_u8_s16:
0043 case ARM::BI__builtin_arm_cde_vcx2q_u8_s32:
0044 case ARM::BI__builtin_arm_cde_vcx2q_u8_s64:
0045 case ARM::BI__builtin_arm_cde_vcx2q_u8_s8:
0046 case ARM::BI__builtin_arm_cde_vcx2q_u8_u16:
0047 case ARM::BI__builtin_arm_cde_vcx2q_u8_u32:
0048 case ARM::BI__builtin_arm_cde_vcx2q_u8_u64:
0049 case ARM::BI__builtin_arm_cde_vcx2q_u8_u8:
0050 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0051 SemaRef.BuiltinConstantArgRange(TheCall, 2, 0x0, 0x7F);
0052 break;
0053 case ARM::BI__builtin_arm_cde_vcx1a_u32:
0054 case ARM::BI__builtin_arm_cde_vcx1da_u64:
0055 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0056 SemaRef.BuiltinConstantArgRange(TheCall, 2, 0x0, 0x7FF);
0057 break;
0058 case ARM::BI__builtin_arm_cde_vcx1q_m_f16:
0059 case ARM::BI__builtin_arm_cde_vcx1q_m_f32:
0060 case ARM::BI__builtin_arm_cde_vcx1q_m_s16:
0061 case ARM::BI__builtin_arm_cde_vcx1q_m_s32:
0062 case ARM::BI__builtin_arm_cde_vcx1q_m_s64:
0063 case ARM::BI__builtin_arm_cde_vcx1q_m_s8:
0064 case ARM::BI__builtin_arm_cde_vcx1q_m_u16:
0065 case ARM::BI__builtin_arm_cde_vcx1q_m_u32:
0066 case ARM::BI__builtin_arm_cde_vcx1q_m_u64:
0067 case ARM::BI__builtin_arm_cde_vcx1q_m_u8:
0068 case ARM::BI__builtin_arm_cde_vcx1qa_f16:
0069 case ARM::BI__builtin_arm_cde_vcx1qa_f32:
0070 case ARM::BI__builtin_arm_cde_vcx1qa_m_f16:
0071 case ARM::BI__builtin_arm_cde_vcx1qa_m_f32:
0072 case ARM::BI__builtin_arm_cde_vcx1qa_m_s16:
0073 case ARM::BI__builtin_arm_cde_vcx1qa_m_s32:
0074 case ARM::BI__builtin_arm_cde_vcx1qa_m_s64:
0075 case ARM::BI__builtin_arm_cde_vcx1qa_m_s8:
0076 case ARM::BI__builtin_arm_cde_vcx1qa_m_u16:
0077 case ARM::BI__builtin_arm_cde_vcx1qa_m_u32:
0078 case ARM::BI__builtin_arm_cde_vcx1qa_m_u64:
0079 case ARM::BI__builtin_arm_cde_vcx1qa_m_u8:
0080 case ARM::BI__builtin_arm_cde_vcx1qa_s16:
0081 case ARM::BI__builtin_arm_cde_vcx1qa_s32:
0082 case ARM::BI__builtin_arm_cde_vcx1qa_s64:
0083 case ARM::BI__builtin_arm_cde_vcx1qa_s8:
0084 case ARM::BI__builtin_arm_cde_vcx1qa_u16:
0085 case ARM::BI__builtin_arm_cde_vcx1qa_u32:
0086 case ARM::BI__builtin_arm_cde_vcx1qa_u64:
0087 case ARM::BI__builtin_arm_cde_vcx1qa_u8:
0088 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0089 SemaRef.BuiltinConstantArgRange(TheCall, 2, 0x0, 0xFFF);
0090 break;
0091 case ARM::BI__builtin_arm_cde_cx2a:
0092 case ARM::BI__builtin_arm_cde_cx2da:
0093 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0094 SemaRef.BuiltinConstantArgRange(TheCall, 3, 0x0, 0x1FF);
0095 break;
0096 case ARM::BI__builtin_arm_cde_cx3:
0097 case ARM::BI__builtin_arm_cde_cx3d:
0098 case ARM::BI__builtin_arm_cde_vcx2a_u32:
0099 case ARM::BI__builtin_arm_cde_vcx2da_u64:
0100 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0101 SemaRef.BuiltinConstantArgRange(TheCall, 3, 0x0, 0x3F);
0102 break;
0103 case ARM::BI__builtin_arm_cde_vcx3_u32:
0104 case ARM::BI__builtin_arm_cde_vcx3d_u64:
0105 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0106 SemaRef.BuiltinConstantArgRange(TheCall, 3, 0x0, 0x7);
0107 break;
0108 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_f16:
0109 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_f32:
0110 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_s16:
0111 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_s32:
0112 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_s64:
0113 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_s8:
0114 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_u16:
0115 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_u32:
0116 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_u64:
0117 case ARM::BI__builtin_arm_cde_vcx2q_m_impl_u8:
0118 case ARM::BI__builtin_arm_cde_vcx2qa_impl_f16:
0119 case ARM::BI__builtin_arm_cde_vcx2qa_impl_f32:
0120 case ARM::BI__builtin_arm_cde_vcx2qa_impl_s16:
0121 case ARM::BI__builtin_arm_cde_vcx2qa_impl_s32:
0122 case ARM::BI__builtin_arm_cde_vcx2qa_impl_s64:
0123 case ARM::BI__builtin_arm_cde_vcx2qa_impl_s8:
0124 case ARM::BI__builtin_arm_cde_vcx2qa_impl_u16:
0125 case ARM::BI__builtin_arm_cde_vcx2qa_impl_u32:
0126 case ARM::BI__builtin_arm_cde_vcx2qa_impl_u64:
0127 case ARM::BI__builtin_arm_cde_vcx2qa_impl_u8:
0128 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_f16:
0129 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_f32:
0130 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_s16:
0131 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_s32:
0132 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_s64:
0133 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_s8:
0134 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_u16:
0135 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_u32:
0136 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_u64:
0137 case ARM::BI__builtin_arm_cde_vcx2qa_m_impl_u8:
0138 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0139 SemaRef.BuiltinConstantArgRange(TheCall, 3, 0x0, 0x7F);
0140 break;
0141 case ARM::BI__builtin_arm_cde_vcx3q_impl_f16:
0142 case ARM::BI__builtin_arm_cde_vcx3q_impl_f32:
0143 case ARM::BI__builtin_arm_cde_vcx3q_impl_s16:
0144 case ARM::BI__builtin_arm_cde_vcx3q_impl_s32:
0145 case ARM::BI__builtin_arm_cde_vcx3q_impl_s64:
0146 case ARM::BI__builtin_arm_cde_vcx3q_impl_s8:
0147 case ARM::BI__builtin_arm_cde_vcx3q_impl_u16:
0148 case ARM::BI__builtin_arm_cde_vcx3q_impl_u32:
0149 case ARM::BI__builtin_arm_cde_vcx3q_impl_u64:
0150 case ARM::BI__builtin_arm_cde_vcx3q_impl_u8:
0151 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_f16:
0152 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_f32:
0153 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_s16:
0154 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_s32:
0155 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_s64:
0156 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_s8:
0157 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_u16:
0158 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_u32:
0159 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_u64:
0160 case ARM::BI__builtin_arm_cde_vcx3q_u8_impl_u8:
0161 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0162 SemaRef.BuiltinConstantArgRange(TheCall, 3, 0x0, 0xF);
0163 break;
0164 case ARM::BI__builtin_arm_cde_cx3a:
0165 case ARM::BI__builtin_arm_cde_cx3da:
0166 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0167 SemaRef.BuiltinConstantArgRange(TheCall, 4, 0x0, 0x3F);
0168 break;
0169 case ARM::BI__builtin_arm_cde_vcx3a_u32:
0170 case ARM::BI__builtin_arm_cde_vcx3da_u64:
0171 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0172 SemaRef.BuiltinConstantArgRange(TheCall, 4, 0x0, 0x7);
0173 break;
0174 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_f16:
0175 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_f32:
0176 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_s16:
0177 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_s32:
0178 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_s64:
0179 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_s8:
0180 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_u16:
0181 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_u32:
0182 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_u64:
0183 case ARM::BI__builtin_arm_cde_vcx3q_m_impl_u8:
0184 case ARM::BI__builtin_arm_cde_vcx3qa_impl_f16:
0185 case ARM::BI__builtin_arm_cde_vcx3qa_impl_f32:
0186 case ARM::BI__builtin_arm_cde_vcx3qa_impl_s16:
0187 case ARM::BI__builtin_arm_cde_vcx3qa_impl_s32:
0188 case ARM::BI__builtin_arm_cde_vcx3qa_impl_s64:
0189 case ARM::BI__builtin_arm_cde_vcx3qa_impl_s8:
0190 case ARM::BI__builtin_arm_cde_vcx3qa_impl_u16:
0191 case ARM::BI__builtin_arm_cde_vcx3qa_impl_u32:
0192 case ARM::BI__builtin_arm_cde_vcx3qa_impl_u64:
0193 case ARM::BI__builtin_arm_cde_vcx3qa_impl_u8:
0194 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_f16:
0195 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_f32:
0196 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_s16:
0197 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_s32:
0198 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_s64:
0199 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_s8:
0200 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_u16:
0201 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_u32:
0202 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_u64:
0203 case ARM::BI__builtin_arm_cde_vcx3qa_m_impl_u8:
0204 Err = SemaRef.BuiltinConstantArgRange(TheCall, 0, 0x0, 0x7) ||
0205 SemaRef.BuiltinConstantArgRange(TheCall, 4, 0x0, 0xF);
0206 break;
