File indexing completed on 2025-08-28 09:11:38
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012 #ifndef XSIMD_CONFIG_HPP
0013 #define XSIMD_CONFIG_HPP
0014
0015 #define XSIMD_VERSION_MAJOR 13
0016 #define XSIMD_VERSION_MINOR 1
0017 #define XSIMD_VERSION_PATCH 0
0018
0019
0020
0021
0022
0023
0024
0025
0026
0027
0028
0029
0030 #ifdef __SSE2__
0031 #define XSIMD_WITH_SSE2 1
0032 #else
0033 #define XSIMD_WITH_SSE2 0
0034 #endif
0035
0036
0037
0038
0039
0040
0041 #ifdef __SSE3__
0042 #define XSIMD_WITH_SSE3 1
0043 #else
0044 #define XSIMD_WITH_SSE3 0
0045 #endif
0046
0047
0048
0049
0050
0051
0052 #ifdef __SSSE3__
0053 #define XSIMD_WITH_SSSE3 1
0054 #else
0055 #define XSIMD_WITH_SSSE3 0
0056 #endif
0057
0058
0059
0060
0061
0062
0063 #ifdef __SSE4_1__
0064 #define XSIMD_WITH_SSE4_1 1
0065 #else
0066 #define XSIMD_WITH_SSE4_1 0
0067 #endif
0068
0069
0070
0071
0072
0073
0074 #ifdef __SSE4_2__
0075 #define XSIMD_WITH_SSE4_2 1
0076 #else
0077 #define XSIMD_WITH_SSE4_2 0
0078 #endif
0079
0080
0081
0082
0083
0084
0085 #ifdef __AVX__
0086 #define XSIMD_WITH_AVX 1
0087 #else
0088 #define XSIMD_WITH_AVX 0
0089 #endif
0090
0091
0092
0093
0094
0095
0096 #ifdef __AVX2__
0097 #define XSIMD_WITH_AVX2 1
0098 #else
0099 #define XSIMD_WITH_AVX2 0
0100 #endif
0101
0102
0103
0104
0105
0106
0107 #ifdef __AVXVNNI__
0108 #define XSIMD_WITH_AVXVNNI 1
0109 #else
0110 #define XSIMD_WITH_AVXVNNI 0
0111 #endif
0112
0113
0114
0115
0116
0117
0118 #ifdef __FMA__
0119
0120 #if defined(__SSE__)
0121 #ifndef XSIMD_WITH_FMA3_SSE
0122 #define XSIMD_WITH_FMA3_SSE 1
0123 #endif
0124 #else
0125
0126 #if XSIMD_WITH_FMA3_SSE
0127 #error "Manually set XSIMD_WITH_FMA3_SSE is incompatible with current compiler flags"
0128 #endif
0129
0130 #define XSIMD_WITH_FMA3_SSE 0
0131 #endif
0132
0133 #else
0134
0135 #if XSIMD_WITH_FMA3_SSE
0136 #error "Manually set XSIMD_WITH_FMA3_SSE is incompatible with current compiler flags"
0137 #endif
0138
0139 #define XSIMD_WITH_FMA3_SSE 0
0140 #endif
0141
0142
0143
0144
0145
0146
0147 #ifdef __FMA__
0148
0149 #if defined(__AVX__)
0150 #ifndef XSIMD_WITH_FMA3_AVX
0151 #define XSIMD_WITH_FMA3_AVX 1
0152 #endif
0153 #else
0154
0155 #if XSIMD_WITH_FMA3_AVX
0156 #error "Manually set XSIMD_WITH_FMA3_AVX is incompatible with current compiler flags"
0157 #endif
0158
0159 #define XSIMD_WITH_FMA3_AVX 0
0160 #endif
0161
0162 #if defined(__AVX2__)
0163 #ifndef XSIMD_WITH_FMA3_AVX2
0164 #define XSIMD_WITH_FMA3_AVX2 1
0165 #endif
0166 #else
0167
0168 #if XSIMD_WITH_FMA3_AVX2
0169 #error "Manually set XSIMD_WITH_FMA3_AVX2 is incompatible with current compiler flags"
0170 #endif
0171
0172 #define XSIMD_WITH_FMA3_AVX2 0
0173 #endif
0174
0175 #else
0176
0177 #if XSIMD_WITH_FMA3_AVX
0178 #error "Manually set XSIMD_WITH_FMA3_AVX is incompatible with current compiler flags"
0179 #endif
0180
0181 #if XSIMD_WITH_FMA3_AVX2
0182 #error "Manually set XSIMD_WITH_FMA3_AVX2 is incompatible with current compiler flags"
0183 #endif
0184
0185 #define XSIMD_WITH_FMA3_AVX 0
0186 #define XSIMD_WITH_FMA3_AVX2 0
0187
0188 #endif
0189
0190
0191
0192
0193
0194
0195 #ifdef __FMA4__
0196 #define XSIMD_WITH_FMA4 1
0197 #else
0198 #define XSIMD_WITH_FMA4 0
0199 #endif
0200
0201
0202
0203
0204
0205
0206 #ifdef __AVX512F__
0207
0208
0209
0210 #if defined(__clang__) && __clang_major__ >= 6
0211 #define XSIMD_WITH_AVX512F 1
0212 #elif defined(__GNUC__) && __GNUC__ < 6
0213 #define XSIMD_WITH_AVX512F 0
0214 #else
0215 #define XSIMD_WITH_AVX512F 1
0216 #if __GNUC__ == 6
0217 #define XSIMD_AVX512_SHIFT_INTRINSICS_IMM_ONLY 1
0218 #endif
0219 #endif
0220 #else
0221 #define XSIMD_WITH_AVX512F 0
0222 #endif
0223
0224
0225
0226
0227
0228
0229 #ifdef __AVX512CD__
0230
0231 #define XSIMD_WITH_AVX512CD XSIMD_WITH_AVX512F
0232 #else
0233 #define XSIMD_WITH_AVX512CD 0
0234 #endif
0235
0236
0237
0238
0239
0240
0241 #ifdef __AVX512DQ__
0242 #define XSIMD_WITH_AVX512DQ XSIMD_WITH_AVX512F
0243 #else
0244 #define XSIMD_WITH_AVX512DQ 0
0245 #endif
0246
0247
0248
0249
0250
0251
0252 #ifdef __AVX512BW__
0253 #define XSIMD_WITH_AVX512BW XSIMD_WITH_AVX512F
0254 #else
0255 #define XSIMD_WITH_AVX512BW 0
0256 #endif
0257
0258
0259
0260
0261
0262
0263 #ifdef __AVX512ER__
0264 #define XSIMD_WITH_AVX512ER XSIMD_WITH_AVX512F
0265 #else
0266 #define XSIMD_WITH_AVX512ER 0
0267 #endif
0268
0269
0270
0271
0272
0273
0274 #ifdef __AVX512PF__
0275 #define XSIMD_WITH_AVX512PF XSIMD_WITH_AVX512F
0276 #else
0277 #define XSIMD_WITH_AVX512PF 0
0278 #endif
0279
0280
0281
0282
0283
0284
0285 #ifdef __AVX512IFMA__
0286 #define XSIMD_WITH_AVX512IFMA XSIMD_WITH_AVX512F
0287 #else
0288 #define XSIMD_WITH_AVX512IFMA 0
0289 #endif
0290
0291
0292
0293
0294
0295
0296 #ifdef __AVX512VBMI__
0297 #define XSIMD_WITH_AVX512VBMI XSIMD_WITH_AVX512F
0298 #else
0299 #define XSIMD_WITH_AVX512VBMI 0
0300 #endif
0301
0302
0303
0304
0305
0306
0307 #ifdef __AVX512VNNI__
0308
0309 #if XSIMD_WITH_AVX512VBMI
0310 #define XSIMD_WITH_AVX512VNNI_AVX512VBMI XSIMD_WITH_AVX512F
0311 #define XSIMD_WITH_AVX512VNNI_AVX512BW XSIMD_WITH_AVX512F
0312 #else
0313 #define XSIMD_WITH_AVX512VNNI_AVX512VBMI 0
0314 #define XSIMD_WITH_AVX512VNNI_AVX512BW XSIMD_WITH_AVX512F
0315 #endif
0316
0317 #else
0318
0319 #define XSIMD_WITH_AVX512VNNI_AVX512VBMI 0
0320 #define XSIMD_WITH_AVX512VNNI_AVX512BW 0
0321
0322 #endif
0323
0324 #ifdef __ARM_NEON
0325
0326
0327
0328
0329
0330
0331 #if __ARM_ARCH >= 7
0332 #define XSIMD_WITH_NEON 1
0333 #else
0334 #define XSIMD_WITH_NEON 0
0335 #endif
0336
0337
0338
0339
0340
0341
0342 #ifdef __aarch64__
0343 #define XSIMD_WITH_NEON64 1
0344 #else
0345 #define XSIMD_WITH_NEON64 0
0346 #endif
0347 #else
0348 #define XSIMD_WITH_NEON 0
0349 #define XSIMD_WITH_NEON64 0
0350 #endif
0351
0352
0353
0354
0355
0356
0357 #if defined(__ARM_FEATURE_MATMUL_INT8)
0358 #define XSIMD_WITH_I8MM_NEON64 1
0359 #else
0360 #define XSIMD_WITH_I8MM_NEON64 0
0361 #endif
0362
0363
0364
0365
0366
0367
0368 #if defined(__ARM_FEATURE_SVE) && defined(__ARM_FEATURE_SVE_BITS) && __ARM_FEATURE_SVE_BITS > 0
0369 #define XSIMD_WITH_SVE 1
0370 #define XSIMD_SVE_BITS __ARM_FEATURE_SVE_BITS
0371 #else
0372 #define XSIMD_WITH_SVE 0
0373 #define XSIMD_SVE_BITS 0
0374 #endif
0375
0376
0377
0378
0379
0380
0381 #if defined(__riscv_vector) && defined(__riscv_v_fixed_vlen) && __riscv_v_fixed_vlen > 0
0382 #define XSIMD_WITH_RVV 1
0383 #define XSIMD_RVV_BITS __riscv_v_fixed_vlen
0384 #else
0385 #define XSIMD_WITH_RVV 0
0386 #define XSIMD_RVV_BITS 0
0387 #endif
0388
0389
0390
0391
0392
0393
0394 #ifdef __EMSCRIPTEN__
0395 #define XSIMD_WITH_WASM 1
0396 #else
0397 #define XSIMD_WITH_WASM 0
0398 #endif
0399
0400
0401 #ifdef _MSC_VER
0402
0403 #if XSIMD_WITH_AVX512
0404
0405 #undef XSIMD_WITH_AVX2
0406 #define XSIMD_WITH_AVX2 1
0407
0408 #endif
0409
0410 #if XSIMD_WITH_AVX2
0411
0412 #undef XSIMD_WITH_AVX
0413 #define XSIMD_WITH_AVX 1
0414
0415 #undef XSIMD_WITH_FMA3_AVX
0416 #define XSIMD_WITH_FMA3_AVX 1
0417
0418 #undef XSIMD_WITH_FMA3_AVX2
0419 #define XSIMD_WITH_FMA3_AVX2 1
0420
0421 #endif
0422
0423 #if XSIMD_WITH_AVX
0424
0425 #undef XSIMD_WITH_SSE4_2
0426 #define XSIMD_WITH_SSE4_2 1
0427
0428 #endif
0429
0430 #if XSIMD_WITH_SSE4_2
0431
0432 #undef XSIMD_WITH_SSE4_1
0433 #define XSIMD_WITH_SSE4_1 1
0434
0435 #endif
0436
0437 #if XSIMD_WITH_SSE4_1
0438
0439 #undef XSIMD_WITH_SSSE3
0440 #define XSIMD_WITH_SSSE3 1
0441
0442 #endif
0443
0444 #if XSIMD_WITH_SSSE3
0445
0446 #undef XSIMD_WITH_SSE3
0447 #define XSIMD_WITH_SSE3 1
0448
0449 #endif
0450
0451 #if XSIMD_WITH_SSE3 || defined(_M_AMD64) || defined(_M_X64) || (defined(_M_IX86_FP) && _M_IX86_FP >= 2)
0452 #undef XSIMD_WITH_SSE2
0453 #define XSIMD_WITH_SSE2 1
0454 #endif
0455
0456 #endif
0457
0458 #if !XSIMD_WITH_SSE2 && !XSIMD_WITH_SSE3 && !XSIMD_WITH_SSSE3 && !XSIMD_WITH_SSE4_1 && !XSIMD_WITH_SSE4_2 && !XSIMD_WITH_AVX && !XSIMD_WITH_AVX2 && !XSIMD_WITH_AVXVNNI && !XSIMD_WITH_FMA3_SSE && !XSIMD_WITH_FMA4 && !XSIMD_WITH_FMA3_AVX && !XSIMD_WITH_FMA3_AVX2 && !XSIMD_WITH_AVX512F && !XSIMD_WITH_AVX512CD && !XSIMD_WITH_AVX512DQ && !XSIMD_WITH_AVX512BW && !XSIMD_WITH_AVX512ER && !XSIMD_WITH_AVX512PF && !XSIMD_WITH_AVX512IFMA && !XSIMD_WITH_AVX512VBMI && !XSIMD_WITH_NEON && !XSIMD_WITH_NEON64 && !XSIMD_WITH_SVE && !XSIMD_WITH_RVV && !XSIMD_WITH_WASM
0459 #define XSIMD_NO_SUPPORTED_ARCHITECTURE
0460 #endif
0461
0462 #endif