valgrind/vki/vki-linux-drm.h

0001 /*
0002  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
0003  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
0004  * Copyright (c) 2003-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
0005  * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
0006  * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
0007  * Copyright (c) 2007-2008 Intel Corporation
0008  * Copyright (c) 2008 Red Hat Inc.
0009  * All rights reserved.
0010  *
0011  * Permission is hereby granted, free of charge, to any person obtaining a
0012  * copy of this software and associated documentation files (the "Software"),
0013  * to deal in the Software without restriction, including without limitation
0014  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0015  * and/or sell copies of the Software, and to permit persons to whom the
0016  * Software is furnished to do so, subject to the following conditions:
0017  *
0018  * The above copyright notice and this permission notice (including the next
0019  * paragraph) shall be included in all copies or substantial portions of the
0020  * Software.
0021  *
0022  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0023  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0024  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0025  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
0026  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0027  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0028  * OTHER DEALINGS IN THE SOFTWARE.
0029  */
0030
0031 #ifndef __VKI_LINUX_DRM_H
0032 #define __VKI_LINUX_DRM_H
0033
0034 //----------------------------------------------------------------------
0035 // From include/drm/drm.h
0036 //----------------------------------------------------------------------
0037
0038 typedef unsigned int vki_drm_context_t;
0039 typedef unsigned int vki_drm_drawable_t;
0040 typedef unsigned int vki_drm_magic_t;
0041
0042 struct vki_drm_clip_rect {
0043     unsigned short x1;
0044     unsigned short y1;
0045     unsigned short x2;
0046     unsigned short y2;
0047 };
0048 struct vki_drm_version {
0049     int version_major;    /**< Major version */
0050     int version_minor;    /**< Minor version */
0051     int version_patchlevel;   /**< Patch level */
0052     vki_size_t name_len;      /**< Length of name buffer */
0053     char __user *name;    /**< Name of driver */
0054     vki_size_t date_len;      /**< Length of date buffer */
0055     char __user *date;    /**< User-space buffer to hold date */
0056     vki_size_t desc_len;      /**< Length of desc buffer */
0057     char __user *desc;    /**< User-space buffer to hold desc */
0058 };
0059 struct vki_drm_unique {
0060     vki_size_t unique_len;    /**< Length of unique */
0061     char __user *unique;      /**< Unique name for driver instantiation */
0062 };
0063 struct vki_drm_block {
0064     int unused;
0065 };
0066 struct vki_drm_control {
0067     enum {
0068         VKI_DRM_ADD_COMMAND,
0069         VKI_DRM_RM_COMMAND,
0070         VKI_DRM_INST_HANDLER,
0071         VKI_DRM_UNINST_HANDLER
0072     } func;
0073     int irq;
0074 };
0075
0076 enum vki_drm_map_type {
0077     _VKI_DRM_FRAME_BUFFER = 0,    /**< WC (no caching), no core dump */
0078     _VKI_DRM_REGISTERS = 1,   /**< no caching, no core dump */
0079     _VKI_DRM_SHM = 2,         /**< shared, cached */
0080     _VKI_DRM_AGP = 3,         /**< AGP/GART */
0081     _VKI_DRM_SCATTER_GATHER = 4,  /**< Scatter/gather memory for PCI DMA */
0082     _VKI_DRM_CONSISTENT = 5,      /**< Consistent memory for PCI DMA */
0083     _VKI_DRM_GEM = 6,         /**< GEM object */
0084 };
0085 enum vki_drm_map_flags {
0086     _VKI_DRM_RESTRICTED = 0x01,      /**< Cannot be mapped to user-virtual */
0087     _VKI_DRM_READ_ONLY = 0x02,
0088     _VKI_DRM_LOCKED = 0x04,      /**< shared, cached, locked */
0089     _VKI_DRM_KERNEL = 0x08,      /**< kernel requires access */
0090     _VKI_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
0091     _VKI_DRM_CONTAINS_LOCK = 0x20,   /**< SHM page that contains lock */
0092     _VKI_DRM_REMOVABLE = 0x40,       /**< Removable mapping */
0093     _VKI_DRM_DRIVER = 0x80       /**< Managed by driver */
0094 };
0095 struct vki_drm_ctx_priv_map {
0096     unsigned int ctx_id;     /**< Context requesting private mapping */
0097     void *handle;        /**< Handle of map */
0098 };
0099 struct vki_drm_map {
0100     unsigned long offset;    /**< Requested physical address (0 for SAREA)*/
0101     unsigned long size;  /**< Requested physical size (bytes) */
0102     enum vki_drm_map_type type;  /**< Type of memory to map */
0103     enum vki_drm_map_flags flags;    /**< Flags */
0104     void *handle;        /**< User-space: "Handle" to pass to mmap() */
0105                  /**< Kernel-space: kernel-virtual address */
0106     int mtrr;        /**< MTRR slot used */
0107     /*   Private data */
0108 };
0109 struct vki_drm_client {
0110     int idx;        /**< Which client desired? */
0111     int auth;       /**< Is client authenticated? */
0112     unsigned long pid;  /**< Process ID */
0113     unsigned long uid;  /**< User ID */
0114     unsigned long magic;    /**< Magic */
0115     unsigned long iocs; /**< Ioctl count */
0116 };
0117 enum vki_drm_stat_type {
0118     _VKI_DRM_STAT_LOCK,
0119     _VKI_DRM_STAT_OPENS,
0120     _VKI_DRM_STAT_CLOSES,
0121     _VKI_DRM_STAT_IOCTLS,
0122     _VKI_DRM_STAT_LOCKS,
0123     _VKI_DRM_STAT_UNLOCKS,
0124     _VKI_DRM_STAT_VALUE,    /**< Generic value */
0125     _VKI_DRM_STAT_BYTE,     /**< Generic byte counter (1024bytes/K) */
0126     _VKI_DRM_STAT_COUNT,    /**< Generic non-byte counter (1000/k) */
0127
0128     _VKI_DRM_STAT_IRQ,      /**< IRQ */
0129     _VKI_DRM_STAT_PRIMARY,  /**< Primary DMA bytes */
0130     _VKI_DRM_STAT_SECONDARY,    /**< Secondary DMA bytes */
0131     _VKI_DRM_STAT_DMA,      /**< DMA */
0132     _VKI_DRM_STAT_SPECIAL,  /**< Special DMA (e.g., priority or polled) */
0133     _VKI_DRM_STAT_MISSED    /**< Missed DMA opportunity */
0134         /* Add to the *END* of the list */
0135 };
0136 struct vki_drm_stats {
0137     unsigned long count;
0138     struct {
0139         unsigned long value;
0140         enum vki_drm_stat_type type;
0141     } data[15];
0142 };
0143 enum vki_drm_lock_flags {
0144     _VKI_DRM_LOCK_READY = 0x01,      /**< Wait until hardware is ready for DMA */
0145     _VKI_DRM_LOCK_QUIESCENT = 0x02,  /**< Wait until hardware quiescent */
0146     _VKI_DRM_LOCK_FLUSH = 0x04,      /**< Flush this context's DMA queue first */
0147     _VKI_DRM_LOCK_FLUSH_ALL = 0x08,  /**< Flush all DMA queues first */
0148     /* These *HALT* flags aren't supported yet
0149        -- they will be used to support the
0150        full-screen DGA-like mode. */
0151     _VKI_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
0152     _VKI_DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
0153 };
0154 struct vki_drm_lock {
0155     int context;
0156     enum vki_drm_lock_flags flags;
0157 };
0158 enum vki_drm_dma_flags {
0159     /* Flags for DMA buffer dispatch */
0160     _VKI_DRM_DMA_BLOCK = 0x01,        /**<
0161                        * Block until buffer dispatched.
0162                        *
0163                        * \note The buffer may not yet have
0164                        * been processed by the hardware --
0165                        * getting a hardware lock with the
0166                        * hardware quiescent will ensure
0167                        * that the buffer has been
0168                        * processed.
0169                        */
0170     _VKI_DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
0171     _VKI_DRM_DMA_PRIORITY = 0x04,     /**< High priority dispatch */
0172
0173     /* Flags for DMA buffer request */
0174     _VKI_DRM_DMA_WAIT = 0x10,         /**< Wait for free buffers */
0175     _VKI_DRM_DMA_SMALLER_OK = 0x20,   /**< Smaller-than-requested buffers OK */
0176     _VKI_DRM_DMA_LARGER_OK = 0x40     /**< Larger-than-requested buffers OK */
0177 };
0178 struct vki_drm_buf_desc {
0179     int count;       /**< Number of buffers of this size */
0180     int size;        /**< Size in bytes */
0181     int low_mark;        /**< Low water mark */
0182     int high_mark;       /**< High water mark */
0183     enum {
0184         _VKI_DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
0185         _VKI_DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
0186         _VKI_DRM_SG_BUFFER = 0x04,  /**< Scatter/gather memory buffer */
0187         _VKI_DRM_FB_BUFFER = 0x08,  /**< Buffer is in frame buffer */
0188         _VKI_DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
0189     } flags;
0190     unsigned long agp_start; /**<
0191                   * Start address of where the AGP buffers are
0192                   * in the AGP aperture
0193                   */
0194 };
0195 struct vki_drm_buf_info {
0196     int count;      /**< Entries in list */
0197     struct vki_drm_buf_desc __user *list;
0198 };
0199 struct vki_drm_buf_free {
0200     int count;
0201     int __user *list;
0202 };
0203
0204 struct vki_drm_buf_pub {
0205     int idx;               /**< Index into the master buffer list */
0206     int total;             /**< Buffer size */
0207     int used;              /**< Amount of buffer in use (for DMA) */
0208     void __user *address;          /**< Address of buffer */
0209 };
0210 struct vki_drm_buf_map {
0211     int count;      /**< Length of the buffer list */
0212     void __user *virtuaL;       /**< Mmap'd area in user-virtual */
0213     struct vki_drm_buf_pub __user *list;    /**< Buffer information */
0214 };
0215 struct vki_drm_dma {
0216     int context;              /**< Context handle */
0217     int send_count;           /**< Number of buffers to send */
0218     int __user *send_indices;     /**< List of handles to buffers */
0219     int __user *send_sizes;       /**< Lengths of data to send */
0220     enum vki_drm_dma_flags flags;     /**< Flags */
0221     int request_count;        /**< Number of buffers requested */
0222     int request_size;         /**< Desired size for buffers */
0223     int __user *request_indices;      /**< Buffer information */
0224     int __user *request_sizes;
0225     int granted_count;        /**< Number of buffers granted */
0226 };
0227
0228 enum vki_drm_ctx_flags {
0229     _VKI_DRM_CONTEXT_PRESERVED = 0x01,
0230     _VKI_DRM_CONTEXT_2DONLY = 0x02
0231 };
0232 struct vki_drm_ctx {
0233     vki_drm_context_t handle;
0234     enum vki_drm_ctx_flags flags;
0235 };
0236 struct vki_drm_ctx_res {
0237     int count;
0238     struct vki_drm_ctx __user *contexts;
0239 };
0240 struct vki_drm_draw {
0241     vki_drm_drawable_t handle;
0242 };
0243 typedef enum {
0244     VKI_DRM_DRAWABLE_CLIPRECTS,
0245 } vki_drm_drawable_info_type_t;
0246 struct vki_drm_update_draw {
0247     vki_drm_drawable_t handle;
0248     unsigned int type;
0249     unsigned int num;
0250     unsigned long long data;
0251 };
0252 struct vki_drm_auth {
0253     vki_drm_magic_t magic;
0254 };
0255 struct vki_drm_irq_busid {
0256     int irq;    /**< IRQ number */
0257     int busnum; /**< bus number */
0258     int devnum; /**< device number */
0259     int funcnum;    /**< function number */
0260 };
0261 enum vki_drm_vblank_seq_type {
0262     _VKI_DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
0263     _VKI_DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
0264     _VKI_DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
0265     _VKI_DRM_VBLANK_EVENT = 0x4000000,   /**< Send event instead of blocking */
0266     _VKI_DRM_VBLANK_FLIP = 0x8000000,   /**< Scheduled buffer swap should flip */
0267     _VKI_DRM_VBLANK_NEXTONMISS = 0x10000000,    /**< If missed, wait for next vblank */
0268     _VKI_DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
0269     _VKI_DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
0270 };
0271 struct vki_drm_wait_vblank_request {
0272     enum vki_drm_vblank_seq_type type;
0273     unsigned int sequence;
0274     unsigned long signal;
0275 };
0276 struct vki_drm_wait_vblank_reply {
0277     enum vki_drm_vblank_seq_type type;
0278     unsigned int sequence;
0279     long tval_sec;
0280     long tval_usec;
0281 };
0282 union vki_drm_wait_vblank {
0283     struct vki_drm_wait_vblank_request request;
0284     struct vki_drm_wait_vblank_reply reply;
0285 };
0286 struct vki_drm_modeset_ctl {
0287     __vki_u32 crtc;
0288     __vki_u32 cmd;
0289 };
0290 struct vki_drm_agp_mode {
0291     unsigned long mode; /**< AGP mode */
0292 };
0293 struct vki_drm_agp_buffer {
0294     unsigned long size; /**< In bytes -- will round to page boundary */
0295     unsigned long handle;   /**< Used for binding / unbinding */
0296     unsigned long type; /**< Type of memory to allocate */
0297     unsigned long physical; /**< Physical used by i810 */
0298 };
0299 struct vki_drm_agp_binding {
0300     unsigned long handle;   /**< From drm_agp_buffer */
0301     unsigned long offset;   /**< In bytes -- will round to page boundary */
0302 };
0303 struct vki_drm_agp_info {
0304     int agp_version_major;
0305     int agp_version_minor;
0306     unsigned long mode;
0307     unsigned long aperture_base;    /* physical address */
0308     unsigned long aperture_size;    /* bytes */
0309     unsigned long memory_allowed;   /* bytes */
0310     unsigned long memory_used;
0311     unsigned short id_vendor;
0312     unsigned short id_device;
0313 };
0314 struct vki_drm_scatter_gather {
0315     unsigned long size; /**< In bytes -- will round to page boundary */
0316     unsigned long handle;   /**< Used for mapping / unmapping */
0317 };
0318
0319 struct vki_drm_set_version {
0320     int drm_di_major;
0321     int drm_di_minor;
0322     int drm_dd_major;
0323     int drm_dd_minor;
0324 };
0325 struct vki_drm_gem_close {
0326     __vki_u32 handle;
0327     __vki_u32 pad;
0328 };
0329 struct vki_drm_gem_flink {
0330     __vki_u32 handle;
0331     __vki_u32 name;
0332 };
0333 struct vki_drm_gem_open {
0334     __vki_u32 name;
0335     __vki_u32 handle;
0336     __vki_u64 size;
0337 };
0338
0339 //----------------------------------------------------------------------
0340 // From include/drm/drm_mode.h
0341 //----------------------------------------------------------------------
0342
0343 #define VKI_DRM_DISPLAY_MODE_LEN 32
0344 #define VKI_DRM_PROP_NAME_LEN 32
0345 struct vki_drm_mode_modeinfo {
0346     __vki_u32 clock;
0347     __vki_u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
0348     __vki_u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
0349
0350     __vki_u32 vrefresh; /* vertical refresh * 1000 */
0351
0352     __vki_u32 flags;
0353     __vki_u32 type;
0354     char name[VKI_DRM_DISPLAY_MODE_LEN];
0355 };
0356 struct vki_drm_mode_card_res {
0357     __vki_u64 fb_id_ptr;
0358     __vki_u64 crtc_id_ptr;
0359     __vki_u64 connector_id_ptr;
0360     __vki_u64 encoder_id_ptr;
0361     __vki_u32 count_fbs;
0362     __vki_u32 count_crtcs;
0363     __vki_u32 count_connectors;
0364     __vki_u32 count_encoders;
0365     __vki_u32 min_width, max_width;
0366     __vki_u32 min_height, max_height;
0367 };
0368 struct vki_drm_mode_crtc {
0369     __vki_u64 set_connectors_ptr;
0370     __vki_u32 count_connectors;
0371
0372     __vki_u32 crtc_id; /**< Id */
0373     __vki_u32 fb_id; /**< Id of framebuffer */
0374
0375     __vki_u32 x, y; /**< Position on the frameuffer */
0376
0377     __vki_u32 gamma_size;
0378     __vki_u32 mode_valid;
0379     struct vki_drm_mode_modeinfo mode;
0380 };
0381 struct vki_drm_mode_get_encoder {
0382     __vki_u32 encoder_id;
0383     __vki_u32 encoder_type;
0384
0385     __vki_u32 crtc_id; /**< Id of crtc */
0386
0387     __vki_u32 possible_crtcs;
0388     __vki_u32 possible_clones;
0389 };
0390 struct vki_drm_mode_get_property {
0391     __vki_u64 values_ptr; /* values and blob lengths */
0392     __vki_u64 enum_blob_ptr; /* enum and blob id ptrs */
0393
0394     __vki_u32 prop_id;
0395     __vki_u32 flags;
0396     char name[VKI_DRM_PROP_NAME_LEN];
0397
0398     __vki_u32 count_values;
0399     __vki_u32 count_enum_blobs;
0400 };
0401 struct vki_drm_mode_connector_set_property {
0402     __vki_u64 value;
0403     __vki_u32 prop_id;
0404     __vki_u32 connector_id;
0405 };
0406 struct vki_drm_mode_get_blob {
0407     __vki_u32 blob_id;
0408     __vki_u32 length;
0409     __vki_u64 data;
0410 };
0411 struct vki_drm_mode_fb_cmd {
0412     __vki_u32 fb_id;
0413     __vki_u32 width, height;
0414     __vki_u32 pitch;
0415     __vki_u32 bpp;
0416     __vki_u32 depth;
0417     /* driver specific handle */
0418     __vki_u32 handle;
0419 };
0420 struct vki_drm_mode_mode_cmd {
0421     __vki_u32 connector_id;
0422     struct vki_drm_mode_modeinfo mode;
0423 };
0424 struct vki_drm_mode_cursor {
0425     __vki_u32 flags;
0426     __vki_u32 crtc_id;
0427     __vki_s32 x;
0428     __vki_s32 y;
0429     __vki_u32 width;
0430     __vki_u32 height;
0431     /* driver specific handle */
0432     __vki_u32 handle;
0433 };
0434 struct vki_drm_mode_crtc_lut {
0435     __vki_u32 crtc_id;
0436     __vki_u32 gamma_size;
0437
0438     /* pointers to arrays */
0439     __vki_u64 red;
0440     __vki_u64 green;
0441     __vki_u64 blue;
0442 };
0443
0444 //----------------------------------------------------------------------
0445 // From include/drm/drm.h
0446 //----------------------------------------------------------------------
0447
0448 #define VKI_DRM_IOCTL_BASE      'd'
0449
0450 #define VKI_DRM_IO(nr)          _VKI_IO(VKI_DRM_IOCTL_BASE,nr)
0451 #define VKI_DRM_IOR(nr,type)        _VKI_IOR(VKI_DRM_IOCTL_BASE,nr,type)
0452 #define VKI_DRM_IOW(nr,type)        _VKI_IOW(VKI_DRM_IOCTL_BASE,nr,type)
0453 #define VKI_DRM_IOWR(nr,type)       _VKI_IOWR(VKI_DRM_IOCTL_BASE,nr,type)
0454
0455
0456 #define VKI_DRM_IOCTL_VERSION       VKI_DRM_IOWR(0x00, struct vki_drm_version)
0457 #define VKI_DRM_IOCTL_GET_UNIQUE    VKI_DRM_IOWR(0x01, struct vki_drm_unique)
0458 #define VKI_DRM_IOCTL_GET_MAGIC     VKI_DRM_IOR( 0x02, struct vki_drm_auth)
0459 #define VKI_DRM_IOCTL_IRQ_BUSID     VKI_DRM_IOWR(0x03, struct vki_drm_irq_busid)
0460 #define VKI_DRM_IOCTL_GET_MAP           VKI_DRM_IOWR(0x04, struct vki_drm_map)
0461 #define VKI_DRM_IOCTL_GET_CLIENT        VKI_DRM_IOWR(0x05, struct vki_drm_client)
0462 #define VKI_DRM_IOCTL_GET_STATS         VKI_DRM_IOR( 0x06, struct vki_drm_stats)
0463 #define VKI_DRM_IOCTL_SET_VERSION   VKI_DRM_IOWR(0x07, struct vki_drm_set_version)
0464 #define VKI_DRM_IOCTL_MODESET_CTL       VKI_DRM_IOW(0x08, struct vki_drm_modeset_ctl)
0465 #define VKI_DRM_IOCTL_GEM_CLOSE     VKI_DRM_IOW (0x09, struct vki_drm_gem_close)
0466 #define VKI_DRM_IOCTL_GEM_FLINK     VKI_DRM_IOWR(0x0a, struct vki_drm_gem_flink)
0467 #define VKI_DRM_IOCTL_GEM_OPEN      VKI_DRM_IOWR(0x0b, struct vki_drm_gem_open)
0468
0469 #define VKI_DRM_IOCTL_SET_UNIQUE    VKI_DRM_IOW( 0x10, struct vki_drm_unique)
0470 #define VKI_DRM_IOCTL_AUTH_MAGIC    VKI_DRM_IOW( 0x11, struct vki_drm_auth)
0471 #define VKI_DRM_IOCTL_BLOCK     VKI_DRM_IOWR(0x12, struct vki_drm_block)
0472 #define VKI_DRM_IOCTL_UNBLOCK       VKI_DRM_IOWR(0x13, struct vki_drm_block)
0473 #define VKI_DRM_IOCTL_CONTROL       VKI_DRM_IOW( 0x14, struct vki_drm_control)
0474 #define VKI_DRM_IOCTL_ADD_MAP       VKI_DRM_IOWR(0x15, struct vki_drm_map)
0475 #define VKI_DRM_IOCTL_ADD_BUFS      VKI_DRM_IOWR(0x16, struct vki_drm_buf_desc)
0476 #define VKI_DRM_IOCTL_MARK_BUFS     VKI_DRM_IOW( 0x17, struct vki_drm_buf_desc)
0477 #define VKI_DRM_IOCTL_INFO_BUFS     VKI_DRM_IOWR(0x18, struct vki_drm_buf_info)
0478 #define VKI_DRM_IOCTL_MAP_BUFS      VKI_DRM_IOWR(0x19, struct vki_drm_buf_map)
0479 #define VKI_DRM_IOCTL_FREE_BUFS     VKI_DRM_IOW( 0x1a, struct vki_drm_buf_free)
0480
0481 #define VKI_DRM_IOCTL_RM_MAP        VKI_DRM_IOW( 0x1b, struct vki_drm_map)
0482
0483 #define VKI_DRM_IOCTL_SET_SAREA_CTX VKI_DRM_IOW( 0x1c, struct vki_drm_ctx_priv_map)
0484 #define VKI_DRM_IOCTL_GET_SAREA_CTX     VKI_DRM_IOWR(0x1d, struct vki_drm_ctx_priv_map)
0485
0486 #define VKI_DRM_IOCTL_SET_MASTER        VKI_DRM_IO(0x1e)
0487 #define VKI_DRM_IOCTL_DROP_MASTER       VKI_DRM_IO(0x1f)
0488
0489 #define VKI_DRM_IOCTL_ADD_CTX       VKI_DRM_IOWR(0x20, struct vki_drm_ctx)
0490 #define VKI_DRM_IOCTL_RM_CTX        VKI_DRM_IOWR(0x21, struct vki_drm_ctx)
0491 #define VKI_DRM_IOCTL_MOD_CTX       VKI_DRM_IOW( 0x22, struct vki_drm_ctx)
0492 #define VKI_DRM_IOCTL_GET_CTX       VKI_DRM_IOWR(0x23, struct vki_drm_ctx)
0493 #define VKI_DRM_IOCTL_SWITCH_CTX    VKI_DRM_IOW( 0x24, struct vki_drm_ctx)
0494 #define VKI_DRM_IOCTL_NEW_CTX       VKI_DRM_IOW( 0x25, struct vki_drm_ctx)
0495 #define VKI_DRM_IOCTL_RES_CTX       VKI_DRM_IOWR(0x26, struct vki_drm_ctx_res)
0496 #define VKI_DRM_IOCTL_ADD_DRAW      VKI_DRM_IOWR(0x27, struct vki_drm_draw)
0497 #define VKI_DRM_IOCTL_RM_DRAW       VKI_DRM_IOWR(0x28, struct vki_drm_draw)
0498 #define VKI_DRM_IOCTL_DMA       VKI_DRM_IOWR(0x29, struct vki_drm_dma)
0499 #define VKI_DRM_IOCTL_LOCK      VKI_DRM_IOW( 0x2a, struct vki_drm_lock)
0500 #define VKI_DRM_IOCTL_UNLOCK        VKI_DRM_IOW( 0x2b, struct vki_drm_lock)
0501 #define VKI_DRM_IOCTL_FINISH        VKI_DRM_IOW( 0x2c, struct vki_drm_lock)
0502
0503 #define VKI_DRM_IOCTL_AGP_ACQUIRE   VKI_DRM_IO(  0x30)
0504 #define VKI_DRM_IOCTL_AGP_RELEASE   VKI_DRM_IO(  0x31)
0505 #define VKI_DRM_IOCTL_AGP_ENABLE    VKI_DRM_IOW( 0x32, struct vki_drm_agp_mode)
0506 #define VKI_DRM_IOCTL_AGP_INFO      VKI_DRM_IOR( 0x33, struct vki_drm_agp_info)
0507 #define VKI_DRM_IOCTL_AGP_ALLOC     VKI_DRM_IOWR(0x34, struct vki_drm_agp_buffer)
0508 #define VKI_DRM_IOCTL_AGP_FREE      VKI_DRM_IOW( 0x35, struct vki_drm_agp_buffer)
0509 #define VKI_DRM_IOCTL_AGP_BIND      VKI_DRM_IOW( 0x36, struct vki_drm_agp_binding)
0510 #define VKI_DRM_IOCTL_AGP_UNBIND    VKI_DRM_IOW( 0x37, struct vki_drm_agp_binding)
0511
0512 #define VKI_DRM_IOCTL_SG_ALLOC      VKI_DRM_IOWR(0x38, struct vki_drm_scatter_gather)
0513 #define VKI_DRM_IOCTL_SG_FREE       VKI_DRM_IOW( 0x39, struct vki_drm_scatter_gather)
0514
0515 #define VKI_DRM_IOCTL_WAIT_VBLANK   VKI_DRM_IOWR(0x3a, union vki_drm_wait_vblank)
0516
0517 #define VKI_DRM_IOCTL_UPDATE_DRAW   VKI_DRM_IOW(0x3f, struct vki_drm_update_draw)
0518
0519 #define VKI_DRM_IOCTL_MODE_GETRESOURCES VKI_DRM_IOWR(0xA0, struct vki_drm_mode_card_res)
0520 #define VKI_DRM_IOCTL_MODE_GETCRTC  VKI_DRM_IOWR(0xA1, struct vki_drm_mode_crtc)
0521 #define VKI_DRM_IOCTL_MODE_SETCRTC  VKI_DRM_IOWR(0xA2, struct vki_drm_mode_crtc)
0522 #define VKI_DRM_IOCTL_MODE_CURSOR   VKI_DRM_IOWR(0xA3, struct vki_drm_mode_cursor)
0523 #define VKI_DRM_IOCTL_MODE_GETGAMMA VKI_DRM_IOWR(0xA4, struct vki_drm_mode_crtc_lut)
0524 #define VKI_DRM_IOCTL_MODE_SETGAMMA VKI_DRM_IOWR(0xA5, struct vki_drm_mode_crtc_lut)
0525 #define VKI_DRM_IOCTL_MODE_GETENCODER   VKI_DRM_IOWR(0xA6, struct vki_drm_mode_get_encoder)
0526 #define VKI_DRM_IOCTL_MODE_GETCONNECTOR VKI_DRM_IOWR(0xA7, struct vki_drm_mode_get_connector)
0527 #define VKI_DRM_IOCTL_MODE_ATTACHMODE   VKI_DRM_IOWR(0xA8, struct vki_drm_mode_mode_cmd)
0528 #define VKI_DRM_IOCTL_MODE_DETACHMODE   VKI_DRM_IOWR(0xA9, struct vki_drm_mode_mode_cmd)
0529
0530 #define VKI_DRM_IOCTL_MODE_GETPROPERTY  VKI_DRM_IOWR(0xAA, struct vki_drm_mode_get_property)
0531 #define VKI_DRM_IOCTL_MODE_SETPROPERTY  VKI_DRM_IOWR(0xAB, struct vki_drm_mode_connector_set_property)
0532 #define VKI_DRM_IOCTL_MODE_GETPROPBLOB  VKI_DRM_IOWR(0xAC, struct vki_drm_mode_get_blob)
0533 #define VKI_DRM_IOCTL_MODE_GETFB    VKI_DRM_IOWR(0xAD, struct vki_drm_mode_fb_cmd)
0534 #define VKI_DRM_IOCTL_MODE_ADDFB    VKI_DRM_IOWR(0xAE, struct vki_drm_mode_fb_cmd)
0535 #define VKI_DRM_IOCTL_MODE_RMFB     VKI_DRM_IOWR(0xAF, unsigned int)
0536
0537 #define VKI_DRM_COMMAND_BASE            0x40
0538 #define VKI_DRM_COMMAND_END     0xA0
0539
0540 //----------------------------------------------------------------------
0541 // From include/drm/i915_drm.h
0542 //----------------------------------------------------------------------
0543
0544 typedef struct _vki_drm_i915_init {
0545     enum {
0546         VKI_I915_INIT_DMA = 0x01,
0547         VKI_I915_CLEANUP_DMA = 0x02,
0548         VKI_I915_RESUME_DMA = 0x03
0549     } func;
0550     unsigned int mmio_offset;
0551     int sarea_priv_offset;
0552     unsigned int ring_start;
0553     unsigned int ring_end;
0554     unsigned int ring_size;
0555     unsigned int front_offset;
0556     unsigned int back_offset;
0557     unsigned int depth_offset;
0558     unsigned int w;
0559     unsigned int h;
0560     unsigned int pitch;
0561     unsigned int pitch_bits;
0562     unsigned int back_pitch;
0563     unsigned int depth_pitch;
0564     unsigned int cpp;
0565     unsigned int chipset;
0566 } vki_drm_i915_init_t;
0567
0568 #define VKI_DRM_I915_INIT           0x00
0569 #define VKI_DRM_I915_FLUSH          0x01
0570 #define VKI_DRM_I915_FLIP           0x02
0571 #define VKI_DRM_I915_BATCHBUFFER        0x03
0572 #define VKI_DRM_I915_IRQ_EMIT           0x04
0573 #define VKI_DRM_I915_IRQ_WAIT           0x05
0574 #define VKI_DRM_I915_GETPARAM           0x06
0575 #define VKI_DRM_I915_SETPARAM           0x07
0576 #define VKI_DRM_I915_ALLOC          0x08
0577 #define VKI_DRM_I915_FREE           0x09
0578 #define VKI_DRM_I915_INIT_HEAP          0x0a
0579 #define VKI_DRM_I915_CMDBUFFER          0x0b
0580 #define VKI_DRM_I915_DESTROY_HEAP       0x0c
0581 #define VKI_DRM_I915_SET_VBLANK_PIPE        0x0d
0582 #define VKI_DRM_I915_GET_VBLANK_PIPE        0x0e
0583 #define VKI_DRM_I915_VBLANK_SWAP        0x0f
0584 #define VKI_DRM_I915_HWS_ADDR           0x11
0585 #define VKI_DRM_I915_GEM_INIT           0x13
0586 #define VKI_DRM_I915_GEM_EXECBUFFER     0x14
0587 #define VKI_DRM_I915_GEM_PIN            0x15
0588 #define VKI_DRM_I915_GEM_UNPIN          0x16
0589 #define VKI_DRM_I915_GEM_BUSY           0x17
0590 #define VKI_DRM_I915_GEM_THROTTLE       0x18
0591 #define VKI_DRM_I915_GEM_ENTERVT        0x19
0592 #define VKI_DRM_I915_GEM_LEAVEVT        0x1a
0593 #define VKI_DRM_I915_GEM_CREATE         0x1b
0594 #define VKI_DRM_I915_GEM_PREAD          0x1c
0595 #define VKI_DRM_I915_GEM_PWRITE         0x1d
0596 #define VKI_DRM_I915_GEM_MMAP           0x1e
0597 #define VKI_DRM_I915_GEM_SET_DOMAIN     0x1f
0598 #define VKI_DRM_I915_GEM_SW_FINISH      0x20
0599 #define VKI_DRM_I915_GEM_SET_TILING     0x21
0600 #define VKI_DRM_I915_GEM_GET_TILING     0x22
0601 #define VKI_DRM_I915_GEM_GET_APERTURE       0x23
0602 #define VKI_DRM_I915_GEM_MMAP_GTT       0x24
0603 #define VKI_DRM_I915_GET_PIPE_FROM_CRTC_ID  0x25
0604 #define VKI_DRM_I915_GEM_MADVISE        0x26
0605 #define VKI_DRM_I915_OVERLAY_PUT_IMAGE      0x27
0606 #define VKI_DRM_I915_OVERLAY_ATTRS      0x28
0607 #define VKI_DRM_I915_GEM_EXECBUFFER2        0x29
0608
0609 #define VKI_DRM_IOCTL_I915_INIT             VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_INIT, vki_drm_i915_init_t)
0610 #define VKI_DRM_IOCTL_I915_FLUSH            VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FLUSH)
0611 #define VKI_DRM_IOCTL_I915_FLIP             VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FLIP)
0612 #define VKI_DRM_IOCTL_I915_BATCHBUFFER          VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_BATCHBUFFER, vki_drm_i915_batchbuffer_t)
0613 #define VKI_DRM_IOCTL_I915_IRQ_EMIT         VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_IRQ_EMIT, vki_drm_i915_irq_emit_t)
0614 #define VKI_DRM_IOCTL_I915_IRQ_WAIT         VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_IRQ_WAIT, vki_drm_i915_irq_wait_t)
0615 #define VKI_DRM_IOCTL_I915_GETPARAM         VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GETPARAM, vki_drm_i915_getparam_t)
0616 #define VKI_DRM_IOCTL_I915_SETPARAM         VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_SETPARAM, vki_drm_i915_setparam_t)
0617 #define VKI_DRM_IOCTL_I915_ALLOC            VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_ALLOC, vki_drm_i915_mem_alloc_t)
0618 #define VKI_DRM_IOCTL_I915_FREE             VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_FREE, vki_drm_i915_mem_free_t)
0619 #define VKI_DRM_IOCTL_I915_INIT_HEAP            VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_INIT_HEAP, vki_drm_i915_mem_init_heap_t)
0620 #define VKI_DRM_IOCTL_I915_CMDBUFFER            VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_CMDBUFFER, vki_drm_i915_cmdbuffer_t)
0621 #define VKI_DRM_IOCTL_I915_DESTROY_HEAP         VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_DESTROY_HEAP, vki_drm_i915_mem_destroy_heap_t)
0622 #define VKI_DRM_IOCTL_I915_SET_VBLANK_PIPE      VKI_DRM_IOW( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_SET_VBLANK_PIPE, vki_drm_i915_vblank_pipe_t)
0623 #define VKI_DRM_IOCTL_I915_GET_VBLANK_PIPE      VKI_DRM_IOR( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GET_VBLANK_PIPE, vki_drm_i915_vblank_pipe_t)
0624 #define VKI_DRM_IOCTL_I915_VBLANK_SWAP          VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_VBLANK_SWAP, vki_drm_i915_vblank_swap_t)
0625 #define VKI_DRM_IOCTL_I915_GEM_INIT         VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_INIT, struct vki_drm_i915_gem_init)
0626 #define VKI_DRM_IOCTL_I915_GEM_EXECBUFFER       VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_EXECBUFFER, struct vki_drm_i915_gem_execbuffer)
0627 #define VKI_DRM_IOCTL_I915_GEM_PIN          VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PIN, struct vki_drm_i915_gem_pin)
0628 #define VKI_DRM_IOCTL_I915_GEM_UNPIN            VKI_DRM_IOW(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_UNPIN, struct vki_drm_i915_gem_unpin)
0629 #define VKI_DRM_IOCTL_I915_GEM_BUSY         VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_BUSY, struct vki_drm_i915_gem_busy)
0630 #define VKI_DRM_IOCTL_I915_GEM_THROTTLE         VKI_DRM_IO ( VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_THROTTLE)
0631 #define VKI_DRM_IOCTL_I915_GEM_ENTERVT          VKI_DRM_IO(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_ENTERVT)
0632 #define VKI_DRM_IOCTL_I915_GEM_LEAVEVT          VKI_DRM_IO(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_LEAVEVT)
0633 #define VKI_DRM_IOCTL_I915_GEM_CREATE           VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_CREATE, struct vki_drm_i915_gem_create)
0634 #define VKI_DRM_IOCTL_I915_GEM_PREAD            VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PREAD, struct vki_drm_i915_gem_pread)
0635 #define VKI_DRM_IOCTL_I915_GEM_PWRITE           VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_PWRITE, struct vki_drm_i915_gem_pwrite)
0636 #define VKI_DRM_IOCTL_I915_GEM_MMAPv1           VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_MMAP, struct vki_drm_i915_gem_mmap_v1)
0637 #define VKI_DRM_IOCTL_I915_GEM_MMAP         VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_MMAP, struct vki_drm_i915_gem_mmap)
0638 #define VKI_DRM_IOCTL_I915_GEM_MMAP_GTT         VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_MMAP_GTT, struct vki_drm_i915_gem_mmap_gtt)
0639 #define VKI_DRM_IOCTL_I915_GEM_SET_DOMAIN       VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SET_DOMAIN, struct vki_drm_i915_gem_set_domain)
0640 #define VKI_DRM_IOCTL_I915_GEM_SW_FINISH        VKI_DRM_IOW (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SW_FINISH, struct vki_drm_i915_gem_sw_finish)
0641 #define VKI_DRM_IOCTL_I915_GEM_SET_TILING       VKI_DRM_IOWR (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_SET_TILING, struct vki_drm_i915_gem_set_tiling)
0642 #define VKI_DRM_IOCTL_I915_GEM_GET_TILING       VKI_DRM_IOWR (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_GET_TILING, struct vki_drm_i915_gem_get_tiling)
0643 #define VKI_DRM_IOCTL_I915_GEM_GET_APERTURE     VKI_DRM_IOR  (VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GEM_GET_APERTURE, struct vki_drm_i915_gem_get_aperture)
0644 #define VKI_DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID    VKI_DRM_IOWR(VKI_DRM_COMMAND_BASE + VKI_DRM_I915_GET_PIPE_FROM_CRTC_ID, struct vki_drm_intel_get_pipe_from_crtc_id)
0645
0646 typedef struct vki_drm_i915_batchbuffer {
0647     int start;      /* agp offset */
0648     int used;       /* nr bytes in use */
0649     int DR1;        /* hw flags for GFX_OP_DRAWRECT_INFO */
0650     int DR4;        /* window origin for GFX_OP_DRAWRECT_INFO */
0651     int num_cliprects;  /* mulitpass with multiple cliprects? */
0652     struct vki_drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
0653 } vki_drm_i915_batchbuffer_t;
0654 typedef struct _vki_drm_i915_cmdbuffer {
0655     char __user *buf;   /* pointer to userspace command buffer */
0656     int sz;         /* nr bytes in buf */
0657     int DR1;        /* hw flags for GFX_OP_DRAWRECT_INFO */
0658     int DR4;        /* window origin for GFX_OP_DRAWRECT_INFO */
0659     int num_cliprects;  /* mulitpass with multiple cliprects? */
0660     struct vki_drm_clip_rect __user *cliprects; /* pointer to userspace cliprects */
0661 } vki_drm_i915_cmdbuffer_t;
0662 typedef struct vki_drm_i915_irq_emit {
0663     int __user *irq_seq;
0664 } vki_drm_i915_irq_emit_t;
0665 typedef struct vki_drm_i915_irq_wait {
0666     int irq_seq;
0667 } vki_drm_i915_irq_wait_t;
0668 typedef struct vki_drm_i915_getparam {
0669     int param;
0670     int __user *value;
0671 } vki_drm_i915_getparam_t;
0672 typedef struct vki_drm_i915_setparam {
0673     int param;
0674     int value;
0675 } vki_drm_i915_setparam_t;
0676 typedef struct vki_drm_i915_mem_alloc {
0677     int region;
0678     int alignment;
0679     int size;
0680     int __user *region_offset;  /* offset from start of fb or agp */
0681 } vki_drm_i915_mem_alloc_t;
0682 typedef struct vki_drm_i915_mem_free {
0683     int region;
0684     int region_offset;
0685 } vki_drm_i915_mem_free_t;
0686 typedef struct vki_drm_i915_mem_init_heap {
0687     int region;
0688     int size;
0689     int start;
0690 } vki_drm_i915_mem_init_heap_t;
0691 typedef struct vki_drm_i915_mem_destroy_heap {
0692     int region;
0693 } vki_drm_i915_mem_destroy_heap_t;
0694 typedef struct vki_drm_i915_vblank_pipe {
0695     int pipe;
0696 } vki_drm_i915_vblank_pipe_t;
0697 typedef struct vki_drm_i915_vblank_swap {
0698     vki_drm_drawable_t drawable;
0699     enum vki_drm_vblank_seq_type seqtype;
0700     unsigned int sequence;
0701 } vki_drm_i915_vblank_swap_t;
0702 typedef struct vki_drm_i915_hws_addr {
0703     __vki_u64 addr;
0704 } vki_drm_i915_hws_addr_t;
0705 struct vki_drm_i915_gem_init {
0706     __vki_u64 gtt_start;
0707     __vki_u64 gtt_end;
0708 };
0709 struct vki_drm_i915_gem_create {
0710     __vki_u64 size;
0711     __vki_u32 handle;
0712     __vki_u32 pad;
0713 };
0714 struct vki_drm_i915_gem_pread {
0715     __vki_u32 handle;
0716     __vki_u32 pad;
0717     __vki_u64 offset;
0718     __vki_u64 size;
0719     __vki_u64 data_ptr;
0720 };
0721 struct vki_drm_i915_gem_pwrite {
0722     __vki_u32 handle;
0723     __vki_u32 pad;
0724     __vki_u64 offset;
0725     __vki_u64 size;
0726     __vki_u64 data_ptr;
0727 };
0728 struct vki_drm_i915_gem_mmap_v1 {
0729     __vki_u32 handle;
0730     __vki_u32 pad;
0731     __vki_u64 offset;
0732     __vki_u64 size;
0733     __vki_u64 addr_ptr;
0734 };
0735 struct vki_drm_i915_gem_mmap {
0736     __vki_u32 handle;
0737     __vki_u32 pad;
0738     __vki_u64 offset;
0739     __vki_u64 size;
0740     __vki_u64 addr_ptr;
0741     __vki_u64 flags;
0742 };
0743 struct vki_drm_i915_gem_mmap_gtt {
0744     __vki_u32 handle;
0745     __vki_u32 pad;
0746     __vki_u64 offset;
0747 };
0748 struct vki_drm_i915_gem_set_domain {
0749     __vki_u32 handle;
0750     __vki_u32 read_domains;
0751     __vki_u32 write_domain;
0752 };
0753 struct vki_drm_i915_gem_sw_finish {
0754     __vki_u32 handle;
0755 };
0756 struct vki_drm_i915_gem_relocation_entry {
0757     __vki_u32 target_handle;
0758     __vki_u32 delta;
0759     __vki_u64 offset;
0760     __vki_u64 presumed_offset;
0761     __vki_u32 read_domains;
0762     __vki_u32 write_domain;
0763 };
0764 struct vki_drm_i915_gem_exec_object {
0765     __vki_u32 handle;
0766     __vki_u32 relocation_count;
0767     __vki_u64 relocs_ptr;
0768     __vki_u64 alignment;
0769     __vki_u64 offset;
0770 };
0771 struct vki_drm_i915_gem_execbuffer {
0772     __vki_u64 buffers_ptr;
0773     __vki_u32 buffer_count;
0774     __vki_u32 batch_start_offset;
0775     __vki_u32 batch_len;
0776     __vki_u32 DR1;
0777     __vki_u32 DR4;
0778     __vki_u32 num_cliprects;
0779     __vki_u64 cliprects_ptr;
0780 };
0781 struct vki_drm_i915_gem_pin {
0782     __vki_u32 handle;
0783     __vki_u32 pad;
0784     __vki_u64 alignment;
0785     __vki_u64 offset;
0786 };
0787 struct vki_drm_i915_gem_unpin {
0788     __vki_u32 handle;
0789     __vki_u32 pad;
0790 };
0791 struct vki_drm_i915_gem_busy {
0792     __vki_u32 handle;
0793     __vki_u32 busy;
0794 };
0795 struct vki_drm_i915_gem_set_tiling {
0796     __vki_u32 handle;
0797     __vki_u32 tiling_mode;
0798     __vki_u32 stride;
0799     __vki_u32 swizzle_mode;
0800 };
0801 struct vki_drm_i915_gem_get_tiling {
0802     __vki_u32 handle;
0803     __vki_u32 tiling_mode;
0804     __vki_u32 swizzle_mode;
0805 };
0806 struct vki_drm_i915_gem_get_aperture {
0807     __vki_u64 aper_size;
0808     __vki_u64 aper_available_size;
0809 };
0810 struct vki_drm_i915_get_pipe_from_crtc_id {
0811     __vki_u32 crtc_id;
0812     __vki_u32 pipe;
0813 };
0814
0815 #endif //__VKI_LINUX_DRM_H
0816
0817 /*--------------------------------------------------------------------*/
0818 /*--- end                                                          ---*/
0819 /*--------------------------------------------------------------------*/