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0001 
0002 /*---------------------------------------------------------------*/
0003 /*--- begin                             libvex_guest_mips32.h ---*/
0004 /*---------------------------------------------------------------*/
0005 
0006 /*
0007    This file is part of Valgrind, a dynamic binary instrumentation
0008    framework.
0009 
0010    Copyright (C) 2010-2017 RT-RK
0011 
0012    This program is free software; you can redistribute it and/or
0013    modify it under the terms of the GNU General Public License as
0014    published by the Free Software Foundation; either version 2 of the
0015    License, or (at your option) any later version.
0016 
0017    This program is distributed in the hope that it will be useful, but
0018    WITHOUT ANY WARRANTY; without even the implied warranty of
0019    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
0020    General Public License for more details.
0021 
0022    You should have received a copy of the GNU General Public License
0023    along with this program; if not, see <http://www.gnu.org/licenses/>.
0024 
0025    The GNU General Public License is contained in the file COPYING.
0026 */
0027 
0028 #ifndef __LIBVEX_PUB_GUEST_MIPS32_H
0029 #define __LIBVEX_PUB_GUEST_MIPS32_H
0030 
0031 #include "libvex_basictypes.h"
0032 
0033 
0034 /*---------------------------------------------------------------*/
0035 /*--- Vex's representation of the MIPS32 CPU state.           ---*/
0036 /*---------------------------------------------------------------*/
0037 
0038 typedef
0039    struct {
0040       /*    0 */ UInt host_EvC_FAILADDR;
0041       /*    4 */ UInt host_EvC_COUNTER;
0042 
0043       /* CPU Registers */
0044       /*    8 */ UInt guest_r0;   /* Hardwired to 0. */
0045       /*   12 */ UInt guest_r1;   /* Assembler temporary */
0046       /*   16 */ UInt guest_r2;   /* Values for function returns ...*/
0047       /*   20 */ UInt guest_r3;   /* ... and expression evaluation */
0048       /*   24 */ UInt guest_r4;   /* Function arguments */
0049       /*   28 */ UInt guest_r5;
0050       /*   32 */ UInt guest_r6;
0051       /*   36 */ UInt guest_r7;
0052       /*   40 */ UInt guest_r8;   /* Temporaries */
0053       /*   44 */ UInt guest_r9;
0054       /*   48 */ UInt guest_r10;
0055       /*   52 */ UInt guest_r11;
0056       /*   56 */ UInt guest_r12;
0057       /*   60 */ UInt guest_r13;
0058       /*   64 */ UInt guest_r14;
0059       /*   68 */ UInt guest_r15;
0060       /*   72 */ UInt guest_r16;  /* Saved temporaries */
0061       /*   76 */ UInt guest_r17;
0062       /*   80 */ UInt guest_r18;
0063       /*   84 */ UInt guest_r19;
0064       /*   88 */ UInt guest_r20;
0065       /*   92 */ UInt guest_r21;
0066       /*   96 */ UInt guest_r22;
0067       /*  100 */ UInt guest_r23;
0068       /*  104 */ UInt guest_r24;  /* Temporaries */
0069       /*  108 */ UInt guest_r25;
0070       /*  112 */ UInt guest_r26;  /* Reserved for OS kernel */
0071       /*  116 */ UInt guest_r27;
0072       /*  120 */ UInt guest_r28;  /* Global pointer */
0073       /*  124 */ UInt guest_r29;  /* Stack pointer */
0074       /*  128 */ UInt guest_r30;  /* Frame pointer */
0075       /*  132 */ UInt guest_r31;  /* Return address */
0076       /*  136 */ UInt guest_PC;   /* Program counter */
0077       /*  140 */ UInt guest_HI;   /* Multiply and divide reg higher result */
0078       /*  144 */ UInt guest_LO;   /* Multiply and divide reg lower result */
0079       /*  148 */ UInt _padding1;
0080 
0081       /* FPU Registers */
0082       /*  152 */ ULong guest_f0;  /* Floating point general purpose registers */
0083       /*  160 */ ULong guest_f1;
0084       /*  168 */ ULong guest_f2;
0085       /*  176 */ ULong guest_f3;
0086       /*  184 */ ULong guest_f4;
0087       /*  192 */ ULong guest_f5;
0088       /*  200 */ ULong guest_f6;
0089       /*  208 */ ULong guest_f7;
0090       /*  216 */ ULong guest_f8;
0091       /*  224 */ ULong guest_f9;
0092       /*  232 */ ULong guest_f10;
0093       /*  240 */ ULong guest_f11;
0094       /*  248 */ ULong guest_f12;
0095       /*  256 */ ULong guest_f13;
0096       /*  264 */ ULong guest_f14;
0097       /*  272 */ ULong guest_f15;
0098       /*  280 */ ULong guest_f16;
0099       /*  288 */ ULong guest_f17;
0100       /*  296 */ ULong guest_f18;
0101       /*  304 */ ULong guest_f19;
0102       /*  312 */ ULong guest_f20;
0103       /*  320 */ ULong guest_f21;
0104       /*  328 */ ULong guest_f22;
0105       /*  336 */ ULong guest_f23;
0106       /*  344 */ ULong guest_f24;
0107       /*  352 */ ULong guest_f25;
0108       /*  360 */ ULong guest_f26;
0109       /*  368 */ ULong guest_f27;
0110       /*  376 */ ULong guest_f28;
0111       /*  384 */ ULong guest_f29;
0112       /*  392 */ ULong guest_f30;
0113       /*  400 */ ULong guest_f31;
0114 
0115       /*  408 */ UInt guest_FIR;
0116       /*  412 */ UInt guest_FCCR;
0117       /*  416 */ UInt guest_FEXR;
0118       /*  420 */ UInt guest_FENR;
0119       /*  424 */ UInt guest_FCSR;
0120 
0121       /* TLS pointer for the thread. It's read-only in user space.
0122          On Linux it is set in user space by various thread-related
0123          syscalls.
0124          User Local Register.
0125          This register provides read access to the coprocessor 0
0126          UserLocal register, if it is implemented. In some operating
0127          environments, the UserLocal register is a pointer to a
0128          thread-specific storage block.
0129       */
0130       /*  428 */ UInt guest_ULR;
0131 
0132       /* Emulation notes */
0133       /*  432 */ UInt guest_EMNOTE;
0134 
0135       /* For clflush: record start and length of area to invalidate. */
0136       /*  436 */ UInt guest_CMSTART;
0137       /*  440 */ UInt guest_CMLEN;
0138       /*  444 */ UInt guest_NRADDR;
0139 
0140       /*  448 */ UInt guest_COND;
0141 
0142       /* MIPS32 DSP ASE(r2) specific registers. */
0143       /*  452 */ UInt guest_DSPControl;
0144       /*  456 */ ULong guest_ac0;
0145       /*  464 */ ULong guest_ac1;
0146       /*  472 */ ULong guest_ac2;
0147       /*  480 */ ULong guest_ac3;
0148 
0149       /*  488 */ UInt guest_CP0_status;
0150       /*  492 */ UInt guest_CP0_Config5;
0151 
0152       /*  496 */ UInt guest_LLaddr;
0153       /*  500 */ UInt guest_LLdata;
0154 
0155       /* MIPS32 MSA 128-bit vector registers */
0156       /*  504 */ V128 guest_w0;
0157       /*  520 */ V128 guest_w1;
0158       /*  536 */ V128 guest_w2;
0159       /*  552 */ V128 guest_w3;
0160       /*  568 */ V128 guest_w4;
0161       /*  584 */ V128 guest_w5;
0162       /*  600 */ V128 guest_w6;
0163       /*  616 */ V128 guest_w7;
0164       /*  632 */ V128 guest_w8;
0165       /*  648 */ V128 guest_w9;
0166       /*  664 */ V128 guest_w10;
0167       /*  680 */ V128 guest_w11;
0168       /*  696 */ V128 guest_w12;
0169       /*  712 */ V128 guest_w13;
0170       /*  728 */ V128 guest_w14;
0171       /*  744 */ V128 guest_w15;
0172       /*  760 */ V128 guest_w16;
0173       /*  776 */ V128 guest_w17;
0174       /*  792 */ V128 guest_w18;
0175       /*  808 */ V128 guest_w19;
0176       /*  824 */ V128 guest_w20;
0177       /*  840 */ V128 guest_w21;
0178       /*  856 */ V128 guest_w22;
0179       /*  872 */ V128 guest_w23;
0180       /*  888 */ V128 guest_w24;
0181       /*  904 */ V128 guest_w25;
0182       /*  920 */ V128 guest_w26;
0183       /*  936 */ V128 guest_w27;
0184       /*  952 */ V128 guest_w28;
0185       /*  968 */ V128 guest_w29;
0186       /*  984 */ V128 guest_w30;
0187       /*  1000 */ V128 guest_w31;
0188 
0189       /*  1016 */ UInt guest_MSACSR;
0190 
0191       /*  1020 */ UInt _padding3;
0192 
0193       /*  1020 */ ULong guest_LLdata64;
0194       /*  1028 */ ULong _padding4;
0195 } VexGuestMIPS32State;
0196 /*---------------------------------------------------------------*/
0197 /*--- Utility functions for MIPS32 guest stuff.               ---*/
0198 /*---------------------------------------------------------------*/
0199 
0200 /* ALL THE FOLLOWING ARE VISIBLE TO LIBRARY CLIENT. */
0201 
0202 /* Initialise all guest MIPS32 state. */
0203 
0204 extern
0205 void LibVEX_GuestMIPS32_initialise ( /*OUT*/VexGuestMIPS32State* vex_state );
0206 
0207 /* FR bit of CP0_STATUS_FR register */
0208 #define MIPS_CP0_STATUS_FR (1ul << 26)
0209 
0210 /* FRE bit of CP0_Config5 register */
0211 #define MIPS_CONF5_FRE     (1ul << 8)
0212 
0213 #endif /* ndef __LIBVEX_PUB_GUEST_MIPS32_H */
0214 
0215 
0216 /*---------------------------------------------------------------*/
0217 /*---                                   libvex_guest_mips32.h ---*/
0218 /*---------------------------------------------------------------*/