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0001 /************************************************************************** 0002 * 0003 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA 0004 * All Rights Reserved. 0005 * 0006 * Permission is hereby granted, free of charge, to any person obtaining a 0007 * copy of this software and associated documentation files (the 0008 * "Software"), to deal in the Software without restriction, including 0009 * without limitation the rights to use, copy, modify, merge, publish, 0010 * distribute, sub license, and/or sell copies of the Software, and to 0011 * permit persons to whom the Software is furnished to do so, subject to 0012 * the following conditions: 0013 * 0014 * The above copyright notice and this permission notice (including the 0015 * next paragraph) shall be included in all copies or substantial portions 0016 * of the Software. 0017 * 0018 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 0019 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 0020 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 0021 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 0022 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 0023 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 0024 * USE OR OTHER DEALINGS IN THE SOFTWARE. 0025 * 0026 **************************************************************************/ 0027 0028 #ifndef __VMWGFX_DRM_H__ 0029 #define __VMWGFX_DRM_H__ 0030 0031 #include "drm.h" 0032 0033 #if defined(__cplusplus) 0034 extern "C" { 0035 #endif 0036 0037 #define DRM_VMW_MAX_SURFACE_FACES 6 0038 #define DRM_VMW_MAX_MIP_LEVELS 24 0039 0040 0041 #define DRM_VMW_GET_PARAM 0 0042 #define DRM_VMW_ALLOC_DMABUF 1 0043 #define DRM_VMW_UNREF_DMABUF 2 0044 #define DRM_VMW_HANDLE_CLOSE 2 0045 #define DRM_VMW_CURSOR_BYPASS 3 0046 /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/ 0047 #define DRM_VMW_CONTROL_STREAM 4 0048 #define DRM_VMW_CLAIM_STREAM 5 0049 #define DRM_VMW_UNREF_STREAM 6 0050 /* guarded by DRM_VMW_PARAM_3D == 1 */ 0051 #define DRM_VMW_CREATE_CONTEXT 7 0052 #define DRM_VMW_UNREF_CONTEXT 8 0053 #define DRM_VMW_CREATE_SURFACE 9 0054 #define DRM_VMW_UNREF_SURFACE 10 0055 #define DRM_VMW_REF_SURFACE 11 0056 #define DRM_VMW_EXECBUF 12 0057 #define DRM_VMW_GET_3D_CAP 13 0058 #define DRM_VMW_FENCE_WAIT 14 0059 #define DRM_VMW_FENCE_SIGNALED 15 0060 #define DRM_VMW_FENCE_UNREF 16 0061 #define DRM_VMW_FENCE_EVENT 17 0062 #define DRM_VMW_PRESENT 18 0063 #define DRM_VMW_PRESENT_READBACK 19 0064 #define DRM_VMW_UPDATE_LAYOUT 20 0065 #define DRM_VMW_CREATE_SHADER 21 0066 #define DRM_VMW_UNREF_SHADER 22 0067 #define DRM_VMW_GB_SURFACE_CREATE 23 0068 #define DRM_VMW_GB_SURFACE_REF 24 0069 #define DRM_VMW_SYNCCPU 25 0070 #define DRM_VMW_CREATE_EXTENDED_CONTEXT 26 0071 0072 /*************************************************************************/ 0073 /** 0074 * DRM_VMW_GET_PARAM - get device information. 0075 * 0076 * DRM_VMW_PARAM_FIFO_OFFSET: 0077 * Offset to use to map the first page of the FIFO read-only. 0078 * The fifo is mapped using the mmap() system call on the drm device. 0079 * 0080 * DRM_VMW_PARAM_OVERLAY_IOCTL: 0081 * Does the driver support the overlay ioctl. 0082 */ 0083 0084 #define DRM_VMW_PARAM_NUM_STREAMS 0 0085 #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 0086 #define DRM_VMW_PARAM_3D 2 0087 #define DRM_VMW_PARAM_HW_CAPS 3 0088 #define DRM_VMW_PARAM_FIFO_CAPS 4 0089 #define DRM_VMW_PARAM_MAX_FB_SIZE 5 0090 #define DRM_VMW_PARAM_FIFO_HW_VERSION 6 0091 #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7 0092 #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 0093 #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 0094 #define DRM_VMW_PARAM_MAX_MOB_SIZE 10 0095 #define DRM_VMW_PARAM_SCREEN_TARGET 11 0096 #define DRM_VMW_PARAM_DX 12 0097 0098 /** 0099 * enum drm_vmw_handle_type - handle type for ref ioctls 0100 * 0101 */ 0102 enum drm_vmw_handle_type { 0103 DRM_VMW_HANDLE_LEGACY = 0, 0104 DRM_VMW_HANDLE_PRIME = 1 0105 }; 0106 0107 /** 0108 * struct drm_vmw_getparam_arg 0109 * 0110 * @value: Returned value. //Out 0111 * @param: Parameter to query. //In. 0112 * 0113 * Argument to the DRM_VMW_GET_PARAM Ioctl. 0114 */ 0115 0116 struct drm_vmw_getparam_arg { 0117 __u64 value; 0118 __u32 param; 0119 __u32 pad64; 0120 }; 0121 0122 /*************************************************************************/ 0123 /** 0124 * DRM_VMW_CREATE_CONTEXT - Create a host context. 0125 * 0126 * Allocates a device unique context id, and queues a create context command 0127 * for the host. Does not wait for host completion. 0128 */ 0129 0130 /** 0131 * struct drm_vmw_context_arg 0132 * 0133 * @cid: Device unique context ID. 0134 * 0135 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 0136 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 0137 */ 0138 0139 struct drm_vmw_context_arg { 0140 __s32 cid; 0141 __u32 pad64; 0142 }; 0143 0144 /*************************************************************************/ 0145 /** 0146 * DRM_VMW_UNREF_CONTEXT - Create a host context. 0147 * 0148 * Frees a global context id, and queues a destroy host command for the host. 0149 * Does not wait for host completion. The context ID can be used directly 0150 * in the command stream and shows up as the same context ID on the host. 0151 */ 0152 0153 /*************************************************************************/ 0154 /** 0155 * DRM_VMW_CREATE_SURFACE - Create a host suface. 0156 * 0157 * Allocates a device unique surface id, and queues a create surface command 0158 * for the host. Does not wait for host completion. The surface ID can be 0159 * used directly in the command stream and shows up as the same surface 0160 * ID on the host. 0161 */ 0162 0163 /** 0164 * struct drm_wmv_surface_create_req 0165 * 0166 * @flags: Surface flags as understood by the host. 0167 * @format: Surface format as understood by the host. 0168 * @mip_levels: Number of mip levels for each face. 0169 * An unused face should have 0 encoded. 0170 * @size_addr: Address of a user-space array of sruct drm_vmw_size 0171 * cast to an __u64 for 32-64 bit compatibility. 0172 * The size of the array should equal the total number of mipmap levels. 0173 * @shareable: Boolean whether other clients (as identified by file descriptors) 0174 * may reference this surface. 0175 * @scanout: Boolean whether the surface is intended to be used as a 0176 * scanout. 0177 * 0178 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl. 0179 * Output data from the DRM_VMW_REF_SURFACE Ioctl. 0180 */ 0181 0182 struct drm_vmw_surface_create_req { 0183 __u32 flags; 0184 __u32 format; 0185 __u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 0186 __u64 size_addr; 0187 __s32 shareable; 0188 __s32 scanout; 0189 }; 0190 0191 /** 0192 * struct drm_wmv_surface_arg 0193 * 0194 * @sid: Surface id of created surface or surface to destroy or reference. 0195 * @handle_type: Handle type for DRM_VMW_REF_SURFACE Ioctl. 0196 * 0197 * Output data from the DRM_VMW_CREATE_SURFACE Ioctl. 0198 * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl. 0199 * Input argument to the DRM_VMW_REF_SURFACE Ioctl. 0200 */ 0201 0202 struct drm_vmw_surface_arg { 0203 __s32 sid; 0204 enum drm_vmw_handle_type handle_type; 0205 }; 0206 0207 /** 0208 * struct drm_vmw_size ioctl. 0209 * 0210 * @width - mip level width 0211 * @height - mip level height 0212 * @depth - mip level depth 0213 * 0214 * Description of a mip level. 0215 * Input data to the DRM_WMW_CREATE_SURFACE Ioctl. 0216 */ 0217 0218 struct drm_vmw_size { 0219 __u32 width; 0220 __u32 height; 0221 __u32 depth; 0222 __u32 pad64; 0223 }; 0224 0225 /** 0226 * union drm_vmw_surface_create_arg 0227 * 0228 * @rep: Output data as described above. 0229 * @req: Input data as described above. 0230 * 0231 * Argument to the DRM_VMW_CREATE_SURFACE Ioctl. 0232 */ 0233 0234 union drm_vmw_surface_create_arg { 0235 struct drm_vmw_surface_arg rep; 0236 struct drm_vmw_surface_create_req req; 0237 }; 0238 0239 /*************************************************************************/ 0240 /** 0241 * DRM_VMW_REF_SURFACE - Reference a host surface. 0242 * 0243 * Puts a reference on a host surface with a give sid, as previously 0244 * returned by the DRM_VMW_CREATE_SURFACE ioctl. 0245 * A reference will make sure the surface isn't destroyed while we hold 0246 * it and will allow the calling client to use the surface ID in the command 0247 * stream. 0248 * 0249 * On successful return, the Ioctl returns the surface information given 0250 * in the DRM_VMW_CREATE_SURFACE ioctl. 0251 */ 0252 0253 /** 0254 * union drm_vmw_surface_reference_arg 0255 * 0256 * @rep: Output data as described above. 0257 * @req: Input data as described above. 0258 * 0259 * Argument to the DRM_VMW_REF_SURFACE Ioctl. 0260 */ 0261 0262 union drm_vmw_surface_reference_arg { 0263 struct drm_vmw_surface_create_req rep; 0264 struct drm_vmw_surface_arg req; 0265 }; 0266 0267 /*************************************************************************/ 0268 /** 0269 * DRM_VMW_UNREF_SURFACE - Unreference a host surface. 0270 * 0271 * Clear a reference previously put on a host surface. 0272 * When all references are gone, including the one implicitly placed 0273 * on creation, 0274 * a destroy surface command will be queued for the host. 0275 * Does not wait for completion. 0276 */ 0277 0278 /*************************************************************************/ 0279 /** 0280 * DRM_VMW_EXECBUF 0281 * 0282 * Submit a command buffer for execution on the host, and return a 0283 * fence seqno that when signaled, indicates that the command buffer has 0284 * executed. 0285 */ 0286 0287 /** 0288 * struct drm_vmw_execbuf_arg 0289 * 0290 * @commands: User-space address of a command buffer cast to an __u64. 0291 * @command-size: Size in bytes of the command buffer. 0292 * @throttle-us: Sleep until software is less than @throttle_us 0293 * microseconds ahead of hardware. The driver may round this value 0294 * to the nearest kernel tick. 0295 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an 0296 * __u64. 0297 * @version: Allows expanding the execbuf ioctl parameters without breaking 0298 * backwards compatibility, since user-space will always tell the kernel 0299 * which version it uses. 0300 * @flags: Execbuf flags. 0301 * @imported_fence_fd: FD for a fence imported from another device 0302 * 0303 * Argument to the DRM_VMW_EXECBUF Ioctl. 0304 */ 0305 0306 #define DRM_VMW_EXECBUF_VERSION 2 0307 0308 #define DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD (1 << 0) 0309 #define DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD (1 << 1) 0310 0311 struct drm_vmw_execbuf_arg { 0312 __u64 commands; 0313 __u32 command_size; 0314 __u32 throttle_us; 0315 __u64 fence_rep; 0316 __u32 version; 0317 __u32 flags; 0318 __u32 context_handle; 0319 __s32 imported_fence_fd; 0320 }; 0321 0322 /** 0323 * struct drm_vmw_fence_rep 0324 * 0325 * @handle: Fence object handle for fence associated with a command submission. 0326 * @mask: Fence flags relevant for this fence object. 0327 * @seqno: Fence sequence number in fifo. A fence object with a lower 0328 * seqno will signal the EXEC flag before a fence object with a higher 0329 * seqno. This can be used by user-space to avoid kernel calls to determine 0330 * whether a fence has signaled the EXEC flag. Note that @seqno will 0331 * wrap at 32-bit. 0332 * @passed_seqno: The highest seqno number processed by the hardware 0333 * so far. This can be used to mark user-space fence objects as signaled, and 0334 * to determine whether a fence seqno might be stale. 0335 * @fd: FD associated with the fence, -1 if not exported 0336 * @error: This member should've been set to -EFAULT on submission. 0337 * The following actions should be take on completion: 0338 * error == -EFAULT: Fence communication failed. The host is synchronized. 0339 * Use the last fence id read from the FIFO fence register. 0340 * error != 0 && error != -EFAULT: 0341 * Fence submission failed. The host is synchronized. Use the fence_seq member. 0342 * error == 0: All is OK, The host may not be synchronized. 0343 * Use the fence_seq member. 0344 * 0345 * Input / Output data to the DRM_VMW_EXECBUF Ioctl. 0346 */ 0347 0348 struct drm_vmw_fence_rep { 0349 __u32 handle; 0350 __u32 mask; 0351 __u32 seqno; 0352 __u32 passed_seqno; 0353 __s32 fd; 0354 __s32 error; 0355 }; 0356 0357 /*************************************************************************/ 0358 /** 0359 * DRM_VMW_ALLOC_DMABUF 0360 * 0361 * Allocate a DMA buffer that is visible also to the host. 0362 * NOTE: The buffer is 0363 * identified by a handle and an offset, which are private to the guest, but 0364 * usable in the command stream. The guest kernel may translate these 0365 * and patch up the command stream accordingly. In the future, the offset may 0366 * be zero at all times, or it may disappear from the interface before it is 0367 * fixed. 0368 * 0369 * The DMA buffer may stay user-space mapped in the guest at all times, 0370 * and is thus suitable for sub-allocation. 0371 * 0372 * DMA buffers are mapped using the mmap() syscall on the drm device. 0373 */ 0374 0375 /** 0376 * struct drm_vmw_alloc_dmabuf_req 0377 * 0378 * @size: Required minimum size of the buffer. 0379 * 0380 * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl. 0381 */ 0382 0383 struct drm_vmw_alloc_dmabuf_req { 0384 __u32 size; 0385 __u32 pad64; 0386 }; 0387 0388 /** 0389 * struct drm_vmw_dmabuf_rep 0390 * 0391 * @map_handle: Offset to use in the mmap() call used to map the buffer. 0392 * @handle: Handle unique to this buffer. Used for unreferencing. 0393 * @cur_gmr_id: GMR id to use in the command stream when this buffer is 0394 * referenced. See not above. 0395 * @cur_gmr_offset: Offset to use in the command stream when this buffer is 0396 * referenced. See note above. 0397 * 0398 * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl. 0399 */ 0400 0401 struct drm_vmw_dmabuf_rep { 0402 __u64 map_handle; 0403 __u32 handle; 0404 __u32 cur_gmr_id; 0405 __u32 cur_gmr_offset; 0406 __u32 pad64; 0407 }; 0408 0409 /** 0410 * union drm_vmw_dmabuf_arg 0411 * 0412 * @req: Input data as described above. 0413 * @rep: Output data as described above. 0414 * 0415 * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl. 0416 */ 0417 0418 union drm_vmw_alloc_dmabuf_arg { 0419 struct drm_vmw_alloc_dmabuf_req req; 0420 struct drm_vmw_dmabuf_rep rep; 0421 }; 0422 0423 /*************************************************************************/ 0424 /** 0425 * DRM_VMW_UNREF_DMABUF - Free a DMA buffer. 0426 * 0427 */ 0428 0429 /** 0430 * struct drm_vmw_unref_dmabuf_arg 0431 * 0432 * @handle: Handle indicating what buffer to free. Obtained from the 0433 * DRM_VMW_ALLOC_DMABUF Ioctl. 0434 * 0435 * Argument to the DRM_VMW_UNREF_DMABUF Ioctl. 0436 */ 0437 0438 struct drm_vmw_unref_dmabuf_arg { 0439 __u32 handle; 0440 __u32 pad64; 0441 }; 0442 0443 /*************************************************************************/ 0444 /** 0445 * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams. 0446 * 0447 * This IOCTL controls the overlay units of the svga device. 0448 * The SVGA overlay units does not work like regular hardware units in 0449 * that they do not automatically read back the contents of the given dma 0450 * buffer. But instead only read back for each call to this ioctl, and 0451 * at any point between this call being made and a following call that 0452 * either changes the buffer or disables the stream. 0453 */ 0454 0455 /** 0456 * struct drm_vmw_rect 0457 * 0458 * Defines a rectangle. Used in the overlay ioctl to define 0459 * source and destination rectangle. 0460 */ 0461 0462 struct drm_vmw_rect { 0463 __s32 x; 0464 __s32 y; 0465 __u32 w; 0466 __u32 h; 0467 }; 0468 0469 /** 0470 * struct drm_vmw_control_stream_arg 0471 * 0472 * @stream_id: Stearm to control 0473 * @enabled: If false all following arguments are ignored. 0474 * @handle: Handle to buffer for getting data from. 0475 * @format: Format of the overlay as understood by the host. 0476 * @width: Width of the overlay. 0477 * @height: Height of the overlay. 0478 * @size: Size of the overlay in bytes. 0479 * @pitch: Array of pitches, the two last are only used for YUV12 formats. 0480 * @offset: Offset from start of dma buffer to overlay. 0481 * @src: Source rect, must be within the defined area above. 0482 * @dst: Destination rect, x and y may be negative. 0483 * 0484 * Argument to the DRM_VMW_CONTROL_STREAM Ioctl. 0485 */ 0486 0487 struct drm_vmw_control_stream_arg { 0488 __u32 stream_id; 0489 __u32 enabled; 0490 0491 __u32 flags; 0492 __u32 color_key; 0493 0494 __u32 handle; 0495 __u32 offset; 0496 __s32 format; 0497 __u32 size; 0498 __u32 width; 0499 __u32 height; 0500 __u32 pitch[3]; 0501 0502 __u32 pad64; 0503 struct drm_vmw_rect src; 0504 struct drm_vmw_rect dst; 0505 }; 0506 0507 /*************************************************************************/ 0508 /** 0509 * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass. 0510 * 0511 */ 0512 0513 #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 0514 #define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 0515 0516 /** 0517 * struct drm_vmw_cursor_bypass_arg 0518 * 0519 * @flags: Flags. 0520 * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed. 0521 * @xpos: X position of cursor. 0522 * @ypos: Y position of cursor. 0523 * @xhot: X hotspot. 0524 * @yhot: Y hotspot. 0525 * 0526 * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl. 0527 */ 0528 0529 struct drm_vmw_cursor_bypass_arg { 0530 __u32 flags; 0531 __u32 crtc_id; 0532 __s32 xpos; 0533 __s32 ypos; 0534 __s32 xhot; 0535 __s32 yhot; 0536 }; 0537 0538 /*************************************************************************/ 0539 /** 0540 * DRM_VMW_CLAIM_STREAM - Claim a single stream. 0541 */ 0542 0543 /** 0544 * struct drm_vmw_context_arg 0545 * 0546 * @stream_id: Device unique context ID. 0547 * 0548 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 0549 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 0550 */ 0551 0552 struct drm_vmw_stream_arg { 0553 __u32 stream_id; 0554 __u32 pad64; 0555 }; 0556 0557 /*************************************************************************/ 0558 /** 0559 * DRM_VMW_UNREF_STREAM - Unclaim a stream. 0560 * 0561 * Return a single stream that was claimed by this process. Also makes 0562 * sure that the stream has been stopped. 0563 */ 0564 0565 /*************************************************************************/ 0566 /** 0567 * DRM_VMW_GET_3D_CAP 0568 * 0569 * Read 3D capabilities from the FIFO 0570 * 0571 */ 0572 0573 /** 0574 * struct drm_vmw_get_3d_cap_arg 0575 * 0576 * @buffer: Pointer to a buffer for capability data, cast to an __u64 0577 * @size: Max size to copy 0578 * 0579 * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL 0580 * ioctls. 0581 */ 0582 0583 struct drm_vmw_get_3d_cap_arg { 0584 __u64 buffer; 0585 __u32 max_size; 0586 __u32 pad64; 0587 }; 0588 0589 /*************************************************************************/ 0590 /** 0591 * DRM_VMW_FENCE_WAIT 0592 * 0593 * Waits for a fence object to signal. The wait is interruptible, so that 0594 * signals may be delivered during the interrupt. The wait may timeout, 0595 * in which case the calls returns -EBUSY. If the wait is restarted, 0596 * that is restarting without resetting @cookie_valid to zero, 0597 * the timeout is computed from the first call. 0598 * 0599 * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait 0600 * on: 0601 * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command 0602 * stream 0603 * have executed. 0604 * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish 0605 * commands 0606 * in the buffer given to the EXECBUF ioctl returning the fence object handle 0607 * are available to user-space. 0608 * 0609 * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the 0610 * fenc wait ioctl returns 0, the fence object has been unreferenced after 0611 * the wait. 0612 */ 0613 0614 #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 0615 #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 0616 0617 #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 0618 0619 /** 0620 * struct drm_vmw_fence_wait_arg 0621 * 0622 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 0623 * @cookie_valid: Must be reset to 0 on first call. Left alone on restart. 0624 * @kernel_cookie: Set to 0 on first call. Left alone on restart. 0625 * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout. 0626 * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick 0627 * before returning. 0628 * @flags: Fence flags to wait on. 0629 * @wait_options: Options that control the behaviour of the wait ioctl. 0630 * 0631 * Input argument to the DRM_VMW_FENCE_WAIT ioctl. 0632 */ 0633 0634 struct drm_vmw_fence_wait_arg { 0635 __u32 handle; 0636 __s32 cookie_valid; 0637 __u64 kernel_cookie; 0638 __u64 timeout_us; 0639 __s32 lazy; 0640 __s32 flags; 0641 __s32 wait_options; 0642 __s32 pad64; 0643 }; 0644 0645 /*************************************************************************/ 0646 /** 0647 * DRM_VMW_FENCE_SIGNALED 0648 * 0649 * Checks if a fence object is signaled.. 0650 */ 0651 0652 /** 0653 * struct drm_vmw_fence_signaled_arg 0654 * 0655 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 0656 * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl 0657 * @signaled: Out: Flags signaled. 0658 * @sequence: Out: Highest sequence passed so far. Can be used to signal the 0659 * EXEC flag of user-space fence objects. 0660 * 0661 * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF 0662 * ioctls. 0663 */ 0664 0665 struct drm_vmw_fence_signaled_arg { 0666 __u32 handle; 0667 __u32 flags; 0668 __s32 signaled; 0669 __u32 passed_seqno; 0670 __u32 signaled_flags; 0671 __u32 pad64; 0672 }; 0673 0674 /*************************************************************************/ 0675 /** 0676 * DRM_VMW_FENCE_UNREF 0677 * 0678 * Unreferences a fence object, and causes it to be destroyed if there are no 0679 * other references to it. 0680 * 0681 */ 0682 0683 /** 0684 * struct drm_vmw_fence_arg 0685 * 0686 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 0687 * 0688 * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl.. 0689 */ 0690 0691 struct drm_vmw_fence_arg { 0692 __u32 handle; 0693 __u32 pad64; 0694 }; 0695 0696 0697 /*************************************************************************/ 0698 /** 0699 * DRM_VMW_FENCE_EVENT 0700 * 0701 * Queues an event on a fence to be delivered on the drm character device 0702 * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag. 0703 * Optionally the approximate time when the fence signaled is 0704 * given by the event. 0705 */ 0706 0707 /* 0708 * The event type 0709 */ 0710 #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 0711 0712 struct drm_vmw_event_fence { 0713 struct drm_event base; 0714 __u64 user_data; 0715 __u32 tv_sec; 0716 __u32 tv_usec; 0717 }; 0718 0719 /* 0720 * Flags that may be given to the command. 0721 */ 0722 /* Request fence signaled time on the event. */ 0723 #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 0724 0725 /** 0726 * struct drm_vmw_fence_event_arg 0727 * 0728 * @fence_rep: Pointer to fence_rep structure cast to __u64 or 0 if 0729 * the fence is not supposed to be referenced by user-space. 0730 * @user_info: Info to be delivered with the event. 0731 * @handle: Attach the event to this fence only. 0732 * @flags: A set of flags as defined above. 0733 */ 0734 struct drm_vmw_fence_event_arg { 0735 __u64 fence_rep; 0736 __u64 user_data; 0737 __u32 handle; 0738 __u32 flags; 0739 }; 0740 0741 0742 /*************************************************************************/ 0743 /** 0744 * DRM_VMW_PRESENT 0745 * 0746 * Executes an SVGA present on a given fb for a given surface. The surface 0747 * is placed on the framebuffer. Cliprects are given relative to the given 0748 * point (the point disignated by dest_{x|y}). 0749 * 0750 */ 0751 0752 /** 0753 * struct drm_vmw_present_arg 0754 * @fb_id: framebuffer id to present / read back from. 0755 * @sid: Surface id to present from. 0756 * @dest_x: X placement coordinate for surface. 0757 * @dest_y: Y placement coordinate for surface. 0758 * @clips_ptr: Pointer to an array of clip rects cast to an __u64. 0759 * @num_clips: Number of cliprects given relative to the framebuffer origin, 0760 * in the same coordinate space as the frame buffer. 0761 * @pad64: Unused 64-bit padding. 0762 * 0763 * Input argument to the DRM_VMW_PRESENT ioctl. 0764 */ 0765 0766 struct drm_vmw_present_arg { 0767 __u32 fb_id; 0768 __u32 sid; 0769 __s32 dest_x; 0770 __s32 dest_y; 0771 __u64 clips_ptr; 0772 __u32 num_clips; 0773 __u32 pad64; 0774 }; 0775 0776 0777 /*************************************************************************/ 0778 /** 0779 * DRM_VMW_PRESENT_READBACK 0780 * 0781 * Executes an SVGA present readback from a given fb to the dma buffer 0782 * currently bound as the fb. If there is no dma buffer bound to the fb, 0783 * an error will be returned. 0784 * 0785 */ 0786 0787 /** 0788 * struct drm_vmw_present_arg 0789 * @fb_id: fb_id to present / read back from. 0790 * @num_clips: Number of cliprects. 0791 * @clips_ptr: Pointer to an array of clip rects cast to an __u64. 0792 * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an __u64. 0793 * If this member is NULL, then the ioctl should not return a fence. 0794 */ 0795 0796 struct drm_vmw_present_readback_arg { 0797 __u32 fb_id; 0798 __u32 num_clips; 0799 __u64 clips_ptr; 0800 __u64 fence_rep; 0801 }; 0802 0803 /*************************************************************************/ 0804 /** 0805 * DRM_VMW_UPDATE_LAYOUT - Update layout 0806 * 0807 * Updates the preferred modes and connection status for connectors. The 0808 * command consists of one drm_vmw_update_layout_arg pointing to an array 0809 * of num_outputs drm_vmw_rect's. 0810 */ 0811 0812 /** 0813 * struct drm_vmw_update_layout_arg 0814 * 0815 * @num_outputs: number of active connectors 0816 * @rects: pointer to array of drm_vmw_rect cast to an __u64 0817 * 0818 * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl. 0819 */ 0820 struct drm_vmw_update_layout_arg { 0821 __u32 num_outputs; 0822 __u32 pad64; 0823 __u64 rects; 0824 }; 0825 0826 0827 /*************************************************************************/ 0828 /** 0829 * DRM_VMW_CREATE_SHADER - Create shader 0830 * 0831 * Creates a shader and optionally binds it to a dma buffer containing 0832 * the shader byte-code. 0833 */ 0834 0835 /** 0836 * enum drm_vmw_shader_type - Shader types 0837 */ 0838 enum drm_vmw_shader_type { 0839 drm_vmw_shader_type_vs = 0, 0840 drm_vmw_shader_type_ps, 0841 }; 0842 0843 0844 /** 0845 * struct drm_vmw_shader_create_arg 0846 * 0847 * @shader_type: Shader type of the shader to create. 0848 * @size: Size of the byte-code in bytes. 0849 * where the shader byte-code starts 0850 * @buffer_handle: Buffer handle identifying the buffer containing the 0851 * shader byte-code 0852 * @shader_handle: On successful completion contains a handle that 0853 * can be used to subsequently identify the shader. 0854 * @offset: Offset in bytes into the buffer given by @buffer_handle, 0855 * 0856 * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl. 0857 */ 0858 struct drm_vmw_shader_create_arg { 0859 enum drm_vmw_shader_type shader_type; 0860 __u32 size; 0861 __u32 buffer_handle; 0862 __u32 shader_handle; 0863 __u64 offset; 0864 }; 0865 0866 /*************************************************************************/ 0867 /** 0868 * DRM_VMW_UNREF_SHADER - Unreferences a shader 0869 * 0870 * Destroys a user-space reference to a shader, optionally destroying 0871 * it. 0872 */ 0873 0874 /** 0875 * struct drm_vmw_shader_arg 0876 * 0877 * @handle: Handle identifying the shader to destroy. 0878 * 0879 * Input argument to the DRM_VMW_UNREF_SHADER ioctl. 0880 */ 0881 struct drm_vmw_shader_arg { 0882 __u32 handle; 0883 __u32 pad64; 0884 }; 0885 0886 /*************************************************************************/ 0887 /** 0888 * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface. 0889 * 0890 * Allocates a surface handle and queues a create surface command 0891 * for the host on the first use of the surface. The surface ID can 0892 * be used as the surface ID in commands referencing the surface. 0893 */ 0894 0895 /** 0896 * enum drm_vmw_surface_flags 0897 * 0898 * @drm_vmw_surface_flag_shareable: Whether the surface is shareable 0899 * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout 0900 * surface. 0901 * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is 0902 * given. 0903 */ 0904 enum drm_vmw_surface_flags { 0905 drm_vmw_surface_flag_shareable = (1 << 0), 0906 drm_vmw_surface_flag_scanout = (1 << 1), 0907 drm_vmw_surface_flag_create_buffer = (1 << 2) 0908 }; 0909 0910 /** 0911 * struct drm_vmw_gb_surface_create_req 0912 * 0913 * @svga3d_flags: SVGA3d surface flags for the device. 0914 * @format: SVGA3d format. 0915 * @mip_level: Number of mip levels for all faces. 0916 * @drm_surface_flags Flags as described above. 0917 * @multisample_count Future use. Set to 0. 0918 * @autogen_filter Future use. Set to 0. 0919 * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID 0920 * if none. 0921 * @base_size Size of the base mip level for all faces. 0922 * @array_size Must be zero for non-DX hardware, and if non-zero 0923 * svga3d_flags must have proper bind flags setup. 0924 * 0925 * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl. 0926 * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl. 0927 */ 0928 struct drm_vmw_gb_surface_create_req { 0929 __u32 svga3d_flags; 0930 __u32 format; 0931 __u32 mip_levels; 0932 enum drm_vmw_surface_flags drm_surface_flags; 0933 __u32 multisample_count; 0934 __u32 autogen_filter; 0935 __u32 buffer_handle; 0936 __u32 array_size; 0937 struct drm_vmw_size base_size; 0938 }; 0939 0940 /** 0941 * struct drm_vmw_gb_surface_create_rep 0942 * 0943 * @handle: Surface handle. 0944 * @backup_size: Size of backup buffers for this surface. 0945 * @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none. 0946 * @buffer_size: Actual size of the buffer identified by 0947 * @buffer_handle 0948 * @buffer_map_handle: Offset into device address space for the buffer 0949 * identified by @buffer_handle. 0950 * 0951 * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl. 0952 * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl. 0953 */ 0954 struct drm_vmw_gb_surface_create_rep { 0955 __u32 handle; 0956 __u32 backup_size; 0957 __u32 buffer_handle; 0958 __u32 buffer_size; 0959 __u64 buffer_map_handle; 0960 }; 0961 0962 /** 0963 * union drm_vmw_gb_surface_create_arg 0964 * 0965 * @req: Input argument as described above. 0966 * @rep: Output argument as described above. 0967 * 0968 * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl. 0969 */ 0970 union drm_vmw_gb_surface_create_arg { 0971 struct drm_vmw_gb_surface_create_rep rep; 0972 struct drm_vmw_gb_surface_create_req req; 0973 }; 0974 0975 /*************************************************************************/ 0976 /** 0977 * DRM_VMW_GB_SURFACE_REF - Reference a host surface. 0978 * 0979 * Puts a reference on a host surface with a given handle, as previously 0980 * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl. 0981 * A reference will make sure the surface isn't destroyed while we hold 0982 * it and will allow the calling client to use the surface handle in 0983 * the command stream. 0984 * 0985 * On successful return, the Ioctl returns the surface information given 0986 * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl. 0987 */ 0988 0989 /** 0990 * struct drm_vmw_gb_surface_reference_arg 0991 * 0992 * @creq: The data used as input when the surface was created, as described 0993 * above at "struct drm_vmw_gb_surface_create_req" 0994 * @crep: Additional data output when the surface was created, as described 0995 * above at "struct drm_vmw_gb_surface_create_rep" 0996 * 0997 * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl. 0998 */ 0999 struct drm_vmw_gb_surface_ref_rep { 1000 struct drm_vmw_gb_surface_create_req creq; 1001 struct drm_vmw_gb_surface_create_rep crep; 1002 }; 1003 1004 /** 1005 * union drm_vmw_gb_surface_reference_arg 1006 * 1007 * @req: Input data as described above at "struct drm_vmw_surface_arg" 1008 * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep" 1009 * 1010 * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl. 1011 */ 1012 union drm_vmw_gb_surface_reference_arg { 1013 struct drm_vmw_gb_surface_ref_rep rep; 1014 struct drm_vmw_surface_arg req; 1015 }; 1016 1017 1018 /*************************************************************************/ 1019 /** 1020 * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access. 1021 * 1022 * Idles any previously submitted GPU operations on the buffer and 1023 * by default blocks command submissions that reference the buffer. 1024 * If the file descriptor used to grab a blocking CPU sync is closed, the 1025 * cpu sync is released. 1026 * The flags argument indicates how the grab / release operation should be 1027 * performed: 1028 */ 1029 1030 /** 1031 * enum drm_vmw_synccpu_flags - Synccpu flags: 1032 * 1033 * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a 1034 * hint to the kernel to allow command submissions that references the buffer 1035 * for read-only. 1036 * @drm_vmw_synccpu_write: Sync for write. Block all command submissions 1037 * referencing this buffer. 1038 * @drm_vmw_synccpu_dontblock: Don't wait for GPU idle, but rather return 1039 * -EBUSY should the buffer be busy. 1040 * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer 1041 * while the buffer is synced for CPU. This is similar to the GEM bo idle 1042 * behavior. 1043 */ 1044 enum drm_vmw_synccpu_flags { 1045 drm_vmw_synccpu_read = (1 << 0), 1046 drm_vmw_synccpu_write = (1 << 1), 1047 drm_vmw_synccpu_dontblock = (1 << 2), 1048 drm_vmw_synccpu_allow_cs = (1 << 3) 1049 }; 1050 1051 /** 1052 * enum drm_vmw_synccpu_op - Synccpu operations: 1053 * 1054 * @drm_vmw_synccpu_grab: Grab the buffer for CPU operations 1055 * @drm_vmw_synccpu_release: Release a previous grab. 1056 */ 1057 enum drm_vmw_synccpu_op { 1058 drm_vmw_synccpu_grab, 1059 drm_vmw_synccpu_release 1060 }; 1061 1062 /** 1063 * struct drm_vmw_synccpu_arg 1064 * 1065 * @op: The synccpu operation as described above. 1066 * @handle: Handle identifying the buffer object. 1067 * @flags: Flags as described above. 1068 */ 1069 struct drm_vmw_synccpu_arg { 1070 enum drm_vmw_synccpu_op op; 1071 enum drm_vmw_synccpu_flags flags; 1072 __u32 handle; 1073 __u32 pad64; 1074 }; 1075 1076 /*************************************************************************/ 1077 /** 1078 * DRM_VMW_CREATE_EXTENDED_CONTEXT - Create a host context. 1079 * 1080 * Allocates a device unique context id, and queues a create context command 1081 * for the host. Does not wait for host completion. 1082 */ 1083 enum drm_vmw_extended_context { 1084 drm_vmw_context_legacy, 1085 drm_vmw_context_dx 1086 }; 1087 1088 /** 1089 * union drm_vmw_extended_context_arg 1090 * 1091 * @req: Context type. 1092 * @rep: Context identifier. 1093 * 1094 * Argument to the DRM_VMW_CREATE_EXTENDED_CONTEXT Ioctl. 1095 */ 1096 union drm_vmw_extended_context_arg { 1097 enum drm_vmw_extended_context req; 1098 struct drm_vmw_context_arg rep; 1099 }; 1100 1101 /*************************************************************************/ 1102 /* 1103 * DRM_VMW_HANDLE_CLOSE - Close a user-space handle and release its 1104 * underlying resource. 1105 * 1106 * Note that this ioctl is overlaid on the DRM_VMW_UNREF_DMABUF Ioctl. 1107 * The ioctl arguments therefore need to be identical in layout. 1108 * 1109 */ 1110 1111 /** 1112 * struct drm_vmw_handle_close_arg 1113 * 1114 * @handle: Handle to close. 1115 * 1116 * Argument to the DRM_VMW_HANDLE_CLOSE Ioctl. 1117 */ 1118 struct drm_vmw_handle_close_arg { 1119 __u32 handle; 1120 __u32 pad64; 1121 }; 1122 1123 1124 #if defined(__cplusplus) 1125 } 1126 #endif 1127 1128 #endif
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