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File indexing completed on 2025-01-18 10:01:51

0001 /* savage_drm.h -- Public header for the savage driver
0002  *
0003  * Copyright 2004  Felix Kuehling
0004  * All Rights Reserved.
0005  *
0006  * Permission is hereby granted, free of charge, to any person obtaining a
0007  * copy of this software and associated documentation files (the "Software"),
0008  * to deal in the Software without restriction, including without limitation
0009  * the rights to use, copy, modify, merge, publish, distribute, sub license,
0010  * and/or sell copies of the Software, and to permit persons to whom the
0011  * Software is furnished to do so, subject to the following conditions:
0012  *
0013  * The above copyright notice and this permission notice (including the
0014  * next paragraph) shall be included in all copies or substantial portions
0015  * of the Software.
0016  *
0017  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
0018  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
0019  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
0020  * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
0021  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
0022  * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
0023  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
0024  */
0025 
0026 #ifndef __SAVAGE_DRM_H__
0027 #define __SAVAGE_DRM_H__
0028 
0029 #include "drm.h"
0030 
0031 #if defined(__cplusplus)
0032 extern "C" {
0033 #endif
0034 
0035 #ifndef __SAVAGE_SAREA_DEFINES__
0036 #define __SAVAGE_SAREA_DEFINES__
0037 
0038 /* 2 heaps (1 for card, 1 for agp), each divided into up to 128
0039  * regions, subject to a minimum region size of (1<<16) == 64k.
0040  *
0041  * Clients may subdivide regions internally, but when sharing between
0042  * clients, the region size is the minimum granularity.
0043  */
0044 
0045 #define SAVAGE_CARD_HEAP        0
0046 #define SAVAGE_AGP_HEAP         1
0047 #define SAVAGE_NR_TEX_HEAPS     2
0048 #define SAVAGE_NR_TEX_REGIONS       16
0049 #define SAVAGE_LOG_MIN_TEX_REGION_SIZE  16
0050 
0051 #endif              /* __SAVAGE_SAREA_DEFINES__ */
0052 
0053 typedef struct _drm_savage_sarea {
0054     /* LRU lists for texture memory in agp space and on the card.
0055      */
0056     struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS +
0057                               1];
0058     unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
0059 
0060     /* Mechanism to validate card state.
0061      */
0062     int ctxOwner;
0063 } drm_savage_sarea_t, *drm_savage_sarea_ptr;
0064 
0065 /* Savage-specific ioctls
0066  */
0067 #define DRM_SAVAGE_BCI_INIT     0x00
0068 #define DRM_SAVAGE_BCI_CMDBUF           0x01
0069 #define DRM_SAVAGE_BCI_EVENT_EMIT   0x02
0070 #define DRM_SAVAGE_BCI_EVENT_WAIT   0x03
0071 
0072 #define DRM_IOCTL_SAVAGE_BCI_INIT       DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
0073 #define DRM_IOCTL_SAVAGE_BCI_CMDBUF     DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
0074 #define DRM_IOCTL_SAVAGE_BCI_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
0075 #define DRM_IOCTL_SAVAGE_BCI_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
0076 
0077 #define SAVAGE_DMA_PCI  1
0078 #define SAVAGE_DMA_AGP  3
0079 typedef struct drm_savage_init {
0080     enum {
0081         SAVAGE_INIT_BCI = 1,
0082         SAVAGE_CLEANUP_BCI = 2
0083     } func;
0084     unsigned int sarea_priv_offset;
0085 
0086     /* some parameters */
0087     unsigned int cob_size;
0088     unsigned int bci_threshold_lo, bci_threshold_hi;
0089     unsigned int dma_type;
0090 
0091     /* frame buffer layout */
0092     unsigned int fb_bpp;
0093     unsigned int front_offset, front_pitch;
0094     unsigned int back_offset, back_pitch;
0095     unsigned int depth_bpp;
0096     unsigned int depth_offset, depth_pitch;
0097 
0098     /* local textures */
0099     unsigned int texture_offset;
0100     unsigned int texture_size;
0101 
0102     /* physical locations of non-permanent maps */
0103     unsigned long status_offset;
0104     unsigned long buffers_offset;
0105     unsigned long agp_textures_offset;
0106     unsigned long cmd_dma_offset;
0107 } drm_savage_init_t;
0108 
0109 typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
0110 typedef struct drm_savage_cmdbuf {
0111     /* command buffer in client's address space */
0112     drm_savage_cmd_header_t *cmd_addr;
0113     unsigned int size;  /* size of the command buffer in 64bit units */
0114 
0115     unsigned int dma_idx;   /* DMA buffer index to use */
0116     int discard;        /* discard DMA buffer when done */
0117     /* vertex buffer in client's address space */
0118     unsigned int *vb_addr;
0119     unsigned int vb_size;   /* size of client vertex buffer in bytes */
0120     unsigned int vb_stride; /* stride of vertices in 32bit words */
0121     /* boxes in client's address space */
0122     struct drm_clip_rect *box_addr;
0123     unsigned int nbox;  /* number of clipping boxes */
0124 } drm_savage_cmdbuf_t;
0125 
0126 #define SAVAGE_WAIT_2D  0x1 /* wait for 2D idle before updating event tag */
0127 #define SAVAGE_WAIT_3D  0x2 /* wait for 3D idle before updating event tag */
0128 #define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */
0129 typedef struct drm_savage_event {
0130     unsigned int count;
0131     unsigned int flags;
0132 } drm_savage_event_emit_t, drm_savage_event_wait_t;
0133 
0134 /* Commands for the cmdbuf ioctl
0135  */
0136 #define SAVAGE_CMD_STATE    0   /* a range of state registers */
0137 #define SAVAGE_CMD_DMA_PRIM 1   /* vertices from DMA buffer */
0138 #define SAVAGE_CMD_VB_PRIM  2   /* vertices from client vertex buffer */
0139 #define SAVAGE_CMD_DMA_IDX  3   /* indexed vertices from DMA buffer */
0140 #define SAVAGE_CMD_VB_IDX   4   /* indexed vertices client vertex buffer */
0141 #define SAVAGE_CMD_CLEAR    5   /* clear buffers */
0142 #define SAVAGE_CMD_SWAP     6   /* swap buffers */
0143 
0144 /* Primitive types
0145 */
0146 #define SAVAGE_PRIM_TRILIST 0   /* triangle list */
0147 #define SAVAGE_PRIM_TRISTRIP    1   /* triangle strip */
0148 #define SAVAGE_PRIM_TRIFAN  2   /* triangle fan */
0149 #define SAVAGE_PRIM_TRILIST_201 3   /* reorder verts for correct flat
0150                      * shading on s3d */
0151 
0152 /* Skip flags (vertex format)
0153  */
0154 #define SAVAGE_SKIP_Z       0x01
0155 #define SAVAGE_SKIP_W       0x02
0156 #define SAVAGE_SKIP_C0      0x04
0157 #define SAVAGE_SKIP_C1      0x08
0158 #define SAVAGE_SKIP_S0      0x10
0159 #define SAVAGE_SKIP_T0      0x20
0160 #define SAVAGE_SKIP_ST0     0x30
0161 #define SAVAGE_SKIP_S1      0x40
0162 #define SAVAGE_SKIP_T1      0x80
0163 #define SAVAGE_SKIP_ST1     0xc0
0164 #define SAVAGE_SKIP_ALL_S3D 0x3f
0165 #define SAVAGE_SKIP_ALL_S4  0xff
0166 
0167 /* Buffer names for clear command
0168  */
0169 #define SAVAGE_FRONT        0x1
0170 #define SAVAGE_BACK     0x2
0171 #define SAVAGE_DEPTH        0x4
0172 
0173 /* 64-bit command header
0174  */
0175 union drm_savage_cmd_header {
0176     struct {
0177         unsigned char cmd;  /* command */
0178         unsigned char pad0;
0179         unsigned short pad1;
0180         unsigned short pad2;
0181         unsigned short pad3;
0182     } cmd;          /* generic */
0183     struct {
0184         unsigned char cmd;
0185         unsigned char global;   /* need idle engine? */
0186         unsigned short count;   /* number of consecutive registers */
0187         unsigned short start;   /* first register */
0188         unsigned short pad3;
0189     } state;        /* SAVAGE_CMD_STATE */
0190     struct {
0191         unsigned char cmd;
0192         unsigned char prim; /* primitive type */
0193         unsigned short skip;    /* vertex format (skip flags) */
0194         unsigned short count;   /* number of vertices */
0195         unsigned short start;   /* first vertex in DMA/vertex buffer */
0196     } prim;         /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */
0197     struct {
0198         unsigned char cmd;
0199         unsigned char prim;
0200         unsigned short skip;
0201         unsigned short count;   /* number of indices that follow */
0202         unsigned short pad3;
0203     } idx;          /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */
0204     struct {
0205         unsigned char cmd;
0206         unsigned char pad0;
0207         unsigned short pad1;
0208         unsigned int flags;
0209     } clear0;       /* SAVAGE_CMD_CLEAR */
0210     struct {
0211         unsigned int mask;
0212         unsigned int value;
0213     } clear1;       /* SAVAGE_CMD_CLEAR data */
0214 };
0215 
0216 #if defined(__cplusplus)
0217 }
0218 #endif
0219 
0220 #endif