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File indexing completed on 2025-01-18 10:01:51

0001 /*
0002  * Copyright © 2008 Nicolai Haehnle
0003  * Copyright © 2008 Jérôme Glisse
0004  * All Rights Reserved.
0005  *
0006  * Permission is hereby granted, free of charge, to any person obtaining a
0007  * copy of this software and associated documentation files (the
0008  * "Software"), to deal in the Software without restriction, including
0009  * without limitation the rights to use, copy, modify, merge, publish,
0010  * distribute, sub license, and/or sell copies of the Software, and to
0011  * permit persons to whom the Software is furnished to do so, subject to
0012  * the following conditions:
0013  *
0014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0015  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0016  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
0017  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
0018  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
0019  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
0020  * USE OR OTHER DEALINGS IN THE SOFTWARE.
0021  *
0022  * The above copyright notice and this permission notice (including the
0023  * next paragraph) shall be included in all copies or substantial portions
0024  * of the Software.
0025  */
0026 /*
0027  * Authors:
0028  *      Aapo Tahkola <aet@rasterburn.org>
0029  *      Nicolai Haehnle <prefect_@gmx.net>
0030  *      Jérôme Glisse <glisse@freedesktop.org>
0031  */
0032 #ifndef RADEON_CS_H
0033 #define RADEON_CS_H
0034 
0035 #include <stdint.h>
0036 #include <string.h>
0037 #include "drm.h"
0038 #include "radeon_drm.h"
0039 #include "radeon_bo.h"
0040 
0041 struct radeon_cs_reloc {
0042     struct radeon_bo    *bo;
0043     uint32_t            read_domain;
0044     uint32_t            write_domain;
0045     uint32_t            flags;
0046 };
0047 
0048 
0049 #define RADEON_CS_SPACE_OK 0
0050 #define RADEON_CS_SPACE_OP_TO_BIG 1
0051 #define RADEON_CS_SPACE_FLUSH 2
0052 
0053 struct radeon_cs {
0054     uint32_t *packets;
0055     unsigned cdw;
0056     unsigned ndw;
0057     unsigned                    section_ndw;
0058     unsigned                    section_cdw;
0059 };
0060 
0061 #define MAX_SPACE_BOS (32)
0062 
0063 struct radeon_cs_manager;
0064 
0065 extern struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm,
0066                                           uint32_t ndw);
0067 
0068 extern int radeon_cs_begin(struct radeon_cs *cs,
0069                            uint32_t ndw,
0070                            const char *file,
0071                            const char *func, int line);
0072 extern int radeon_cs_end(struct radeon_cs *cs,
0073                          const char *file,
0074                          const char *func,
0075                          int line);
0076 extern int radeon_cs_emit(struct radeon_cs *cs);
0077 extern int radeon_cs_destroy(struct radeon_cs *cs);
0078 extern int radeon_cs_erase(struct radeon_cs *cs);
0079 extern int radeon_cs_need_flush(struct radeon_cs *cs);
0080 extern void radeon_cs_print(struct radeon_cs *cs, FILE *file);
0081 extern void radeon_cs_set_limit(struct radeon_cs *cs, uint32_t domain, uint32_t limit);
0082 extern void radeon_cs_space_set_flush(struct radeon_cs *cs, void (*fn)(void *), void *data);
0083 extern int radeon_cs_write_reloc(struct radeon_cs *cs,
0084                                  struct radeon_bo *bo,
0085                                  uint32_t read_domain,
0086                                  uint32_t write_domain,
0087                                  uint32_t flags);
0088 extern uint32_t radeon_cs_get_id(struct radeon_cs *cs);
0089 /*
0090  * add a persistent BO to the list
0091  * a persistent BO is one that will be referenced across flushes,
0092  * i.e. colorbuffer, textures etc.
0093  * They get reset when a new "operation" happens, where an operation
0094  * is a state emission with a color/textures etc followed by a bunch of vertices.
0095  */
0096 void radeon_cs_space_add_persistent_bo(struct radeon_cs *cs,
0097                                        struct radeon_bo *bo,
0098                                        uint32_t read_domains,
0099                                        uint32_t write_domain);
0100 
0101 /* reset the persistent BO list */
0102 void radeon_cs_space_reset_bos(struct radeon_cs *cs);
0103 
0104 /* do a space check with the current persistent BO list */
0105 int radeon_cs_space_check(struct radeon_cs *cs);
0106 
0107 /* do a space check with the current persistent BO list and a temporary BO
0108  * a temporary BO is like a DMA buffer, which  gets flushed with the
0109  * command buffer */
0110 int radeon_cs_space_check_with_bo(struct radeon_cs *cs,
0111                                   struct radeon_bo *bo,
0112                                   uint32_t read_domains,
0113                                   uint32_t write_domain);
0114 
0115 static inline void radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
0116 {
0117     cs->packets[cs->cdw++] = dword;
0118     if (cs->section_ndw) {
0119         cs->section_cdw++;
0120     }
0121 }
0122 
0123 static inline void radeon_cs_write_qword(struct radeon_cs *cs, uint64_t qword)
0124 {
0125     memcpy(cs->packets + cs->cdw, &qword, sizeof(uint64_t));
0126     cs->cdw += 2;
0127     if (cs->section_ndw) {
0128         cs->section_cdw += 2;
0129     }
0130 }
0131 
0132 static inline void radeon_cs_write_table(struct radeon_cs *cs,
0133                                          const void *data, uint32_t size)
0134 {
0135     memcpy(cs->packets + cs->cdw, data, size * 4);
0136     cs->cdw += size;
0137     if (cs->section_ndw) {
0138         cs->section_cdw += size;
0139     }
0140 }
0141 #endif