include/libdrm/mach64_drm.h

0001 /* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*-
0002  * Created: Thu Nov 30 20:04:32 2000 by gareth@valinux.com
0003  */
0004 /*
0005  * Copyright 2000 Gareth Hughes
0006  * Copyright 2002 Frank C. Earl
0007  * Copyright 2002-2003 Leif Delgass
0008  * All Rights Reserved.
0009  *
0010  * Permission is hereby granted, free of charge, to any person obtaining a
0011  * copy of this software and associated documentation files (the "Software"),
0012  * to deal in the Software without restriction, including without limitation
0013  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0014  * and/or sell copies of the Software, and to permit persons to whom the
0015  * Software is furnished to do so, subject to the following conditions:
0016  *
0017  * The above copyright notice and this permission notice (including the next
0018  * paragraph) shall be included in all copies or substantial portions of the
0019  * Software.
0020  *
0021  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0022  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0023  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0024  * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
0025  * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
0026  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
0027  *
0028  * Authors:
0029  *    Gareth Hughes <gareth@valinux.com>
0030  *    Frank C. Earl <fearl@airmail.net>
0031  *    Leif Delgass <ldelgass@retinalburn.net>
0032  */
0033
0034 #ifndef __MACH64_DRM_H__
0035 #define __MACH64_DRM_H__
0036
0037 /* WARNING: If you change any of these defines, make sure to change the
0038  * defines in the Xserver file (mach64_sarea.h)
0039  */
0040 #ifndef __MACH64_SAREA_DEFINES__
0041 #define __MACH64_SAREA_DEFINES__
0042
0043 /* What needs to be changed for the current vertex buffer?
0044  * GH: We're going to be pedantic about this.  We want the card to do as
0045  * little as possible, so let's avoid having it fetch a whole bunch of
0046  * register values that don't change all that often, if at all.
0047  */
0048 #define MACH64_UPLOAD_DST_OFF_PITCH 0x0001
0049 #define MACH64_UPLOAD_Z_OFF_PITCH   0x0002
0050 #define MACH64_UPLOAD_Z_ALPHA_CNTL  0x0004
0051 #define MACH64_UPLOAD_SCALE_3D_CNTL 0x0008
0052 #define MACH64_UPLOAD_DP_FOG_CLR    0x0010
0053 #define MACH64_UPLOAD_DP_WRITE_MASK 0x0020
0054 #define MACH64_UPLOAD_DP_PIX_WIDTH  0x0040
0055 #define MACH64_UPLOAD_SETUP_CNTL    0x0080
0056 #define MACH64_UPLOAD_MISC      0x0100
0057 #define MACH64_UPLOAD_TEXTURE       0x0200
0058 #define MACH64_UPLOAD_TEX0IMAGE     0x0400
0059 #define MACH64_UPLOAD_TEX1IMAGE     0x0800
0060 #define MACH64_UPLOAD_CLIPRECTS     0x1000  /* handled client-side */
0061 #define MACH64_UPLOAD_CONTEXT       0x00ff
0062 #define MACH64_UPLOAD_ALL       0x1fff
0063
0064 /* DMA buffer size
0065  */
0066 #define MACH64_BUFFER_SIZE      16384
0067
0068 /* Max number of swaps allowed on the ring
0069  * before the client must wait
0070  */
0071 #define MACH64_MAX_QUEUED_FRAMES        3U
0072
0073 /* Byte offsets for host blit buffer data
0074  */
0075 #define MACH64_HOSTDATA_BLIT_OFFSET 104
0076
0077 /* Keep these small for testing.
0078  */
0079 #define MACH64_NR_SAREA_CLIPRECTS   8
0080
0081 #define MACH64_CARD_HEAP        0
0082 #define MACH64_AGP_HEAP         1
0083 #define MACH64_NR_TEX_HEAPS     2
0084 #define MACH64_NR_TEX_REGIONS       64
0085 #define MACH64_LOG_TEX_GRANULARITY  16
0086
0087 #define MACH64_TEX_MAXLEVELS        1
0088
0089 #define MACH64_NR_CONTEXT_REGS      15
0090 #define MACH64_NR_TEXTURE_REGS      4
0091
0092 #endif              /* __MACH64_SAREA_DEFINES__ */
0093
0094 typedef struct {
0095     unsigned int dst_off_pitch;
0096
0097     unsigned int z_off_pitch;
0098     unsigned int z_cntl;
0099     unsigned int alpha_tst_cntl;
0100
0101     unsigned int scale_3d_cntl;
0102
0103     unsigned int sc_left_right;
0104     unsigned int sc_top_bottom;
0105
0106     unsigned int dp_fog_clr;
0107     unsigned int dp_write_mask;
0108     unsigned int dp_pix_width;
0109     unsigned int dp_mix;
0110     unsigned int dp_src;
0111
0112     unsigned int clr_cmp_cntl;
0113     unsigned int gui_traj_cntl;
0114
0115     unsigned int setup_cntl;
0116
0117     unsigned int tex_size_pitch;
0118     unsigned int tex_cntl;
0119     unsigned int secondary_tex_off;
0120     unsigned int tex_offset;
0121 } drm_mach64_context_regs_t;
0122
0123 typedef struct drm_mach64_sarea {
0124     /* The channel for communication of state information to the kernel
0125      * on firing a vertex dma buffer.
0126      */
0127     drm_mach64_context_regs_t context_state;
0128     unsigned int dirty;
0129     unsigned int vertsize;
0130
0131     /* The current cliprects, or a subset thereof.
0132      */
0133     struct drm_clip_rect boxes[MACH64_NR_SAREA_CLIPRECTS];
0134     unsigned int nbox;
0135
0136     /* Counters for client-side throttling of rendering clients.
0137      */
0138     unsigned int frames_queued;
0139
0140     /* Texture memory LRU.
0141      */
0142     struct drm_tex_region tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS +
0143                                1];
0144     unsigned int tex_age[MACH64_NR_TEX_HEAPS];
0145     int ctx_owner;
0146 } drm_mach64_sarea_t;
0147
0148 /* WARNING: If you change any of these defines, make sure to change the
0149  * defines in the Xserver file (mach64_common.h)
0150  */
0151
0152 /* Mach64 specific ioctls
0153  * The device specific ioctl range is 0x40 to 0x79.
0154  */
0155
0156 #define DRM_MACH64_INIT           0x00
0157 #define DRM_MACH64_IDLE           0x01
0158 #define DRM_MACH64_RESET          0x02
0159 #define DRM_MACH64_SWAP           0x03
0160 #define DRM_MACH64_CLEAR          0x04
0161 #define DRM_MACH64_VERTEX         0x05
0162 #define DRM_MACH64_BLIT           0x06
0163 #define DRM_MACH64_FLUSH          0x07
0164 #define DRM_MACH64_GETPARAM       0x08
0165
0166 #define DRM_IOCTL_MACH64_INIT           DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t)
0167 #define DRM_IOCTL_MACH64_IDLE           DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_IDLE )
0168 #define DRM_IOCTL_MACH64_RESET          DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_RESET )
0169 #define DRM_IOCTL_MACH64_SWAP           DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_SWAP )
0170 #define DRM_IOCTL_MACH64_CLEAR          DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t)
0171 #define DRM_IOCTL_MACH64_VERTEX         DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t)
0172 #define DRM_IOCTL_MACH64_BLIT           DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t)
0173 #define DRM_IOCTL_MACH64_FLUSH          DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_FLUSH )
0174 #define DRM_IOCTL_MACH64_GETPARAM       DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t)
0175
0176 /* Buffer flags for clears
0177  */
0178 #define MACH64_FRONT            0x1
0179 #define MACH64_BACK         0x2
0180 #define MACH64_DEPTH            0x4
0181
0182 /* Primitive types for vertex buffers
0183  */
0184 #define MACH64_PRIM_POINTS      0x00000000
0185 #define MACH64_PRIM_LINES       0x00000001
0186 #define MACH64_PRIM_LINE_LOOP       0x00000002
0187 #define MACH64_PRIM_LINE_STRIP      0x00000003
0188 #define MACH64_PRIM_TRIANGLES       0x00000004
0189 #define MACH64_PRIM_TRIANGLE_STRIP  0x00000005
0190 #define MACH64_PRIM_TRIANGLE_FAN    0x00000006
0191 #define MACH64_PRIM_QUADS       0x00000007
0192 #define MACH64_PRIM_QUAD_STRIP      0x00000008
0193 #define MACH64_PRIM_POLYGON     0x00000009
0194
0195 typedef enum _drm_mach64_dma_mode_t {
0196     MACH64_MODE_DMA_ASYNC,
0197     MACH64_MODE_DMA_SYNC,
0198     MACH64_MODE_MMIO
0199 } drm_mach64_dma_mode_t;
0200
0201 typedef struct drm_mach64_init {
0202     enum {
0203         DRM_MACH64_INIT_DMA = 0x01,
0204         DRM_MACH64_CLEANUP_DMA = 0x02
0205     } func;
0206
0207     unsigned long sarea_priv_offset;
0208     int is_pci;
0209     drm_mach64_dma_mode_t dma_mode;
0210
0211     unsigned int fb_bpp;
0212     unsigned int front_offset, front_pitch;
0213     unsigned int back_offset, back_pitch;
0214
0215     unsigned int depth_bpp;
0216     unsigned int depth_offset, depth_pitch;
0217
0218     unsigned long fb_offset;
0219     unsigned long mmio_offset;
0220     unsigned long ring_offset;
0221     unsigned long buffers_offset;
0222     unsigned long agp_textures_offset;
0223 } drm_mach64_init_t;
0224
0225 typedef struct drm_mach64_clear {
0226     unsigned int flags;
0227     int x, y, w, h;
0228     unsigned int clear_color;
0229     unsigned int clear_depth;
0230 } drm_mach64_clear_t;
0231
0232 typedef struct drm_mach64_vertex {
0233     int prim;
0234     void *buf;      /* Address of vertex buffer */
0235     unsigned long used; /* Number of bytes in buffer */
0236     int discard;        /* Client finished with buffer? */
0237 } drm_mach64_vertex_t;
0238
0239 typedef struct drm_mach64_blit {
0240     void *buf;
0241     int pitch;
0242     int offset;
0243     int format;
0244     unsigned short x, y;
0245     unsigned short width, height;
0246 } drm_mach64_blit_t;
0247
0248 typedef struct drm_mach64_getparam {
0249     enum {
0250         MACH64_PARAM_FRAMES_QUEUED = 0x01,
0251         MACH64_PARAM_IRQ_NR = 0x02
0252     } param;
0253     void *value;
0254 } drm_mach64_getparam_t;
0255
0256 #endif