Back to home page

EIC code displayed by LXR

 
 

    


File indexing completed on 2026-09-28 09:17:34

0001 /*
0002  * Header for the Direct Rendering Manager
0003  *
0004  * Author: Rickard E. (Rik) Faith <faith@valinux.com>
0005  *
0006  * Acknowledgments:
0007  * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic cmpxchg.
0008  */
0009 
0010 /*
0011  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
0012  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
0013  * All rights reserved.
0014  *
0015  * Permission is hereby granted, free of charge, to any person obtaining a
0016  * copy of this software and associated documentation files (the "Software"),
0017  * to deal in the Software without restriction, including without limitation
0018  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
0019  * and/or sell copies of the Software, and to permit persons to whom the
0020  * Software is furnished to do so, subject to the following conditions:
0021  *
0022  * The above copyright notice and this permission notice (including the next
0023  * paragraph) shall be included in all copies or substantial portions of the
0024  * Software.
0025  *
0026  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
0027  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
0028  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
0029  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
0030  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
0031  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
0032  * OTHER DEALINGS IN THE SOFTWARE.
0033  */
0034 
0035 #ifndef _DRM_H_
0036 #define _DRM_H_
0037 
0038 #if   defined(__linux__)
0039 
0040 #include <linux/types.h>
0041 #include <asm/ioctl.h>
0042 typedef unsigned int drm_handle_t;
0043 
0044 #else /* One of the BSDs */
0045 
0046 #include <stdint.h>
0047 #include <sys/ioccom.h>
0048 #include <sys/types.h>
0049 typedef int8_t   __s8;
0050 typedef uint8_t  __u8;
0051 typedef int16_t  __s16;
0052 typedef uint16_t __u16;
0053 typedef int32_t  __s32;
0054 typedef uint32_t __u32;
0055 typedef int64_t  __s64;
0056 typedef uint64_t __u64;
0057 typedef size_t   __kernel_size_t;
0058 typedef unsigned long drm_handle_t;
0059 
0060 #endif
0061 
0062 #if defined(__cplusplus)
0063 extern "C" {
0064 #endif
0065 
0066 #define DRM_NAME    "drm"     /**< Name in kernel, /dev, and /proc */
0067 #define DRM_MIN_ORDER   5     /**< At least 2^5 bytes = 32 bytes */
0068 #define DRM_MAX_ORDER   22    /**< Up to 2^22 bytes = 4MB */
0069 #define DRM_RAM_PERCENT 10    /**< How much system ram can we lock? */
0070 
0071 #define _DRM_LOCK_HELD  0x80000000U /**< Hardware lock is held */
0072 #define _DRM_LOCK_CONT  0x40000000U /**< Hardware lock is contended */
0073 #define _DRM_LOCK_IS_HELD(lock)    ((lock) & _DRM_LOCK_HELD)
0074 #define _DRM_LOCK_IS_CONT(lock)    ((lock) & _DRM_LOCK_CONT)
0075 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
0076 
0077 typedef unsigned int drm_context_t;
0078 typedef unsigned int drm_drawable_t;
0079 typedef unsigned int drm_magic_t;
0080 
0081 /*
0082  * Cliprect.
0083  *
0084  * \warning: If you change this structure, make sure you change
0085  * XF86DRIClipRectRec in the server as well
0086  *
0087  * \note KW: Actually it's illegal to change either for
0088  * backwards-compatibility reasons.
0089  */
0090 struct drm_clip_rect {
0091     unsigned short x1;
0092     unsigned short y1;
0093     unsigned short x2;
0094     unsigned short y2;
0095 };
0096 
0097 /*
0098  * Drawable information.
0099  */
0100 struct drm_drawable_info {
0101     unsigned int num_rects;
0102     struct drm_clip_rect *rects;
0103 };
0104 
0105 /*
0106  * Texture region,
0107  */
0108 struct drm_tex_region {
0109     unsigned char next;
0110     unsigned char prev;
0111     unsigned char in_use;
0112     unsigned char padding;
0113     unsigned int age;
0114 };
0115 
0116 /*
0117  * Hardware lock.
0118  *
0119  * The lock structure is a simple cache-line aligned integer.  To avoid
0120  * processor bus contention on a multiprocessor system, there should not be any
0121  * other data stored in the same cache line.
0122  */
0123 struct drm_hw_lock {
0124     __volatile__ unsigned int lock;     /**< lock variable */
0125     char padding[60];           /**< Pad to cache line */
0126 };
0127 
0128 /*
0129  * DRM_IOCTL_VERSION ioctl argument type.
0130  *
0131  * \sa drmGetVersion().
0132  */
0133 struct drm_version {
0134     int version_major;    /**< Major version */
0135     int version_minor;    /**< Minor version */
0136     int version_patchlevel;   /**< Patch level */
0137     __kernel_size_t name_len;     /**< Length of name buffer */
0138     char *name;   /**< Name of driver */
0139     __kernel_size_t date_len;     /**< Length of date buffer */
0140     char *date;   /**< User-space buffer to hold date */
0141     __kernel_size_t desc_len;     /**< Length of desc buffer */
0142     char *desc;   /**< User-space buffer to hold desc */
0143 };
0144 
0145 /*
0146  * DRM_IOCTL_GET_UNIQUE ioctl argument type.
0147  *
0148  * \sa drmGetBusid() and drmSetBusId().
0149  */
0150 struct drm_unique {
0151     __kernel_size_t unique_len;   /**< Length of unique */
0152     char *unique;     /**< Unique name for driver instantiation */
0153 };
0154 
0155 struct drm_list {
0156     int count;        /**< Length of user-space structures */
0157     struct drm_version *version;
0158 };
0159 
0160 struct drm_block {
0161     int unused;
0162 };
0163 
0164 /*
0165  * DRM_IOCTL_CONTROL ioctl argument type.
0166  *
0167  * \sa drmCtlInstHandler() and drmCtlUninstHandler().
0168  */
0169 struct drm_control {
0170     enum {
0171         DRM_ADD_COMMAND,
0172         DRM_RM_COMMAND,
0173         DRM_INST_HANDLER,
0174         DRM_UNINST_HANDLER
0175     } func;
0176     int irq;
0177 };
0178 
0179 /*
0180  * Type of memory to map.
0181  */
0182 enum drm_map_type {
0183     _DRM_FRAME_BUFFER = 0,    /**< WC (no caching), no core dump */
0184     _DRM_REGISTERS = 1,   /**< no caching, no core dump */
0185     _DRM_SHM = 2,         /**< shared, cached */
0186     _DRM_AGP = 3,         /**< AGP/GART */
0187     _DRM_SCATTER_GATHER = 4,  /**< Scatter/gather memory for PCI DMA */
0188     _DRM_CONSISTENT = 5   /**< Consistent memory for PCI DMA */
0189 };
0190 
0191 /*
0192  * Memory mapping flags.
0193  */
0194 enum drm_map_flags {
0195     _DRM_RESTRICTED = 0x01,      /**< Cannot be mapped to user-virtual */
0196     _DRM_READ_ONLY = 0x02,
0197     _DRM_LOCKED = 0x04,      /**< shared, cached, locked */
0198     _DRM_KERNEL = 0x08,      /**< kernel requires access */
0199     _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
0200     _DRM_CONTAINS_LOCK = 0x20,   /**< SHM page that contains lock */
0201     _DRM_REMOVABLE = 0x40,       /**< Removable mapping */
0202     _DRM_DRIVER = 0x80       /**< Managed by driver */
0203 };
0204 
0205 struct drm_ctx_priv_map {
0206     unsigned int ctx_id;     /**< Context requesting private mapping */
0207     void *handle;        /**< Handle of map */
0208 };
0209 
0210 /*
0211  * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
0212  * argument type.
0213  *
0214  * \sa drmAddMap().
0215  */
0216 struct drm_map {
0217     unsigned long offset;    /**< Requested physical address (0 for SAREA)*/
0218     unsigned long size;  /**< Requested physical size (bytes) */
0219     enum drm_map_type type;  /**< Type of memory to map */
0220     enum drm_map_flags flags;    /**< Flags */
0221     void *handle;        /**< User-space: "Handle" to pass to mmap() */
0222                  /**< Kernel-space: kernel-virtual address */
0223     int mtrr;        /**< MTRR slot used */
0224     /*   Private data */
0225 };
0226 
0227 /*
0228  * DRM_IOCTL_GET_CLIENT ioctl argument type.
0229  */
0230 struct drm_client {
0231     int idx;        /**< Which client desired? */
0232     int auth;       /**< Is client authenticated? */
0233     unsigned long pid;  /**< Process ID */
0234     unsigned long uid;  /**< User ID */
0235     unsigned long magic;    /**< Magic */
0236     unsigned long iocs; /**< Ioctl count */
0237 };
0238 
0239 enum drm_stat_type {
0240     _DRM_STAT_LOCK,
0241     _DRM_STAT_OPENS,
0242     _DRM_STAT_CLOSES,
0243     _DRM_STAT_IOCTLS,
0244     _DRM_STAT_LOCKS,
0245     _DRM_STAT_UNLOCKS,
0246     _DRM_STAT_VALUE,    /**< Generic value */
0247     _DRM_STAT_BYTE,     /**< Generic byte counter (1024bytes/K) */
0248     _DRM_STAT_COUNT,    /**< Generic non-byte counter (1000/k) */
0249 
0250     _DRM_STAT_IRQ,      /**< IRQ */
0251     _DRM_STAT_PRIMARY,  /**< Primary DMA bytes */
0252     _DRM_STAT_SECONDARY,    /**< Secondary DMA bytes */
0253     _DRM_STAT_DMA,      /**< DMA */
0254     _DRM_STAT_SPECIAL,  /**< Special DMA (e.g., priority or polled) */
0255     _DRM_STAT_MISSED    /**< Missed DMA opportunity */
0256         /* Add to the *END* of the list */
0257 };
0258 
0259 /*
0260  * DRM_IOCTL_GET_STATS ioctl argument type.
0261  */
0262 struct drm_stats {
0263     unsigned long count;
0264     struct {
0265         unsigned long value;
0266         enum drm_stat_type type;
0267     } data[15];
0268 };
0269 
0270 /*
0271  * Hardware locking flags.
0272  */
0273 enum drm_lock_flags {
0274     _DRM_LOCK_READY = 0x01,      /**< Wait until hardware is ready for DMA */
0275     _DRM_LOCK_QUIESCENT = 0x02,  /**< Wait until hardware quiescent */
0276     _DRM_LOCK_FLUSH = 0x04,      /**< Flush this context's DMA queue first */
0277     _DRM_LOCK_FLUSH_ALL = 0x08,  /**< Flush all DMA queues first */
0278     /* These *HALT* flags aren't supported yet
0279        -- they will be used to support the
0280        full-screen DGA-like mode. */
0281     _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
0282     _DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
0283 };
0284 
0285 /*
0286  * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
0287  *
0288  * \sa drmGetLock() and drmUnlock().
0289  */
0290 struct drm_lock {
0291     int context;
0292     enum drm_lock_flags flags;
0293 };
0294 
0295 /*
0296  * DMA flags
0297  *
0298  * \warning
0299  * These values \e must match xf86drm.h.
0300  *
0301  * \sa drm_dma.
0302  */
0303 enum drm_dma_flags {
0304     /* Flags for DMA buffer dispatch */
0305     _DRM_DMA_BLOCK = 0x01,        /**<
0306                        * Block until buffer dispatched.
0307                        *
0308                        * \note The buffer may not yet have
0309                        * been processed by the hardware --
0310                        * getting a hardware lock with the
0311                        * hardware quiescent will ensure
0312                        * that the buffer has been
0313                        * processed.
0314                        */
0315     _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
0316     _DRM_DMA_PRIORITY = 0x04,     /**< High priority dispatch */
0317 
0318     /* Flags for DMA buffer request */
0319     _DRM_DMA_WAIT = 0x10,         /**< Wait for free buffers */
0320     _DRM_DMA_SMALLER_OK = 0x20,   /**< Smaller-than-requested buffers OK */
0321     _DRM_DMA_LARGER_OK = 0x40     /**< Larger-than-requested buffers OK */
0322 };
0323 
0324 /*
0325  * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
0326  *
0327  * \sa drmAddBufs().
0328  */
0329 struct drm_buf_desc {
0330     int count;       /**< Number of buffers of this size */
0331     int size;        /**< Size in bytes */
0332     int low_mark;        /**< Low water mark */
0333     int high_mark;       /**< High water mark */
0334     enum {
0335         _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
0336         _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
0337         _DRM_SG_BUFFER = 0x04,  /**< Scatter/gather memory buffer */
0338         _DRM_FB_BUFFER = 0x08,  /**< Buffer is in frame buffer */
0339         _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */
0340     } flags;
0341     unsigned long agp_start; /**<
0342                   * Start address of where the AGP buffers are
0343                   * in the AGP aperture
0344                   */
0345 };
0346 
0347 /*
0348  * DRM_IOCTL_INFO_BUFS ioctl argument type.
0349  */
0350 struct drm_buf_info {
0351     int count;      /**< Entries in list */
0352     struct drm_buf_desc *list;
0353 };
0354 
0355 /*
0356  * DRM_IOCTL_FREE_BUFS ioctl argument type.
0357  */
0358 struct drm_buf_free {
0359     int count;
0360     int *list;
0361 };
0362 
0363 /*
0364  * Buffer information
0365  *
0366  * \sa drm_buf_map.
0367  */
0368 struct drm_buf_pub {
0369     int idx;               /**< Index into the master buffer list */
0370     int total;             /**< Buffer size */
0371     int used;              /**< Amount of buffer in use (for DMA) */
0372     void *address;         /**< Address of buffer */
0373 };
0374 
0375 /*
0376  * DRM_IOCTL_MAP_BUFS ioctl argument type.
0377  */
0378 struct drm_buf_map {
0379     int count;      /**< Length of the buffer list */
0380 #ifdef __cplusplus
0381     void *virt;
0382 #else
0383     void *virtual;      /**< Mmap'd area in user-virtual */
0384 #endif
0385     struct drm_buf_pub *list;   /**< Buffer information */
0386 };
0387 
0388 /*
0389  * DRM_IOCTL_DMA ioctl argument type.
0390  *
0391  * Indices here refer to the offset into the buffer list in drm_buf_get.
0392  *
0393  * \sa drmDMA().
0394  */
0395 struct drm_dma {
0396     int context;              /**< Context handle */
0397     int send_count;           /**< Number of buffers to send */
0398     int *send_indices;    /**< List of handles to buffers */
0399     int *send_sizes;          /**< Lengths of data to send */
0400     enum drm_dma_flags flags;     /**< Flags */
0401     int request_count;        /**< Number of buffers requested */
0402     int request_size;         /**< Desired size for buffers */
0403     int *request_indices;     /**< Buffer information */
0404     int *request_sizes;
0405     int granted_count;        /**< Number of buffers granted */
0406 };
0407 
0408 enum drm_ctx_flags {
0409     _DRM_CONTEXT_PRESERVED = 0x01,
0410     _DRM_CONTEXT_2DONLY = 0x02
0411 };
0412 
0413 /*
0414  * DRM_IOCTL_ADD_CTX ioctl argument type.
0415  *
0416  * \sa drmCreateContext() and drmDestroyContext().
0417  */
0418 struct drm_ctx {
0419     drm_context_t handle;
0420     enum drm_ctx_flags flags;
0421 };
0422 
0423 /*
0424  * DRM_IOCTL_RES_CTX ioctl argument type.
0425  */
0426 struct drm_ctx_res {
0427     int count;
0428     struct drm_ctx *contexts;
0429 };
0430 
0431 /*
0432  * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
0433  */
0434 struct drm_draw {
0435     drm_drawable_t handle;
0436 };
0437 
0438 /*
0439  * DRM_IOCTL_UPDATE_DRAW ioctl argument type.
0440  */
0441 typedef enum {
0442     DRM_DRAWABLE_CLIPRECTS
0443 } drm_drawable_info_type_t;
0444 
0445 struct drm_update_draw {
0446     drm_drawable_t handle;
0447     unsigned int type;
0448     unsigned int num;
0449     unsigned long long data;
0450 };
0451 
0452 /*
0453  * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
0454  */
0455 struct drm_auth {
0456     drm_magic_t magic;
0457 };
0458 
0459 /*
0460  * DRM_IOCTL_IRQ_BUSID ioctl argument type.
0461  *
0462  * \sa drmGetInterruptFromBusID().
0463  */
0464 struct drm_irq_busid {
0465     int irq;    /**< IRQ number */
0466     int busnum; /**< bus number */
0467     int devnum; /**< device number */
0468     int funcnum;    /**< function number */
0469 };
0470 
0471 enum drm_vblank_seq_type {
0472     _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
0473     _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
0474     /* bits 1-6 are reserved for high crtcs */
0475     _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e,
0476     _DRM_VBLANK_EVENT = 0x4000000,   /**< Send event instead of blocking */
0477     _DRM_VBLANK_FLIP = 0x8000000,   /**< Scheduled buffer swap should flip */
0478     _DRM_VBLANK_NEXTONMISS = 0x10000000,    /**< If missed, wait for next vblank */
0479     _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */
0480     _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */
0481 };
0482 #define _DRM_VBLANK_HIGH_CRTC_SHIFT 1
0483 
0484 #define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE)
0485 #define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \
0486                 _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)
0487 
0488 struct drm_wait_vblank_request {
0489     enum drm_vblank_seq_type type;
0490     unsigned int sequence;
0491     unsigned long signal;
0492 };
0493 
0494 struct drm_wait_vblank_reply {
0495     enum drm_vblank_seq_type type;
0496     unsigned int sequence;
0497     long tval_sec;
0498     long tval_usec;
0499 };
0500 
0501 /*
0502  * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
0503  *
0504  * \sa drmWaitVBlank().
0505  */
0506 union drm_wait_vblank {
0507     struct drm_wait_vblank_request request;
0508     struct drm_wait_vblank_reply reply;
0509 };
0510 
0511 #define _DRM_PRE_MODESET 1
0512 #define _DRM_POST_MODESET 2
0513 
0514 /*
0515  * DRM_IOCTL_MODESET_CTL ioctl argument type
0516  *
0517  * \sa drmModesetCtl().
0518  */
0519 struct drm_modeset_ctl {
0520     __u32 crtc;
0521     __u32 cmd;
0522 };
0523 
0524 /*
0525  * DRM_IOCTL_AGP_ENABLE ioctl argument type.
0526  *
0527  * \sa drmAgpEnable().
0528  */
0529 struct drm_agp_mode {
0530     unsigned long mode; /**< AGP mode */
0531 };
0532 
0533 /*
0534  * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
0535  *
0536  * \sa drmAgpAlloc() and drmAgpFree().
0537  */
0538 struct drm_agp_buffer {
0539     unsigned long size; /**< In bytes -- will round to page boundary */
0540     unsigned long handle;   /**< Used for binding / unbinding */
0541     unsigned long type; /**< Type of memory to allocate */
0542     unsigned long physical; /**< Physical used by i810 */
0543 };
0544 
0545 /*
0546  * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
0547  *
0548  * \sa drmAgpBind() and drmAgpUnbind().
0549  */
0550 struct drm_agp_binding {
0551     unsigned long handle;   /**< From drm_agp_buffer */
0552     unsigned long offset;   /**< In bytes -- will round to page boundary */
0553 };
0554 
0555 /*
0556  * DRM_IOCTL_AGP_INFO ioctl argument type.
0557  *
0558  * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
0559  * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
0560  * drmAgpVendorId() and drmAgpDeviceId().
0561  */
0562 struct drm_agp_info {
0563     int agp_version_major;
0564     int agp_version_minor;
0565     unsigned long mode;
0566     unsigned long aperture_base;    /* physical address */
0567     unsigned long aperture_size;    /* bytes */
0568     unsigned long memory_allowed;   /* bytes */
0569     unsigned long memory_used;
0570 
0571     /* PCI information */
0572     unsigned short id_vendor;
0573     unsigned short id_device;
0574 };
0575 
0576 /*
0577  * DRM_IOCTL_SG_ALLOC ioctl argument type.
0578  */
0579 struct drm_scatter_gather {
0580     unsigned long size; /**< In bytes -- will round to page boundary */
0581     unsigned long handle;   /**< Used for mapping / unmapping */
0582 };
0583 
0584 /*
0585  * DRM_IOCTL_SET_VERSION ioctl argument type.
0586  */
0587 struct drm_set_version {
0588     int drm_di_major;
0589     int drm_di_minor;
0590     int drm_dd_major;
0591     int drm_dd_minor;
0592 };
0593 
0594 /**
0595  * struct drm_gem_close - Argument for &DRM_IOCTL_GEM_CLOSE ioctl.
0596  * @handle: Handle of the object to be closed.
0597  * @pad: Padding.
0598  *
0599  * Releases the handle to an mm object.
0600  */
0601 struct drm_gem_close {
0602     __u32 handle;
0603     __u32 pad;
0604 };
0605 
0606 /**
0607  * struct drm_gem_flink - Argument for &DRM_IOCTL_GEM_FLINK ioctl.
0608  * @handle: Handle for the object being named.
0609  * @name: Returned global name.
0610  *
0611  * Create a global name for an object, returning the name.
0612  *
0613  * Note that the name does not hold a reference; when the object
0614  * is freed, the name goes away.
0615  */
0616 struct drm_gem_flink {
0617     __u32 handle;
0618     __u32 name;
0619 };
0620 
0621 /**
0622  * struct drm_gem_open - Argument for &DRM_IOCTL_GEM_OPEN ioctl.
0623  * @name: Name of object being opened.
0624  * @handle: Returned handle for the object.
0625  * @size: Returned size of the object
0626  *
0627  * Open an object using the global name, returning a handle and the size.
0628  *
0629  * This handle (of course) holds a reference to the object, so the object
0630  * will not go away until the handle is deleted.
0631  */
0632 struct drm_gem_open {
0633     __u32 name;
0634     __u32 handle;
0635     __u64 size;
0636 };
0637 
0638 /**
0639  * struct drm_gem_change_handle - Argument for &DRM_IOCTL_GEM_CHANGE_HANDLE ioctl.
0640  * @handle: The handle of a gem object.
0641  * @new_handle: An available gem handle.
0642  *
0643  * This ioctl changes the handle of a GEM object to the specified one.
0644  * The new handle must be unused. On success the old handle is closed
0645  * and all further IOCTL should refer to the new handle only.
0646  * Calls to DRM_IOCTL_PRIME_FD_TO_HANDLE will return the new handle.
0647  */
0648 struct drm_gem_change_handle {
0649     __u32 handle;
0650     __u32 new_handle;
0651 };
0652 
0653 /**
0654  * DRM_CAP_DUMB_BUFFER
0655  *
0656  * If set to 1, the driver supports creating dumb buffers via the
0657  * &DRM_IOCTL_MODE_CREATE_DUMB ioctl.
0658  */
0659 #define DRM_CAP_DUMB_BUFFER     0x1
0660 /**
0661  * DRM_CAP_VBLANK_HIGH_CRTC
0662  *
0663  * If set to 1, the kernel supports specifying a :ref:`CRTC index<crtc_index>`
0664  * in the high bits of &drm_wait_vblank_request.type.
0665  *
0666  * Starting kernel version 2.6.39, this capability is always set to 1.
0667  */
0668 #define DRM_CAP_VBLANK_HIGH_CRTC    0x2
0669 /**
0670  * DRM_CAP_DUMB_PREFERRED_DEPTH
0671  *
0672  * The preferred bit depth for dumb buffers.
0673  *
0674  * The bit depth is the number of bits used to indicate the color of a single
0675  * pixel excluding any padding. This is different from the number of bits per
0676  * pixel. For instance, XRGB8888 has a bit depth of 24 but has 32 bits per
0677  * pixel.
0678  *
0679  * Note that this preference only applies to dumb buffers, it's irrelevant for
0680  * other types of buffers.
0681  */
0682 #define DRM_CAP_DUMB_PREFERRED_DEPTH    0x3
0683 /**
0684  * DRM_CAP_DUMB_PREFER_SHADOW
0685  *
0686  * If set to 1, the driver prefers userspace to render to a shadow buffer
0687  * instead of directly rendering to a dumb buffer. For best speed, userspace
0688  * should do streaming ordered memory copies into the dumb buffer and never
0689  * read from it.
0690  *
0691  * Note that this preference only applies to dumb buffers, it's irrelevant for
0692  * other types of buffers.
0693  */
0694 #define DRM_CAP_DUMB_PREFER_SHADOW  0x4
0695 /**
0696  * DRM_CAP_PRIME
0697  *
0698  * Bitfield of supported PRIME sharing capabilities. See &DRM_PRIME_CAP_IMPORT
0699  * and &DRM_PRIME_CAP_EXPORT.
0700  *
0701  * Starting from kernel version 6.6, both &DRM_PRIME_CAP_IMPORT and
0702  * &DRM_PRIME_CAP_EXPORT are always advertised.
0703  *
0704  * PRIME buffers are exposed as dma-buf file descriptors.
0705  * See :ref:`prime_buffer_sharing`.
0706  */
0707 #define DRM_CAP_PRIME           0x5
0708 /**
0709  * DRM_PRIME_CAP_IMPORT
0710  *
0711  * If this bit is set in &DRM_CAP_PRIME, the driver supports importing PRIME
0712  * buffers via the &DRM_IOCTL_PRIME_FD_TO_HANDLE ioctl.
0713  *
0714  * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME.
0715  */
0716 #define  DRM_PRIME_CAP_IMPORT       0x1
0717 /**
0718  * DRM_PRIME_CAP_EXPORT
0719  *
0720  * If this bit is set in &DRM_CAP_PRIME, the driver supports exporting PRIME
0721  * buffers via the &DRM_IOCTL_PRIME_HANDLE_TO_FD ioctl.
0722  *
0723  * Starting from kernel version 6.6, this bit is always set in &DRM_CAP_PRIME.
0724  */
0725 #define  DRM_PRIME_CAP_EXPORT       0x2
0726 /**
0727  * DRM_CAP_TIMESTAMP_MONOTONIC
0728  *
0729  * If set to 0, the kernel will report timestamps with ``CLOCK_REALTIME`` in
0730  * struct drm_event_vblank. If set to 1, the kernel will report timestamps with
0731  * ``CLOCK_MONOTONIC``. See ``clock_gettime(2)`` for the definition of these
0732  * clocks.
0733  *
0734  * Starting from kernel version 2.6.39, the default value for this capability
0735  * is 1. Starting kernel version 4.15, this capability is always set to 1.
0736  */
0737 #define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
0738 /**
0739  * DRM_CAP_ASYNC_PAGE_FLIP
0740  *
0741  * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for legacy
0742  * page-flips.
0743  */
0744 #define DRM_CAP_ASYNC_PAGE_FLIP     0x7
0745 /**
0746  * DRM_CAP_CURSOR_WIDTH
0747  *
0748  * The ``CURSOR_WIDTH`` and ``CURSOR_HEIGHT`` capabilities return a valid
0749  * width x height combination for the hardware cursor. The intention is that a
0750  * hardware agnostic userspace can query a cursor plane size to use.
0751  *
0752  * Note that the cross-driver contract is to merely return a valid size;
0753  * drivers are free to attach another meaning on top, eg. i915 returns the
0754  * maximum plane size.
0755  */
0756 #define DRM_CAP_CURSOR_WIDTH        0x8
0757 /**
0758  * DRM_CAP_CURSOR_HEIGHT
0759  *
0760  * See &DRM_CAP_CURSOR_WIDTH.
0761  */
0762 #define DRM_CAP_CURSOR_HEIGHT       0x9
0763 /**
0764  * DRM_CAP_ADDFB2_MODIFIERS
0765  *
0766  * If set to 1, the driver supports supplying modifiers in the
0767  * &DRM_IOCTL_MODE_ADDFB2 ioctl.
0768  */
0769 #define DRM_CAP_ADDFB2_MODIFIERS    0x10
0770 /**
0771  * DRM_CAP_PAGE_FLIP_TARGET
0772  *
0773  * If set to 1, the driver supports the &DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE and
0774  * &DRM_MODE_PAGE_FLIP_TARGET_RELATIVE flags in
0775  * &drm_mode_crtc_page_flip_target.flags for the &DRM_IOCTL_MODE_PAGE_FLIP
0776  * ioctl.
0777  */
0778 #define DRM_CAP_PAGE_FLIP_TARGET    0x11
0779 /**
0780  * DRM_CAP_CRTC_IN_VBLANK_EVENT
0781  *
0782  * If set to 1, the kernel supports reporting the CRTC ID in
0783  * &drm_event_vblank.crtc_id for the &DRM_EVENT_VBLANK and
0784  * &DRM_EVENT_FLIP_COMPLETE events.
0785  *
0786  * Starting kernel version 4.12, this capability is always set to 1.
0787  */
0788 #define DRM_CAP_CRTC_IN_VBLANK_EVENT    0x12
0789 /**
0790  * DRM_CAP_SYNCOBJ
0791  *
0792  * If set to 1, the driver supports sync objects. See :ref:`drm_sync_objects`.
0793  */
0794 #define DRM_CAP_SYNCOBJ     0x13
0795 /**
0796  * DRM_CAP_SYNCOBJ_TIMELINE
0797  *
0798  * If set to 1, the driver supports timeline operations on sync objects. See
0799  * :ref:`drm_sync_objects`.
0800  */
0801 #define DRM_CAP_SYNCOBJ_TIMELINE    0x14
0802 /**
0803  * DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP
0804  *
0805  * If set to 1, the driver supports &DRM_MODE_PAGE_FLIP_ASYNC for atomic
0806  * commits.
0807  */
0808 #define DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP  0x15
0809 
0810 /* DRM_IOCTL_GET_CAP ioctl argument type */
0811 struct drm_get_cap {
0812     __u64 capability;
0813     __u64 value;
0814 };
0815 
0816 /**
0817  * DRM_CLIENT_CAP_STEREO_3D
0818  *
0819  * If set to 1, the DRM core will expose the stereo 3D capabilities of the
0820  * monitor by advertising the supported 3D layouts in the flags of struct
0821  * drm_mode_modeinfo. See ``DRM_MODE_FLAG_3D_*``.
0822  *
0823  * This capability is always supported for all drivers starting from kernel
0824  * version 3.13.
0825  */
0826 #define DRM_CLIENT_CAP_STEREO_3D    1
0827 
0828 /**
0829  * DRM_CLIENT_CAP_UNIVERSAL_PLANES
0830  *
0831  * If set to 1, the DRM core will expose all planes (overlay, primary, and
0832  * cursor) to userspace.
0833  *
0834  * This capability has been introduced in kernel version 3.15. Starting from
0835  * kernel version 3.17, this capability is always supported for all drivers.
0836  */
0837 #define DRM_CLIENT_CAP_UNIVERSAL_PLANES  2
0838 
0839 /**
0840  * DRM_CLIENT_CAP_ATOMIC
0841  *
0842  * If set to 1, the DRM core will expose atomic properties to userspace. This
0843  * implicitly enables &DRM_CLIENT_CAP_UNIVERSAL_PLANES and
0844  * &DRM_CLIENT_CAP_ASPECT_RATIO.
0845  *
0846  * If the driver doesn't support atomic mode-setting, enabling this capability
0847  * will fail with -EOPNOTSUPP.
0848  *
0849  * This capability has been introduced in kernel version 4.0. Starting from
0850  * kernel version 4.2, this capability is always supported for atomic-capable
0851  * drivers.
0852  */
0853 #define DRM_CLIENT_CAP_ATOMIC   3
0854 
0855 /**
0856  * DRM_CLIENT_CAP_ASPECT_RATIO
0857  *
0858  * If set to 1, the DRM core will provide aspect ratio information in modes.
0859  * See ``DRM_MODE_FLAG_PIC_AR_*``.
0860  *
0861  * This capability is always supported for all drivers starting from kernel
0862  * version 4.18.
0863  */
0864 #define DRM_CLIENT_CAP_ASPECT_RATIO    4
0865 
0866 /**
0867  * DRM_CLIENT_CAP_WRITEBACK_CONNECTORS
0868  *
0869  * If set to 1, the DRM core will expose special connectors to be used for
0870  * writing back to memory the scene setup in the commit. The client must enable
0871  * &DRM_CLIENT_CAP_ATOMIC first.
0872  *
0873  * This capability is always supported for atomic-capable drivers starting from
0874  * kernel version 4.19.
0875  */
0876 #define DRM_CLIENT_CAP_WRITEBACK_CONNECTORS 5
0877 
0878 /**
0879  * DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT
0880  *
0881  * Drivers for para-virtualized hardware (e.g. vmwgfx, qxl, virtio and
0882  * virtualbox) have additional restrictions for cursor planes (thus
0883  * making cursor planes on those drivers not truly universal,) e.g.
0884  * they need cursor planes to act like one would expect from a mouse
0885  * cursor and have correctly set hotspot properties.
0886  * If this client cap is not set the DRM core will hide cursor plane on
0887  * those virtualized drivers because not setting it implies that the
0888  * client is not capable of dealing with those extra restictions.
0889  * Clients which do set cursor hotspot and treat the cursor plane
0890  * like a mouse cursor should set this property.
0891  * The client must enable &DRM_CLIENT_CAP_ATOMIC first.
0892  *
0893  * Setting this property on drivers which do not special case
0894  * cursor planes (i.e. non-virtualized drivers) will return
0895  * EOPNOTSUPP, which can be used by userspace to gauge
0896  * requirements of the hardware/drivers they're running on.
0897  *
0898  * This capability is always supported for atomic-capable virtualized
0899  * drivers starting from kernel version 6.6.
0900  */
0901 #define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6
0902 
0903 /**
0904  * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE
0905  *
0906  * If set to 1 the DRM core will allow setting the COLOR_PIPELINE
0907  * property on a &drm_plane, as well as drm_colorop properties.
0908  *
0909  * Setting of these plane properties will be rejected when this client
0910  * cap is set:
0911  * - COLOR_ENCODING
0912  * - COLOR_RANGE
0913  *
0914  * The client must enable &DRM_CLIENT_CAP_ATOMIC first.
0915  */
0916 #define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7
0917 
0918 /* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
0919 struct drm_set_client_cap {
0920     __u64 capability;
0921     __u64 value;
0922 };
0923 
0924 #define DRM_RDWR O_RDWR
0925 #define DRM_CLOEXEC O_CLOEXEC
0926 struct drm_prime_handle {
0927     __u32 handle;
0928 
0929     /** Flags.. only applicable for handle->fd */
0930     __u32 flags;
0931 
0932     /** Returned dmabuf file descriptor */
0933     __s32 fd;
0934 };
0935 
0936 struct drm_syncobj_create {
0937     __u32 handle;
0938 #define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0)
0939     __u32 flags;
0940 };
0941 
0942 struct drm_syncobj_destroy {
0943     __u32 handle;
0944     __u32 pad;
0945 };
0946 
0947 #define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
0948 #define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_TIMELINE         (1 << 1)
0949 #define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
0950 #define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_TIMELINE         (1 << 1)
0951 struct drm_syncobj_handle {
0952     __u32 handle;
0953     __u32 flags;
0954 
0955     __s32 fd;
0956     __u32 pad;
0957 
0958     __u64 point;
0959 };
0960 
0961 struct drm_syncobj_transfer {
0962     __u32 src_handle;
0963     __u32 dst_handle;
0964     __u64 src_point;
0965     __u64 dst_point;
0966     __u32 flags;
0967     __u32 pad;
0968 };
0969 
0970 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
0971 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
0972 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE (1 << 2) /* wait for time point to become available */
0973 #define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE (1 << 3) /* set fence deadline to deadline_nsec */
0974 struct drm_syncobj_wait {
0975     __u64 handles;
0976     /* absolute timeout */
0977     __s64 timeout_nsec;
0978     __u32 count_handles;
0979     __u32 flags;
0980     __u32 first_signaled; /* only valid when not waiting all */
0981     __u32 pad;
0982     /**
0983      * @deadline_nsec - fence deadline hint
0984      *
0985      * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing
0986      * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is
0987      * set.
0988      */
0989     __u64 deadline_nsec;
0990 };
0991 
0992 struct drm_syncobj_timeline_wait {
0993     __u64 handles;
0994     /* wait on specific timeline point for every handles*/
0995     __u64 points;
0996     /* absolute timeout */
0997     __s64 timeout_nsec;
0998     __u32 count_handles;
0999     __u32 flags;
1000     __u32 first_signaled; /* only valid when not waiting all */
1001     __u32 pad;
1002     /**
1003      * @deadline_nsec - fence deadline hint
1004      *
1005      * Deadline hint, in absolute CLOCK_MONOTONIC, to set on backing
1006      * fence(s) if the DRM_SYNCOBJ_WAIT_FLAGS_WAIT_DEADLINE flag is
1007      * set.
1008      */
1009     __u64 deadline_nsec;
1010 };
1011 
1012 /**
1013  * struct drm_syncobj_eventfd
1014  * @handle: syncobj handle.
1015  * @flags: Zero to wait for the point to be signalled, or
1016  *         &DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE to wait for a fence to be
1017  *         available for the point.
1018  * @point: syncobj timeline point (set to zero for binary syncobjs).
1019  * @fd: Existing eventfd to sent events to.
1020  * @pad: Must be zero.
1021  *
1022  * Register an eventfd to be signalled by a syncobj. The eventfd counter will
1023  * be incremented by one.
1024  */
1025 struct drm_syncobj_eventfd {
1026     __u32 handle;
1027     __u32 flags;
1028     __u64 point;
1029     __s32 fd;
1030     __u32 pad;
1031 };
1032 
1033 
1034 struct drm_syncobj_array {
1035     __u64 handles;
1036     __u32 count_handles;
1037     __u32 pad;
1038 };
1039 
1040 #define DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED (1 << 0) /* last available point on timeline syncobj */
1041 struct drm_syncobj_timeline_array {
1042     __u64 handles;
1043     __u64 points;
1044     __u32 count_handles;
1045     __u32 flags;
1046 };
1047 
1048 
1049 /* Query current scanout sequence number */
1050 struct drm_crtc_get_sequence {
1051     __u32 crtc_id;      /* requested crtc_id */
1052     __u32 active;       /* return: crtc output is active */
1053     __u64 sequence;     /* return: most recent vblank sequence */
1054     __s64 sequence_ns;  /* return: most recent time of first pixel out */
1055 };
1056 
1057 /* Queue event to be delivered at specified sequence. Time stamp marks
1058  * when the first pixel of the refresh cycle leaves the display engine
1059  * for the display
1060  */
1061 #define DRM_CRTC_SEQUENCE_RELATIVE      0x00000001  /* sequence is relative to current */
1062 #define DRM_CRTC_SEQUENCE_NEXT_ON_MISS      0x00000002  /* Use next sequence if we've missed */
1063 
1064 struct drm_crtc_queue_sequence {
1065     __u32 crtc_id;
1066     __u32 flags;
1067     __u64 sequence;     /* on input, target sequence. on output, actual sequence */
1068     __u64 user_data;    /* user data passed to event */
1069 };
1070 
1071 #define DRM_CLIENT_NAME_MAX_LEN     64
1072 struct drm_set_client_name {
1073     __u64 name_len;
1074     __u64 name;
1075 };
1076 
1077 
1078 #if defined(__cplusplus)
1079 }
1080 #endif
1081 
1082 #include "drm_mode.h"
1083 
1084 #if defined(__cplusplus)
1085 extern "C" {
1086 #endif
1087 
1088 #define DRM_IOCTL_BASE          'd'
1089 #define DRM_IO(nr)          _IO(DRM_IOCTL_BASE,nr)
1090 #define DRM_IOR(nr,type)        _IOR(DRM_IOCTL_BASE,nr,type)
1091 #define DRM_IOW(nr,type)        _IOW(DRM_IOCTL_BASE,nr,type)
1092 #define DRM_IOWR(nr,type)       _IOWR(DRM_IOCTL_BASE,nr,type)
1093 
1094 #define DRM_IOCTL_VERSION       DRM_IOWR(0x00, struct drm_version)
1095 #define DRM_IOCTL_GET_UNIQUE        DRM_IOWR(0x01, struct drm_unique)
1096 #define DRM_IOCTL_GET_MAGIC     DRM_IOR( 0x02, struct drm_auth)
1097 #define DRM_IOCTL_IRQ_BUSID     DRM_IOWR(0x03, struct drm_irq_busid)
1098 #define DRM_IOCTL_GET_MAP               DRM_IOWR(0x04, struct drm_map)
1099 #define DRM_IOCTL_GET_CLIENT            DRM_IOWR(0x05, struct drm_client)
1100 #define DRM_IOCTL_GET_STATS             DRM_IOR( 0x06, struct drm_stats)
1101 #define DRM_IOCTL_SET_VERSION       DRM_IOWR(0x07, struct drm_set_version)
1102 #define DRM_IOCTL_MODESET_CTL           DRM_IOW(0x08, struct drm_modeset_ctl)
1103 /**
1104  * DRM_IOCTL_GEM_CLOSE - Close a GEM handle.
1105  *
1106  * GEM handles are not reference-counted by the kernel. User-space is
1107  * responsible for managing their lifetime. For example, if user-space imports
1108  * the same memory object twice on the same DRM file description, the same GEM
1109  * handle is returned by both imports, and user-space needs to ensure
1110  * &DRM_IOCTL_GEM_CLOSE is performed once only. The same situation can happen
1111  * when a memory object is allocated, then exported and imported again on the
1112  * same DRM file description. The &DRM_IOCTL_MODE_GETFB2 IOCTL is an exception
1113  * and always returns fresh new GEM handles even if an existing GEM handle
1114  * already refers to the same memory object before the IOCTL is performed.
1115  */
1116 #define DRM_IOCTL_GEM_CLOSE     DRM_IOW (0x09, struct drm_gem_close)
1117 #define DRM_IOCTL_GEM_FLINK     DRM_IOWR(0x0a, struct drm_gem_flink)
1118 #define DRM_IOCTL_GEM_OPEN      DRM_IOWR(0x0b, struct drm_gem_open)
1119 #define DRM_IOCTL_GET_CAP       DRM_IOWR(0x0c, struct drm_get_cap)
1120 #define DRM_IOCTL_SET_CLIENT_CAP    DRM_IOW( 0x0d, struct drm_set_client_cap)
1121 
1122 #define DRM_IOCTL_SET_UNIQUE        DRM_IOW( 0x10, struct drm_unique)
1123 #define DRM_IOCTL_AUTH_MAGIC        DRM_IOW( 0x11, struct drm_auth)
1124 #define DRM_IOCTL_BLOCK         DRM_IOWR(0x12, struct drm_block)
1125 #define DRM_IOCTL_UNBLOCK       DRM_IOWR(0x13, struct drm_block)
1126 #define DRM_IOCTL_CONTROL       DRM_IOW( 0x14, struct drm_control)
1127 #define DRM_IOCTL_ADD_MAP       DRM_IOWR(0x15, struct drm_map)
1128 #define DRM_IOCTL_ADD_BUFS      DRM_IOWR(0x16, struct drm_buf_desc)
1129 #define DRM_IOCTL_MARK_BUFS     DRM_IOW( 0x17, struct drm_buf_desc)
1130 #define DRM_IOCTL_INFO_BUFS     DRM_IOWR(0x18, struct drm_buf_info)
1131 #define DRM_IOCTL_MAP_BUFS      DRM_IOWR(0x19, struct drm_buf_map)
1132 #define DRM_IOCTL_FREE_BUFS     DRM_IOW( 0x1a, struct drm_buf_free)
1133 
1134 #define DRM_IOCTL_RM_MAP        DRM_IOW( 0x1b, struct drm_map)
1135 
1136 #define DRM_IOCTL_SET_SAREA_CTX     DRM_IOW( 0x1c, struct drm_ctx_priv_map)
1137 #define DRM_IOCTL_GET_SAREA_CTX     DRM_IOWR(0x1d, struct drm_ctx_priv_map)
1138 
1139 #define DRM_IOCTL_SET_MASTER            DRM_IO(0x1e)
1140 #define DRM_IOCTL_DROP_MASTER           DRM_IO(0x1f)
1141 
1142 #define DRM_IOCTL_ADD_CTX       DRM_IOWR(0x20, struct drm_ctx)
1143 #define DRM_IOCTL_RM_CTX        DRM_IOWR(0x21, struct drm_ctx)
1144 #define DRM_IOCTL_MOD_CTX       DRM_IOW( 0x22, struct drm_ctx)
1145 #define DRM_IOCTL_GET_CTX       DRM_IOWR(0x23, struct drm_ctx)
1146 #define DRM_IOCTL_SWITCH_CTX        DRM_IOW( 0x24, struct drm_ctx)
1147 #define DRM_IOCTL_NEW_CTX       DRM_IOW( 0x25, struct drm_ctx)
1148 #define DRM_IOCTL_RES_CTX       DRM_IOWR(0x26, struct drm_ctx_res)
1149 #define DRM_IOCTL_ADD_DRAW      DRM_IOWR(0x27, struct drm_draw)
1150 #define DRM_IOCTL_RM_DRAW       DRM_IOWR(0x28, struct drm_draw)
1151 #define DRM_IOCTL_DMA           DRM_IOWR(0x29, struct drm_dma)
1152 #define DRM_IOCTL_LOCK          DRM_IOW( 0x2a, struct drm_lock)
1153 #define DRM_IOCTL_UNLOCK        DRM_IOW( 0x2b, struct drm_lock)
1154 #define DRM_IOCTL_FINISH        DRM_IOW( 0x2c, struct drm_lock)
1155 
1156 /**
1157  * DRM_IOCTL_PRIME_HANDLE_TO_FD - Convert a GEM handle to a DMA-BUF FD.
1158  *
1159  * User-space sets &drm_prime_handle.handle with the GEM handle to export and
1160  * &drm_prime_handle.flags, and gets back a DMA-BUF file descriptor in
1161  * &drm_prime_handle.fd.
1162  *
1163  * The export can fail for any driver-specific reason, e.g. because export is
1164  * not supported for this specific GEM handle (but might be for others).
1165  *
1166  * Support for exporting DMA-BUFs is advertised via &DRM_PRIME_CAP_EXPORT.
1167  */
1168 #define DRM_IOCTL_PRIME_HANDLE_TO_FD    DRM_IOWR(0x2d, struct drm_prime_handle)
1169 /**
1170  * DRM_IOCTL_PRIME_FD_TO_HANDLE - Convert a DMA-BUF FD to a GEM handle.
1171  *
1172  * User-space sets &drm_prime_handle.fd with a DMA-BUF file descriptor to
1173  * import, and gets back a GEM handle in &drm_prime_handle.handle.
1174  * &drm_prime_handle.flags is unused.
1175  *
1176  * If an existing GEM handle refers to the memory object backing the DMA-BUF,
1177  * that GEM handle is returned. Therefore user-space which needs to handle
1178  * arbitrary DMA-BUFs must have a user-space lookup data structure to manually
1179  * reference-count duplicated GEM handles. For more information see
1180  * &DRM_IOCTL_GEM_CLOSE.
1181  *
1182  * The import can fail for any driver-specific reason, e.g. because import is
1183  * only supported for DMA-BUFs allocated on this DRM device.
1184  *
1185  * Support for importing DMA-BUFs is advertised via &DRM_PRIME_CAP_IMPORT.
1186  */
1187 #define DRM_IOCTL_PRIME_FD_TO_HANDLE    DRM_IOWR(0x2e, struct drm_prime_handle)
1188 
1189 #define DRM_IOCTL_AGP_ACQUIRE       DRM_IO(  0x30)
1190 #define DRM_IOCTL_AGP_RELEASE       DRM_IO(  0x31)
1191 #define DRM_IOCTL_AGP_ENABLE        DRM_IOW( 0x32, struct drm_agp_mode)
1192 #define DRM_IOCTL_AGP_INFO      DRM_IOR( 0x33, struct drm_agp_info)
1193 #define DRM_IOCTL_AGP_ALLOC     DRM_IOWR(0x34, struct drm_agp_buffer)
1194 #define DRM_IOCTL_AGP_FREE      DRM_IOW( 0x35, struct drm_agp_buffer)
1195 #define DRM_IOCTL_AGP_BIND      DRM_IOW( 0x36, struct drm_agp_binding)
1196 #define DRM_IOCTL_AGP_UNBIND        DRM_IOW( 0x37, struct drm_agp_binding)
1197 
1198 #define DRM_IOCTL_SG_ALLOC      DRM_IOWR(0x38, struct drm_scatter_gather)
1199 #define DRM_IOCTL_SG_FREE       DRM_IOW( 0x39, struct drm_scatter_gather)
1200 
1201 #define DRM_IOCTL_WAIT_VBLANK       DRM_IOWR(0x3a, union drm_wait_vblank)
1202 
1203 #define DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct drm_crtc_get_sequence)
1204 #define DRM_IOCTL_CRTC_QUEUE_SEQUENCE   DRM_IOWR(0x3c, struct drm_crtc_queue_sequence)
1205 
1206 #define DRM_IOCTL_UPDATE_DRAW       DRM_IOW(0x3f, struct drm_update_draw)
1207 
1208 #define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
1209 #define DRM_IOCTL_MODE_GETCRTC      DRM_IOWR(0xA1, struct drm_mode_crtc)
1210 #define DRM_IOCTL_MODE_SETCRTC      DRM_IOWR(0xA2, struct drm_mode_crtc)
1211 #define DRM_IOCTL_MODE_CURSOR       DRM_IOWR(0xA3, struct drm_mode_cursor)
1212 #define DRM_IOCTL_MODE_GETGAMMA     DRM_IOWR(0xA4, struct drm_mode_crtc_lut)
1213 #define DRM_IOCTL_MODE_SETGAMMA     DRM_IOWR(0xA5, struct drm_mode_crtc_lut)
1214 #define DRM_IOCTL_MODE_GETENCODER   DRM_IOWR(0xA6, struct drm_mode_get_encoder)
1215 #define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector)
1216 #define DRM_IOCTL_MODE_ATTACHMODE   DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */
1217 #define DRM_IOCTL_MODE_DETACHMODE   DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */
1218 
1219 #define DRM_IOCTL_MODE_GETPROPERTY  DRM_IOWR(0xAA, struct drm_mode_get_property)
1220 #define DRM_IOCTL_MODE_SETPROPERTY  DRM_IOWR(0xAB, struct drm_mode_connector_set_property)
1221 #define DRM_IOCTL_MODE_GETPROPBLOB  DRM_IOWR(0xAC, struct drm_mode_get_blob)
1222 #define DRM_IOCTL_MODE_GETFB        DRM_IOWR(0xAD, struct drm_mode_fb_cmd)
1223 #define DRM_IOCTL_MODE_ADDFB        DRM_IOWR(0xAE, struct drm_mode_fb_cmd)
1224 /**
1225  * DRM_IOCTL_MODE_RMFB - Remove a framebuffer.
1226  *
1227  * This removes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL
1228  * argument is a framebuffer object ID.
1229  *
1230  * Warning: removing a framebuffer currently in-use on an enabled plane will
1231  * disable that plane. The CRTC the plane is linked to may also be disabled
1232  * (depending on driver capabilities).
1233  */
1234 #define DRM_IOCTL_MODE_RMFB     DRM_IOWR(0xAF, unsigned int)
1235 #define DRM_IOCTL_MODE_PAGE_FLIP    DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip)
1236 #define DRM_IOCTL_MODE_DIRTYFB      DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd)
1237 
1238 /**
1239  * DRM_IOCTL_MODE_CREATE_DUMB - Create a new dumb buffer object.
1240  *
1241  * KMS dumb buffers provide a very primitive way to allocate a buffer object
1242  * suitable for scanout and map it for software rendering. KMS dumb buffers are
1243  * not suitable for hardware-accelerated rendering nor video decoding. KMS dumb
1244  * buffers are not suitable to be displayed on any other device than the KMS
1245  * device where they were allocated from. Also see
1246  * :ref:`kms_dumb_buffer_objects`.
1247  *
1248  * The IOCTL argument is a struct drm_mode_create_dumb.
1249  *
1250  * User-space is expected to create a KMS dumb buffer via this IOCTL, then add
1251  * it as a KMS framebuffer via &DRM_IOCTL_MODE_ADDFB and map it via
1252  * &DRM_IOCTL_MODE_MAP_DUMB.
1253  *
1254  * &DRM_CAP_DUMB_BUFFER indicates whether this IOCTL is supported.
1255  * &DRM_CAP_DUMB_PREFERRED_DEPTH and &DRM_CAP_DUMB_PREFER_SHADOW indicate
1256  * driver preferences for dumb buffers.
1257  */
1258 #define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb)
1259 #define DRM_IOCTL_MODE_MAP_DUMB    DRM_IOWR(0xB3, struct drm_mode_map_dumb)
1260 #define DRM_IOCTL_MODE_DESTROY_DUMB    DRM_IOWR(0xB4, struct drm_mode_destroy_dumb)
1261 #define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res)
1262 #define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane)
1263 #define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane)
1264 #define DRM_IOCTL_MODE_ADDFB2       DRM_IOWR(0xB8, struct drm_mode_fb_cmd2)
1265 #define DRM_IOCTL_MODE_OBJ_GETPROPERTIES    DRM_IOWR(0xB9, struct drm_mode_obj_get_properties)
1266 #define DRM_IOCTL_MODE_OBJ_SETPROPERTY  DRM_IOWR(0xBA, struct drm_mode_obj_set_property)
1267 #define DRM_IOCTL_MODE_CURSOR2      DRM_IOWR(0xBB, struct drm_mode_cursor2)
1268 #define DRM_IOCTL_MODE_ATOMIC       DRM_IOWR(0xBC, struct drm_mode_atomic)
1269 #define DRM_IOCTL_MODE_CREATEPROPBLOB   DRM_IOWR(0xBD, struct drm_mode_create_blob)
1270 #define DRM_IOCTL_MODE_DESTROYPROPBLOB  DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
1271 
1272 #define DRM_IOCTL_SYNCOBJ_CREATE    DRM_IOWR(0xBF, struct drm_syncobj_create)
1273 #define DRM_IOCTL_SYNCOBJ_DESTROY   DRM_IOWR(0xC0, struct drm_syncobj_destroy)
1274 #define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD  DRM_IOWR(0xC1, struct drm_syncobj_handle)
1275 #define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE  DRM_IOWR(0xC2, struct drm_syncobj_handle)
1276 #define DRM_IOCTL_SYNCOBJ_WAIT      DRM_IOWR(0xC3, struct drm_syncobj_wait)
1277 #define DRM_IOCTL_SYNCOBJ_RESET     DRM_IOWR(0xC4, struct drm_syncobj_array)
1278 #define DRM_IOCTL_SYNCOBJ_SIGNAL    DRM_IOWR(0xC5, struct drm_syncobj_array)
1279 
1280 #define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease)
1281 #define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees)
1282 #define DRM_IOCTL_MODE_GET_LEASE    DRM_IOWR(0xC8, struct drm_mode_get_lease)
1283 #define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease)
1284 
1285 #define DRM_IOCTL_SYNCOBJ_TIMELINE_WAIT DRM_IOWR(0xCA, struct drm_syncobj_timeline_wait)
1286 #define DRM_IOCTL_SYNCOBJ_QUERY     DRM_IOWR(0xCB, struct drm_syncobj_timeline_array)
1287 #define DRM_IOCTL_SYNCOBJ_TRANSFER  DRM_IOWR(0xCC, struct drm_syncobj_transfer)
1288 #define DRM_IOCTL_SYNCOBJ_TIMELINE_SIGNAL   DRM_IOWR(0xCD, struct drm_syncobj_timeline_array)
1289 
1290 /**
1291  * DRM_IOCTL_MODE_GETFB2 - Get framebuffer metadata.
1292  *
1293  * This queries metadata about a framebuffer. User-space fills
1294  * &drm_mode_fb_cmd2.fb_id as the input, and the kernels fills the rest of the
1295  * struct as the output.
1296  *
1297  * If the client is DRM master or has &CAP_SYS_ADMIN, &drm_mode_fb_cmd2.handles
1298  * will be filled with GEM buffer handles. Fresh new GEM handles are always
1299  * returned, even if another GEM handle referring to the same memory object
1300  * already exists on the DRM file description. The caller is responsible for
1301  * removing the new handles, e.g. via the &DRM_IOCTL_GEM_CLOSE IOCTL. The same
1302  * new handle will be returned for multiple planes in case they use the same
1303  * memory object. Planes are valid until one has a zero handle -- this can be
1304  * used to compute the number of planes.
1305  *
1306  * Otherwise, &drm_mode_fb_cmd2.handles will be zeroed and planes are valid
1307  * until one has a zero &drm_mode_fb_cmd2.pitches.
1308  *
1309  * If the framebuffer has a format modifier, &DRM_MODE_FB_MODIFIERS will be set
1310  * in &drm_mode_fb_cmd2.flags and &drm_mode_fb_cmd2.modifier will contain the
1311  * modifier. Otherwise, user-space must ignore &drm_mode_fb_cmd2.modifier.
1312  *
1313  * To obtain DMA-BUF FDs for each plane without leaking GEM handles, user-space
1314  * can export each handle via &DRM_IOCTL_PRIME_HANDLE_TO_FD, then immediately
1315  * close each unique handle via &DRM_IOCTL_GEM_CLOSE, making sure to not
1316  * double-close handles which are specified multiple times in the array.
1317  */
1318 #define DRM_IOCTL_MODE_GETFB2       DRM_IOWR(0xCE, struct drm_mode_fb_cmd2)
1319 
1320 #define DRM_IOCTL_SYNCOBJ_EVENTFD   DRM_IOWR(0xCF, struct drm_syncobj_eventfd)
1321 
1322 /**
1323  * DRM_IOCTL_MODE_CLOSEFB - Close a framebuffer.
1324  *
1325  * This closes a framebuffer previously added via ADDFB/ADDFB2. The IOCTL
1326  * argument is a framebuffer object ID.
1327  *
1328  * This IOCTL is similar to &DRM_IOCTL_MODE_RMFB, except it doesn't disable
1329  * planes and CRTCs. As long as the framebuffer is used by a plane, it's kept
1330  * alive. When the plane no longer uses the framebuffer (because the
1331  * framebuffer is replaced with another one, or the plane is disabled), the
1332  * framebuffer is cleaned up.
1333  *
1334  * This is useful to implement flicker-free transitions between two processes.
1335  *
1336  * Depending on the threat model, user-space may want to ensure that the
1337  * framebuffer doesn't expose any sensitive user information: closed
1338  * framebuffers attached to a plane can be read back by the next DRM master.
1339  */
1340 #define DRM_IOCTL_MODE_CLOSEFB      DRM_IOWR(0xD0, struct drm_mode_closefb)
1341 
1342 /**
1343  * DRM_IOCTL_SET_CLIENT_NAME - Attach a name to a drm_file
1344  *
1345  * Having a name allows for easier tracking and debugging.
1346  * The length of the name (without null ending char) must be
1347  * <= DRM_CLIENT_NAME_MAX_LEN.
1348  * The call will fail if the name contains whitespaces or non-printable chars.
1349  */
1350 #define DRM_IOCTL_SET_CLIENT_NAME   DRM_IOWR(0xD1, struct drm_set_client_name)
1351 
1352 /**
1353  * DRM_IOCTL_GEM_CHANGE_HANDLE - Move an object to a different handle
1354  *
1355  * Some applications (notably CRIU) need objects to have specific gem handles.
1356  * This ioctl changes the object at one gem handle to use a new gem handle.
1357  */
1358 #define DRM_IOCTL_GEM_CHANGE_HANDLE    DRM_IOWR(0xD2, struct drm_gem_change_handle)
1359 
1360 /*
1361  * Device specific ioctls should only be in their respective headers
1362  * The device specific ioctl range is from 0x40 to 0x9f.
1363  * Generic IOCTLS restart at 0xA0.
1364  *
1365  * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
1366  * drmCommandReadWrite().
1367  */
1368 #define DRM_COMMAND_BASE                0x40
1369 #define DRM_COMMAND_END         0xA0
1370 
1371 /**
1372  * struct drm_event - Header for DRM events
1373  * @type: event type.
1374  * @length: total number of payload bytes (including header).
1375  *
1376  * This struct is a header for events written back to user-space on the DRM FD.
1377  * A read on the DRM FD will always only return complete events: e.g. if the
1378  * read buffer is 100 bytes large and there are two 64 byte events pending,
1379  * only one will be returned.
1380  *
1381  * Event types 0 - 0x7fffffff are generic DRM events, 0x80000000 and
1382  * up are chipset specific. Generic DRM events include &DRM_EVENT_VBLANK,
1383  * &DRM_EVENT_FLIP_COMPLETE and &DRM_EVENT_CRTC_SEQUENCE.
1384  */
1385 struct drm_event {
1386     __u32 type;
1387     __u32 length;
1388 };
1389 
1390 /**
1391  * DRM_EVENT_VBLANK - vertical blanking event
1392  *
1393  * This event is sent in response to &DRM_IOCTL_WAIT_VBLANK with the
1394  * &_DRM_VBLANK_EVENT flag set.
1395  *
1396  * The event payload is a struct drm_event_vblank.
1397  */
1398 #define DRM_EVENT_VBLANK 0x01
1399 /**
1400  * DRM_EVENT_FLIP_COMPLETE - page-flip completion event
1401  *
1402  * This event is sent in response to an atomic commit or legacy page-flip with
1403  * the &DRM_MODE_PAGE_FLIP_EVENT flag set.
1404  *
1405  * The event payload is a struct drm_event_vblank.
1406  */
1407 #define DRM_EVENT_FLIP_COMPLETE 0x02
1408 /**
1409  * DRM_EVENT_CRTC_SEQUENCE - CRTC sequence event
1410  *
1411  * This event is sent in response to &DRM_IOCTL_CRTC_QUEUE_SEQUENCE.
1412  *
1413  * The event payload is a struct drm_event_crtc_sequence.
1414  */
1415 #define DRM_EVENT_CRTC_SEQUENCE 0x03
1416 
1417 struct drm_event_vblank {
1418     struct drm_event base;
1419     __u64 user_data;
1420     __u32 tv_sec;
1421     __u32 tv_usec;
1422     __u32 sequence;
1423     __u32 crtc_id; /* 0 on older kernels that do not support this */
1424 };
1425 
1426 /* Event delivered at sequence. Time stamp marks when the first pixel
1427  * of the refresh cycle leaves the display engine for the display
1428  */
1429 struct drm_event_crtc_sequence {
1430     struct drm_event    base;
1431     __u64           user_data;
1432     __s64           time_ns;
1433     __u64           sequence;
1434 };
1435 
1436 /* typedef area */
1437 typedef struct drm_clip_rect drm_clip_rect_t;
1438 typedef struct drm_drawable_info drm_drawable_info_t;
1439 typedef struct drm_tex_region drm_tex_region_t;
1440 typedef struct drm_hw_lock drm_hw_lock_t;
1441 typedef struct drm_version drm_version_t;
1442 typedef struct drm_unique drm_unique_t;
1443 typedef struct drm_list drm_list_t;
1444 typedef struct drm_block drm_block_t;
1445 typedef struct drm_control drm_control_t;
1446 typedef enum drm_map_type drm_map_type_t;
1447 typedef enum drm_map_flags drm_map_flags_t;
1448 typedef struct drm_ctx_priv_map drm_ctx_priv_map_t;
1449 typedef struct drm_map drm_map_t;
1450 typedef struct drm_client drm_client_t;
1451 typedef enum drm_stat_type drm_stat_type_t;
1452 typedef struct drm_stats drm_stats_t;
1453 typedef enum drm_lock_flags drm_lock_flags_t;
1454 typedef struct drm_lock drm_lock_t;
1455 typedef enum drm_dma_flags drm_dma_flags_t;
1456 typedef struct drm_buf_desc drm_buf_desc_t;
1457 typedef struct drm_buf_info drm_buf_info_t;
1458 typedef struct drm_buf_free drm_buf_free_t;
1459 typedef struct drm_buf_pub drm_buf_pub_t;
1460 typedef struct drm_buf_map drm_buf_map_t;
1461 typedef struct drm_dma drm_dma_t;
1462 typedef union drm_wait_vblank drm_wait_vblank_t;
1463 typedef struct drm_agp_mode drm_agp_mode_t;
1464 typedef enum drm_ctx_flags drm_ctx_flags_t;
1465 typedef struct drm_ctx drm_ctx_t;
1466 typedef struct drm_ctx_res drm_ctx_res_t;
1467 typedef struct drm_draw drm_draw_t;
1468 typedef struct drm_update_draw drm_update_draw_t;
1469 typedef struct drm_auth drm_auth_t;
1470 typedef struct drm_irq_busid drm_irq_busid_t;
1471 typedef enum drm_vblank_seq_type drm_vblank_seq_type_t;
1472 
1473 typedef struct drm_agp_buffer drm_agp_buffer_t;
1474 typedef struct drm_agp_binding drm_agp_binding_t;
1475 typedef struct drm_agp_info drm_agp_info_t;
1476 typedef struct drm_scatter_gather drm_scatter_gather_t;
1477 typedef struct drm_set_version drm_set_version_t;
1478 
1479 #if defined(__cplusplus)
1480 }
1481 #endif
1482 
1483 #endif