Warning, file /include/eigen3/unsupported/Eigen/CXX11/src/Tensor/TensorDeviceDefault.h was not indexed
or was modified since last indexation (in which case cross-reference links may be missing, inaccurate or erroneous).
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0010 #ifndef EIGEN_CXX11_TENSOR_TENSOR_DEVICE_DEFAULT_H
0011 #define EIGEN_CXX11_TENSOR_TENSOR_DEVICE_DEFAULT_H
0012
0013
0014 namespace Eigen {
0015
0016
0017 struct DefaultDevice {
0018 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void* allocate(size_t num_bytes) const {
0019 return internal::aligned_malloc(num_bytes);
0020 }
0021 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void deallocate(void* buffer) const {
0022 internal::aligned_free(buffer);
0023 }
0024 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void* allocate_temp(size_t num_bytes) const {
0025 return allocate(num_bytes);
0026 }
0027 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void deallocate_temp(void* buffer) const {
0028 deallocate(buffer);
0029 }
0030 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void memcpy(void* dst, const void* src, size_t n) const {
0031 ::memcpy(dst, src, n);
0032 }
0033 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void memcpyHostToDevice(void* dst, const void* src, size_t n) const {
0034 memcpy(dst, src, n);
0035 }
0036 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void memcpyDeviceToHost(void* dst, const void* src, size_t n) const {
0037 memcpy(dst, src, n);
0038 }
0039 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE void memset(void* buffer, int c, size_t n) const {
0040 ::memset(buffer, c, n);
0041 }
0042 template<typename Type>
0043 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE Type get(Type data) const {
0044 return data;
0045 }
0046
0047 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE size_t numThreads() const {
0048 #if !defined(EIGEN_GPU_COMPILE_PHASE)
0049
0050 return 1;
0051 #elif defined(EIGEN_HIP_DEVICE_COMPILE)
0052
0053 return 64;
0054 #else
0055
0056 return 32;
0057 #endif
0058 }
0059
0060 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE size_t firstLevelCacheSize() const {
0061 #if !defined(EIGEN_GPU_COMPILE_PHASE) && !defined(SYCL_DEVICE_ONLY)
0062
0063 return l1CacheSize();
0064 #elif defined(EIGEN_HIP_DEVICE_COMPILE)
0065
0066 return 48*1024;
0067 #else
0068
0069 return 48*1024;
0070 #endif
0071 }
0072
0073 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE size_t lastLevelCacheSize() const {
0074 #if !defined(EIGEN_GPU_COMPILE_PHASE) && !defined(SYCL_DEVICE_ONLY)
0075
0076 return l3CacheSize();
0077 #elif defined(EIGEN_HIP_DEVICE_COMPILE)
0078
0079 return firstLevelCacheSize();
0080 #else
0081
0082 return firstLevelCacheSize();
0083 #endif
0084 }
0085
0086 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE int majorDeviceVersion() const {
0087 #if !defined(EIGEN_GPU_COMPILE_PHASE)
0088
0089
0090 return 1;
0091 #elif defined(EIGEN_HIP_DEVICE_COMPILE)
0092
0093
0094 return 1;
0095 #else
0096
0097 return EIGEN_CUDA_ARCH / 100;
0098 #endif
0099 }
0100 };
0101
0102 }
0103
0104 #endif