track/detail/TrackSortUtils.hh

0001 //----------------------------------*-C++-*----------------------------------//
0002 // Copyright 2023-2024 UT-Battelle, LLC, and other Celeritas developers.
0003 // See the top-level COPYRIGHT file for details.
0004 // SPDX-License-Identifier: (Apache-2.0 OR MIT)
0005 //---------------------------------------------------------------------------//
0006 //! \file celeritas/track/detail/TrackSortUtils.hh
0007 //---------------------------------------------------------------------------//
0008 #pragma once
0009
0010 #include <type_traits>
0011
0012 #include "corecel/Assert.hh"
0013 #include "corecel/Macros.hh"
0014 #include "corecel/Types.hh"
0015 #include "corecel/cont/Span.hh"
0016 #include "corecel/data/ObserverPtr.hh"
0017 #include "corecel/sys/ThreadId.hh"
0018 #include "celeritas/global/CoreTrackData.hh"
0019
0020 namespace celeritas
0021 {
0022 namespace detail
0023 {
0024 //---------------------------------------------------------------------------//
0025 // HELPER FUNCTIONS
0026 //---------------------------------------------------------------------------//
0027
0028 //---------------------------------------------------------------------------//
0029 // Sort or partition tracks
0030 void sort_tracks(HostRef<CoreStateData> const&, TrackOrder);
0031 void sort_tracks(DeviceRef<CoreStateData> const&, TrackOrder);
0032
0033 //---------------------------------------------------------------------------//
0034 // Count tracks associated to each action
0035 void count_tracks_per_action(
0036     HostRef<CoreStateData> const&,
0037     Span<ThreadId>,
0038     Collection<ThreadId, Ownership::value, MemSpace::host, ActionId>&,
0039     TrackOrder);
0040
0041 void count_tracks_per_action(
0042     DeviceRef<CoreStateData> const&,
0043     Span<ThreadId>,
0044     Collection<ThreadId, Ownership::value, MemSpace::mapped, ActionId>&,
0045     TrackOrder);
0046
0047 //---------------------------------------------------------------------------//
0048 // Fill missing action offsets.
0049 void backfill_action_count(Span<ThreadId>, size_type);
0050
0051 //---------------------------------------------------------------------------//
0052 // HELPER CLASSES AND FUNCTIONS
0053 //---------------------------------------------------------------------------//
0054 //! Uses as a predicate to sort inactive tracks from active
0055 struct IsNotInactive
0056 {
0057     ObserverPtr<TrackStatus const> status_;
0058
0059     CELER_FUNCTION bool operator()(size_type track_slot) const
0060     {
0061         return status_.get()[track_slot] != TrackStatus::inactive;
0062     }
0063 };
0064
0065 //! Map from a thread ID to an action ID by pointer indirection
0066 struct ActionAccessor
0067 {
0068     ObserverPtr<ActionId const> action_;
0069     ObserverPtr<TrackSlotId::size_type const> track_slots_;
0070
0071     CELER_FUNCTION ActionId operator()(ThreadId tid) const
0072     {
0073         return action_.get()[track_slots_.get()[tid.get()]];
0074     }
0075 };
0076
0077 //---------------------------------------------------------------------------//
0078 //! Return a raw pointer to action IDs based on the given sort order
0079 template<Ownership W, MemSpace M>
0080 CELER_FUNCTION ObserverPtr<ActionId const>
0081 get_action_ptr(CoreStateData<W, M> const& states, TrackOrder order)
0082 {
0083     if (order == TrackOrder::reindex_along_step_action)
0084     {
0085         return states.sim.along_step_action.data();
0086     }
0087     else if (order == TrackOrder::reindex_step_limit_action)
0088     {
0089         return states.sim.post_step_action.data();
0090     }
0091     CELER_ASSERT_UNREACHABLE();
0092 }
0093
0094 //---------------------------------------------------------------------------//
0095 // INLINE DEFINITIONS
0096 //---------------------------------------------------------------------------//
0097 #if !CELER_USE_DEVICE
0098 inline void sort_tracks(DeviceRef<CoreStateData> const&, TrackOrder)
0099 {
0100     CELER_NOT_CONFIGURED("CUDA or HIP");
0101 }
0102
0103 inline void count_tracks_per_action(
0104     DeviceRef<CoreStateData> const&,
0105     Span<ThreadId>,
0106     Collection<ThreadId, Ownership::value, MemSpace::mapped, ActionId>&,
0107     TrackOrder)
0108 {
0109     CELER_NOT_CONFIGURED("CUDA or HIP");
0110 }
0111 #endif
0112 //---------------------------------------------------------------------------//
0113 }  // namespace detail
0114 }  // namespace celeritas