File indexing completed on 2025-09-18 09:09:15
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0007 #pragma once
0008
0009 #include <type_traits>
0010
0011 #include "corecel/Assert.hh"
0012 #include "corecel/Macros.hh"
0013 #include "corecel/Types.hh"
0014 #include "corecel/cont/Span.hh"
0015 #include "corecel/data/ObserverPtr.hh"
0016 #include "corecel/sys/ThreadId.hh"
0017 #include "celeritas/global/CoreTrackData.hh"
0018
0019 namespace celeritas
0020 {
0021 namespace detail
0022 {
0023
0024
0025
0026
0027
0028
0029 void sort_tracks(HostRef<CoreStateData> const&, TrackOrder);
0030 void sort_tracks(DeviceRef<CoreStateData> const&, TrackOrder);
0031
0032
0033
0034 void count_tracks_per_action(
0035 HostRef<CoreStateData> const&,
0036 Span<ThreadId>,
0037 Collection<ThreadId, Ownership::value, MemSpace::host, ActionId>&,
0038 TrackOrder);
0039
0040 void count_tracks_per_action(
0041 DeviceRef<CoreStateData> const&,
0042 Span<ThreadId>,
0043 Collection<ThreadId, Ownership::value, MemSpace::mapped, ActionId>&,
0044 TrackOrder);
0045
0046
0047
0048 void backfill_action_count(Span<ThreadId>, size_type);
0049
0050
0051
0052
0053
0054 struct IsNotInactive
0055 {
0056 ObserverPtr<TrackStatus const> status_;
0057
0058 CELER_FUNCTION bool operator()(size_type track_slot) const
0059 {
0060 return status_.get()[track_slot] != TrackStatus::inactive;
0061 }
0062 };
0063
0064
0065 struct ActionAccessor
0066 {
0067 ObserverPtr<ActionId const> action_;
0068 ObserverPtr<TrackSlotId::size_type const> track_slots_;
0069
0070 CELER_FUNCTION ActionId operator()(ThreadId tid) const
0071 {
0072 return action_.get()[track_slots_.get()[tid.get()]];
0073 }
0074 };
0075
0076
0077
0078 template<Ownership W, MemSpace M>
0079 CELER_FUNCTION ObserverPtr<ActionId const>
0080 get_action_ptr(CoreStateData<W, M> const& states, TrackOrder order)
0081 {
0082 if (order == TrackOrder::reindex_along_step_action)
0083 {
0084 return states.sim.along_step_action.data();
0085 }
0086 else if (order == TrackOrder::reindex_step_limit_action)
0087 {
0088 return states.sim.post_step_action.data();
0089 }
0090 CELER_ASSERT_UNREACHABLE();
0091 }
0092
0093
0094
0095
0096 #if !CELER_USE_DEVICE
0097 inline void sort_tracks(DeviceRef<CoreStateData> const&, TrackOrder)
0098 {
0099 CELER_NOT_CONFIGURED("CUDA or HIP");
0100 }
0101
0102 inline void count_tracks_per_action(
0103 DeviceRef<CoreStateData> const&,
0104 Span<ThreadId>,
0105 Collection<ThreadId, Ownership::value, MemSpace::mapped, ActionId>&,
0106 TrackOrder)
0107 {
0108 CELER_NOT_CONFIGURED("CUDA or HIP");
0109 }
0110 #endif
0111
0112 }
0113 }