atomic/detail/fence_ops_gcc_atomic.hpp

0001 /*
0002  * Distributed under the Boost Software License, Version 1.0.
0003  * (See accompanying file LICENSE_1_0.txt or copy at
0004  * http://www.boost.org/LICENSE_1_0.txt)
0005  *
0006  * Copyright (c) 2020 Andrey Semashev
0007  */
0008 /*!
0009  * \file   atomic/detail/fence_ops_gcc_atomic.hpp
0010  *
0011  * This header contains implementation of the \c fence_operations struct.
0012  */
0013
0014 #ifndef BOOST_ATOMIC_DETAIL_FENCE_OPS_GCC_ATOMIC_HPP_INCLUDED_
0015 #define BOOST_ATOMIC_DETAIL_FENCE_OPS_GCC_ATOMIC_HPP_INCLUDED_
0016
0017 #include <boost/memory_order.hpp>
0018 #include <boost/atomic/detail/config.hpp>
0019 #include <boost/atomic/detail/fence_arch_operations.hpp>
0020 #include <boost/atomic/detail/gcc_atomic_memory_order_utils.hpp>
0021 #include <boost/atomic/detail/header.hpp>
0022
0023 #ifdef BOOST_HAS_PRAGMA_ONCE
0024 #pragma once
0025 #endif
0026
0027 #if defined(__INTEL_COMPILER)
0028 // This is used to suppress warning #32013 described in gcc_atomic_memory_order_utils.hpp
0029 // for Intel Compiler.
0030 // In debug builds the compiler does not inline any functions, so basically
0031 // every atomic function call results in this warning. I don't know any other
0032 // way to selectively disable just this one warning.
0033 #pragma system_header
0034 #endif
0035
0036 namespace boost {
0037 namespace atomics {
0038 namespace detail {
0039
0040 //! Fence operations based on gcc __atomic* intrinsics
0041 struct fence_operations_gcc_atomic
0042 {
0043     static BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
0044     {
0045 #if defined(__x86_64__) || defined(__i386__)
0046         if (order != memory_order_seq_cst)
0047         {
0048             __atomic_thread_fence(atomics::detail::convert_memory_order_to_gcc(order));
0049         }
0050         else
0051         {
0052             // gcc, clang, icc and probably other compilers generate mfence for a seq_cst fence,
0053             // while a dummy lock-prefixed instruction would be enough and faster. See the comment in fence_ops_gcc_x86.hpp.
0054             fence_arch_operations::thread_fence(order);
0055         }
0056 #else
0057         __atomic_thread_fence(atomics::detail::convert_memory_order_to_gcc(order));
0058 #endif
0059     }
0060
0061     static BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
0062     {
0063         __atomic_signal_fence(atomics::detail::convert_memory_order_to_gcc(order));
0064     }
0065 };
0066
0067 typedef fence_operations_gcc_atomic fence_operations;
0068
0069 } // namespace detail
0070 } // namespace atomics
0071 } // namespace boost
0072
0073 #include <boost/atomic/detail/footer.hpp>
0074
0075 #endif // BOOST_ATOMIC_DETAIL_FENCE_OPS_GCC_ATOMIC_HPP_INCLUDED_