atomic/detail/fence_arch_ops_gcc_x86.hpp

0001 /*
0002  * Distributed under the Boost Software License, Version 1.0.
0003  * (See accompanying file LICENSE_1_0.txt or copy at
0004  * http://www.boost.org/LICENSE_1_0.txt)
0005  *
0006  * Copyright (c) 2020 Andrey Semashev
0007  */
0008 /*!
0009  * \file   atomic/detail/fence_arch_ops_gcc_x86.hpp
0010  *
0011  * This header contains implementation of the \c fence_arch_operations struct.
0012  */
0013
0014 #ifndef BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_X86_HPP_INCLUDED_
0015 #define BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_X86_HPP_INCLUDED_
0016
0017 #include <boost/memory_order.hpp>
0018 #include <boost/atomic/detail/config.hpp>
0019 #include <boost/atomic/detail/header.hpp>
0020
0021 #ifdef BOOST_HAS_PRAGMA_ONCE
0022 #pragma once
0023 #endif
0024
0025 namespace boost {
0026 namespace atomics {
0027 namespace detail {
0028
0029 //! Fence operations for x86
0030 struct fence_arch_operations_gcc_x86
0031 {
0032     static BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
0033     {
0034         if (order == memory_order_seq_cst)
0035         {
0036             // We could generate mfence for a seq_cst fence here, but a dummy lock-prefixed instruction is enough
0037             // and is faster than mfence on most modern x86 CPUs (as of 2020).
0038             // Note that we want to apply the atomic operation on any location so that:
0039             // - It is not shared with other threads. A variable on the stack suits this well.
0040             // - It is likely in cache. Being close to the top of the stack fits this well.
0041             // - It does not alias existing data on the stack, so that we don't introduce a false data dependency.
0042             // See some performance data here: https://shipilev.net/blog/2014/on-the-fence-with-dependencies/
0043             // Unfortunately, to make tools like valgrind happy, we have to initialize the dummy, which is
0044             // otherwise not needed.
0045             unsigned char dummy = 0u;
0046             __asm__ __volatile__ ("lock; notb %0" : "+m" (dummy) : : "memory");
0047         }
0048         else if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_acquire) | static_cast< unsigned int >(memory_order_release))) != 0u)
0049         {
0050             __asm__ __volatile__ ("" ::: "memory");
0051         }
0052     }
0053
0054     static BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
0055     {
0056         if (order != memory_order_relaxed)
0057             __asm__ __volatile__ ("" ::: "memory");
0058     }
0059 };
0060
0061 typedef fence_arch_operations_gcc_x86 fence_arch_operations;
0062
0063 } // namespace detail
0064 } // namespace atomics
0065 } // namespace boost
0066
0067 #include <boost/atomic/detail/footer.hpp>
0068
0069 #endif // BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_X86_HPP_INCLUDED_