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0014 #ifndef BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_
0015 #define BOOST_ATOMIC_DETAIL_FENCE_ARCH_OPS_GCC_PPC_HPP_INCLUDED_
0016
0017 #include <boost/memory_order.hpp>
0018 #include <boost/atomic/detail/config.hpp>
0019 #include <boost/atomic/detail/header.hpp>
0020
0021 #ifdef BOOST_HAS_PRAGMA_ONCE
0022 #pragma once
0023 #endif
0024
0025 namespace boost {
0026 namespace atomics {
0027 namespace detail {
0028
0029
0030 struct fence_arch_operations_gcc_ppc
0031 {
0032 static BOOST_FORCEINLINE void thread_fence(memory_order order) BOOST_NOEXCEPT
0033 {
0034 if (order != memory_order_relaxed)
0035 {
0036 #if defined(__powerpc64__) || defined(__PPC64__)
0037 if (order != memory_order_seq_cst)
0038 __asm__ __volatile__ ("lwsync" ::: "memory");
0039 else
0040 __asm__ __volatile__ ("sync" ::: "memory");
0041 #else
0042 __asm__ __volatile__ ("sync" ::: "memory");
0043 #endif
0044 }
0045 }
0046
0047 static BOOST_FORCEINLINE void signal_fence(memory_order order) BOOST_NOEXCEPT
0048 {
0049 if (order != memory_order_relaxed)
0050 {
0051 #if defined(__ibmxl__) || defined(__IBMCPP__)
0052 __fence();
0053 #else
0054 __asm__ __volatile__ ("" ::: "memory");
0055 #endif
0056 }
0057 }
0058 };
0059
0060 typedef fence_arch_operations_gcc_ppc fence_arch_operations;
0061
0062 }
0063 }
0064 }
0065
0066 #include <boost/atomic/detail/footer.hpp>
0067
0068 #endif