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0016 #ifndef BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_
0017 #define BOOST_ATOMIC_DETAIL_CORE_ARCH_OPS_GCC_SPARC_HPP_INCLUDED_
0018
0019 #include <cstddef>
0020 #include <boost/memory_order.hpp>
0021 #include <boost/atomic/detail/config.hpp>
0022 #include <boost/atomic/detail/storage_traits.hpp>
0023 #include <boost/atomic/detail/core_arch_operations_fwd.hpp>
0024 #include <boost/atomic/detail/core_ops_cas_based.hpp>
0025 #include <boost/atomic/detail/cas_based_exchange.hpp>
0026 #include <boost/atomic/detail/extending_cas_based_arithmetic.hpp>
0027 #include <boost/atomic/detail/header.hpp>
0028
0029 #ifdef BOOST_HAS_PRAGMA_ONCE
0030 #pragma once
0031 #endif
0032
0033 namespace boost {
0034 namespace atomics {
0035 namespace detail {
0036
0037 struct gcc_sparc_cas_base
0038 {
0039 static BOOST_CONSTEXPR_OR_CONST bool full_cas_based = true;
0040 static BOOST_CONSTEXPR_OR_CONST bool is_always_lock_free = true;
0041
0042 static BOOST_FORCEINLINE void fence_before(memory_order order) BOOST_NOEXCEPT
0043 {
0044 if (order == memory_order_seq_cst)
0045 __asm__ __volatile__ ("membar #Sync" ::: "memory");
0046 else if ((static_cast< unsigned int >(order) & static_cast< unsigned int >(memory_order_release)) != 0u)
0047 __asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
0048 }
0049
0050 static BOOST_FORCEINLINE void fence_after(memory_order order) BOOST_NOEXCEPT
0051 {
0052 if (order == memory_order_seq_cst)
0053 __asm__ __volatile__ ("membar #Sync" ::: "memory");
0054 else if ((static_cast< unsigned int >(order) & (static_cast< unsigned int >(memory_order_consume) | static_cast< unsigned int >(memory_order_acquire))) != 0u)
0055 __asm__ __volatile__ ("membar #StoreStore | #LoadStore" ::: "memory");
0056 }
0057
0058 static BOOST_FORCEINLINE void fence_after_store(memory_order order) BOOST_NOEXCEPT
0059 {
0060 if (order == memory_order_seq_cst)
0061 __asm__ __volatile__ ("membar #Sync" ::: "memory");
0062 }
0063 };
0064
0065 template< bool Signed, bool Interprocess >
0066 struct gcc_sparc_cas32 :
0067 public gcc_sparc_cas_base
0068 {
0069 typedef typename storage_traits< 4u >::type storage_type;
0070
0071 static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 4u;
0072 static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 4u;
0073 static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
0074 static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
0075
0076 static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
0077 {
0078 fence_before(order);
0079 storage = v;
0080 fence_after_store(order);
0081 }
0082
0083 static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order order) BOOST_NOEXCEPT
0084 {
0085 storage_type v = storage;
0086 fence_after(order);
0087 return v;
0088 }
0089
0090 static BOOST_FORCEINLINE bool compare_exchange_strong(
0091 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
0092 {
0093 fence_before(success_order);
0094 storage_type previous = expected;
0095 __asm__ __volatile__
0096 (
0097 "cas [%1], %2, %0"
0098 : "+r" (desired)
0099 : "r" (&storage), "r" (previous)
0100 : "memory"
0101 );
0102 const bool success = (desired == previous);
0103 if (success)
0104 fence_after(success_order);
0105 else
0106 fence_after(failure_order);
0107 expected = desired;
0108 return success;
0109 }
0110
0111 static BOOST_FORCEINLINE bool compare_exchange_weak(
0112 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
0113 {
0114 return compare_exchange_strong(storage, expected, desired, success_order, failure_order);
0115 }
0116
0117 static BOOST_FORCEINLINE storage_type exchange(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
0118 {
0119 fence_before(order);
0120 __asm__ __volatile__
0121 (
0122 "swap [%1], %0"
0123 : "+r" (v)
0124 : "r" (&storage)
0125 : "memory"
0126 );
0127 fence_after(order);
0128 return v;
0129 }
0130 };
0131
0132 template< bool Signed, bool Interprocess >
0133 struct core_arch_operations< 4u, Signed, Interprocess > :
0134 public core_operations_cas_based< gcc_sparc_cas32< Signed, Interprocess > >
0135 {
0136 };
0137
0138 template< bool Signed, bool Interprocess >
0139 struct core_arch_operations< 1u, Signed, Interprocess > :
0140 public extending_cas_based_arithmetic< core_arch_operations< 4u, Signed, Interprocess >, 1u, Signed >
0141 {
0142 };
0143
0144 template< bool Signed, bool Interprocess >
0145 struct core_arch_operations< 2u, Signed, Interprocess > :
0146 public extending_cas_based_arithmetic< core_arch_operations< 4u, Signed, Interprocess >, 2u, Signed >
0147 {
0148 };
0149
0150 template< bool Signed, bool Interprocess >
0151 struct gcc_sparc_cas64 :
0152 public gcc_sparc_cas_base
0153 {
0154 typedef typename storage_traits< 8u >::type storage_type;
0155
0156 static BOOST_CONSTEXPR_OR_CONST std::size_t storage_size = 8u;
0157 static BOOST_CONSTEXPR_OR_CONST std::size_t storage_alignment = 8u;
0158 static BOOST_CONSTEXPR_OR_CONST bool is_signed = Signed;
0159 static BOOST_CONSTEXPR_OR_CONST bool is_interprocess = Interprocess;
0160
0161 static BOOST_FORCEINLINE void store(storage_type volatile& storage, storage_type v, memory_order order) BOOST_NOEXCEPT
0162 {
0163 fence_before(order);
0164 storage = v;
0165 fence_after_store(order);
0166 }
0167
0168 static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order order) BOOST_NOEXCEPT
0169 {
0170 storage_type v = storage;
0171 fence_after(order);
0172 return v;
0173 }
0174
0175 static BOOST_FORCEINLINE bool compare_exchange_strong(
0176 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
0177 {
0178 fence_before(success_order);
0179 storage_type previous = expected;
0180 __asm__ __volatile__
0181 (
0182 "casx [%1], %2, %0"
0183 : "+r" (desired)
0184 : "r" (&storage), "r" (previous)
0185 : "memory"
0186 );
0187 const bool success = (desired == previous);
0188 if (success)
0189 fence_after(success_order);
0190 else
0191 fence_after(failure_order);
0192 expected = desired;
0193 return success;
0194 }
0195
0196 static BOOST_FORCEINLINE bool compare_exchange_weak(
0197 storage_type volatile& storage, storage_type& expected, storage_type desired, memory_order success_order, memory_order failure_order) BOOST_NOEXCEPT
0198 {
0199 return compare_exchange_strong(storage, expected, desired, success_order, failure_order);
0200 }
0201 };
0202
0203 template< bool Signed, bool Interprocess >
0204 struct core_arch_operations< 8u, Signed, Interprocess > :
0205 public core_operations_cas_based< cas_based_exchange< gcc_sparc_cas64< Signed, Interprocess > > >
0206 {
0207 };
0208
0209 }
0210 }
0211 }
0212
0213 #include <boost/atomic/detail/footer.hpp>
0214
0215 #endif