arrow/util/cpu_info.h

0001 // Licensed to the Apache Software Foundation (ASF) under one
0002 // or more contributor license agreements.  See the NOTICE file
0003 // distributed with this work for additional information
0004 // regarding copyright ownership.  The ASF licenses this file
0005 // to you under the Apache License, Version 2.0 (the
0006 // "License"); you may not use this file except in compliance
0007 // with the License.  You may obtain a copy of the License at
0008 //
0009 //   http://www.apache.org/licenses/LICENSE-2.0
0010 //
0011 // Unless required by applicable law or agreed to in writing,
0012 // software distributed under the License is distributed on an
0013 // "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
0014 // KIND, either express or implied.  See the License for the
0015 // specific language governing permissions and limitations
0016 // under the License.
0017
0018 // From Apache Impala (incubating) as of 2016-01-29. Pared down to a minimal
0019 // set of functions needed for Apache Arrow / Apache parquet-cpp
0020
0021 #pragma once
0022
0023 #include <cstdint>
0024 #include <memory>
0025 #include <string>
0026
0027 #include "arrow/util/macros.h"
0028 #include "arrow/util/visibility.h"
0029
0030 namespace arrow {
0031 namespace internal {
0032
0033 /// CpuInfo is an interface to query for cpu information at runtime.  The caller can
0034 /// ask for the sizes of the caches and what hardware features are supported.
0035 /// On Linux, this information is pulled from a couple of sys files (/proc/cpuinfo and
0036 /// /sys/devices)
0037 class ARROW_EXPORT CpuInfo {
0038  public:
0039   ~CpuInfo();
0040
0041   /// x86 features
0042   static constexpr int64_t SSSE3 = (1LL << 0);
0043   static constexpr int64_t SSE4_1 = (1LL << 1);
0044   static constexpr int64_t SSE4_2 = (1LL << 2);
0045   static constexpr int64_t POPCNT = (1LL << 3);
0046   static constexpr int64_t AVX = (1LL << 4);
0047   static constexpr int64_t AVX2 = (1LL << 5);
0048   static constexpr int64_t AVX512F = (1LL << 6);
0049   static constexpr int64_t AVX512CD = (1LL << 7);
0050   static constexpr int64_t AVX512VL = (1LL << 8);
0051   static constexpr int64_t AVX512DQ = (1LL << 9);
0052   static constexpr int64_t AVX512BW = (1LL << 10);
0053   static constexpr int64_t AVX512 = AVX512F | AVX512CD | AVX512VL | AVX512DQ | AVX512BW;
0054   static constexpr int64_t BMI1 = (1LL << 11);
0055   static constexpr int64_t BMI2 = (1LL << 12);
0056
0057   /// Arm features
0058   static constexpr int64_t ASIMD = (1LL << 32);
0059
0060   /// Cache enums for L1 (data), L2 and L3
0061   enum class CacheLevel { L1 = 0, L2, L3, Last = L3 };
0062
0063   /// CPU vendors
0064   enum class Vendor { Unknown, Intel, AMD };
0065
0066   static const CpuInfo* GetInstance();
0067
0068   /// Returns all the flags for this cpu
0069   int64_t hardware_flags() const;
0070
0071   /// Returns the number of cores (including hyper-threaded) on this machine.
0072   int num_cores() const;
0073
0074   /// Returns the vendor of the cpu.
0075   Vendor vendor() const;
0076
0077   /// Returns the model name of the cpu (e.g. Intel i7-2600)
0078   const std::string& model_name() const;
0079
0080   /// Returns the size of the cache in KB at this cache level
0081   int64_t CacheSize(CacheLevel level) const;
0082
0083   /// \brief Returns whether or not the given feature is enabled.
0084   ///
0085   /// IsSupported() is true iff IsDetected() is also true and the feature
0086   /// wasn't disabled by the user (for example by setting the ARROW_USER_SIMD_LEVEL
0087   /// environment variable).
0088   bool IsSupported(int64_t flags) const;
0089
0090   /// Returns whether or not the given feature is available on the CPU.
0091   bool IsDetected(int64_t flags) const;
0092
0093   /// Determine if the CPU meets the minimum CPU requirements and if not, issue an error
0094   /// and terminate.
0095   void VerifyCpuRequirements() const;
0096
0097   /// Toggle a hardware feature on and off.  It is not valid to turn on a feature
0098   /// that the underlying hardware cannot support. This is useful for testing.
0099   void EnableFeature(int64_t flag, bool enable);
0100
0101   bool HasEfficientBmi2() const {
0102     // BMI2 (pext, pdep) is only efficient on Intel X86 processors.
0103     return vendor() == Vendor::Intel && IsSupported(BMI2);
0104   }
0105
0106  private:
0107   CpuInfo();
0108
0109   struct Impl;
0110   std::unique_ptr<Impl> impl_;
0111 };
0112
0113 }  // namespace internal
0114 }  // namespace arrow