include/QtCore/qsimd.h

0001 // Copyright (C) 2020 The Qt Company Ltd.
0002 // Copyright (C) 2022 Intel Corporation.
0003 // SPDX-License-Identifier: LicenseRef-Qt-Commercial OR LGPL-3.0-only OR GPL-2.0-only OR GPL-3.0-only
0004
0005 #ifndef QSIMD_H
0006 #define QSIMD_H
0007
0008 #include <QtCore/qglobal.h>
0009
0010 /*
0011  * qconfig.h defines the QT_COMPILER_SUPPORTS_XXX macros.
0012  * They mean the compiler supports the necessary flags and the headers
0013  * for the x86 and ARM intrinsics.
0014  *
0015  * Supported instruction set extensions are:
0016  *   Flag      | Arch
0017  *  neon       | ARM
0018  *  mips_dsp   | mips
0019  *  mips_dspr2 | mips
0020  *  sse2       | x86
0021  *  sse4_1     | x86
0022  *  sse4_2     | x86
0023  *  avx        | x86
0024  *
0025  * Code can use the following constructs to determine compiler support & status:
0026  * - #if QT_COMPILER_USES(XXX) (e.g: #if QT_COMPILER_USES(neon) or QT_COMPILER_USES(sse4_1)
0027  *   If this test passes, then the compiler is already generating code using the
0028  *   given instruction set. The intrinsics for those instructions are
0029  *   #included and can be used without restriction or runtime check.
0030  *
0031  * Code that requires runtime detection and different code paths at runtime is
0032  * currently not supported here, have a look at qsimd_p.h for support.
0033  */
0034
0035 #define QT_COMPILER_USES(feature) (1/QT_COMPILER_USES_##feature == 1)
0036
0037 #if defined(Q_PROCESSOR_ARM) && defined(__ARM_NEON) || defined(__ARM_NEON__)
0038 #  include <arm_neon.h>
0039 #  define QT_COMPILER_USES_neon 1
0040 #else
0041 #  define QT_COMPILER_USES_neon -1
0042 #endif
0043
0044 #if defined(Q_PROCESSOR_MIPS) && (defined(__MIPS_DSP__) || (defined(__mips_dsp) && defined(Q_PROCESSOR_MIPS_32)))
0045 #  define QT_COMPILER_USES_mips_dsp 1
0046 #else
0047 #  define QT_COMPILER_USES_mips_dsp -1
0048 #endif
0049
0050 #if defined(Q_PROCESSOR_MIPS) && (defined(__MIPS_DSPR2__) || (defined(__mips_dspr2) && defined(Q_PROCESSOR_MIPS_32)))
0051 #  define QT_COMPILER_USES_mips_dspr2 1
0052 #else
0053 #  define QT_COMPILER_USES_mips_dspr2 -1
0054 #endif
0055
0056 #if defined(Q_PROCESSOR_X86) && defined(Q_CC_MSVC)
0057 // MSVC doesn't define __SSE2__, so do it ourselves
0058 #  if (defined(_M_X64) || _M_IX86_FP >= 2) && defined(QT_COMPILER_SUPPORTS_SSE2)
0059 #    define __SSE__ 1
0060 #    define __SSE2__ 1
0061 #  endif
0062 #  if (defined(_M_AVX) || defined(__AVX__))
0063 // Visual Studio defines __AVX__ when /arch:AVX is passed, but not the earlier macros
0064 // See: https://msdn.microsoft.com/en-us/library/b0084kay.aspx
0065 #    define __SSE3__                        1
0066 #    define __SSSE3__                       1
0067 #    define __SSE4_1__                      1
0068 #    define __SSE4_2__                      1
0069 #    define __POPCNT__                      1
0070 #    ifndef __AVX__
0071 #      define __AVX__                       1
0072 #    endif
0073 #  endif
0074 #  ifdef __SSE2__
0075 #    define QT_VECTORCALL __vectorcall
0076 #  endif
0077 #  ifdef __AVX2__
0078 // MSVC defines __AVX2__ with /arch:AVX2
0079 #    define __F16C__                        1
0080 #    define __RDRND__                       1
0081 #    define __FMA__                         1
0082 #    define __BMI__                         1
0083 #    define __BMI2__                        1
0084 #    define __MOVBE__                       1
0085 #    define __LZCNT__                       1
0086 #  endif
0087 // Starting with /arch:AVX512, MSVC defines all the macros
0088 #endif
0089
0090 #if defined(Q_PROCESSOR_X86) && defined(__SSE2__)
0091 #  include <immintrin.h>
0092 #  define QT_COMPILER_USES_sse2 1
0093 #else
0094 #  define QT_COMPILER_USES_sse2 -1
0095 #endif
0096
0097 #if defined(Q_PROCESSOR_X86) && defined(__SSE3__)
0098 #  define QT_COMPILER_USES_sse3 1
0099 #else
0100 #  define QT_COMPILER_USES_sse3 -1
0101 #endif
0102
0103 #if defined(Q_PROCESSOR_X86) && defined(__SSSE3__)
0104 #  define QT_COMPILER_USES_ssse3 1
0105 #else
0106 #  define QT_COMPILER_USES_ssse3 -1
0107 #endif
0108
0109 #if defined(Q_PROCESSOR_X86) && defined(__SSE4_1__)
0110 #  define QT_COMPILER_USES_sse4_1 1
0111 #else
0112 #  define QT_COMPILER_USES_sse4_1 -1
0113 #endif
0114
0115 #if defined(Q_PROCESSOR_X86) && defined(__SSE4_2__)
0116 #  define QT_COMPILER_USES_sse4_2 1
0117 #else
0118 #  define QT_COMPILER_USES_sse4_2 -1
0119 #endif
0120
0121 #if defined(Q_PROCESSOR_X86) && defined(__AVX__)
0122 #  define QT_COMPILER_USES_avx 1
0123 #else
0124 #  define QT_COMPILER_USES_avx -1
0125 #endif
0126
0127 #ifndef QT_VECTORCALL
0128 #define QT_VECTORCALL
0129 #endif
0130
0131 QT_BEGIN_NAMESPACE
0132 QT_END_NAMESPACE
0133
0134 #endif // QSIMD_H