include/h2g_decode/line_builder.h

0001 /*
0002 Collects lines from the input stream and builds a 40 byte packet from them.
0003 */
0004
0005 #pragma once
0006
0007 #include <cstdint>
0008 #include <list>
0009 #include <vector>
0010
0011 struct line {
0012     uint32_t fpga;
0013     uint32_t asic;
0014     uint32_t half;
0015     uint32_t line_number;
0016     uint32_t timestamp;
0017     uint32_t package[8];
0018 };
0019
0020 struct line_stream {
0021     uint8_t fpga;
0022     uint32_t asic;
0023     uint32_t half;
0024     uint32_t timestamp;
0025     uint32_t found;
0026     line *lines[5];
0027 };
0028
0029 struct sample {
0030     uint32_t fpga;
0031     uint32_t asic;
0032     uint32_t half;
0033     uint32_t timestamp;
0034     uint32_t bunch_counter;
0035     uint32_t event_counter;
0036     uint32_t orbit_counter;
0037     uint32_t hamming_code;
0038     uint32_t cm;
0039     uint32_t calib;
0040     uint32_t crc;
0041     uint32_t adc[36];
0042     uint32_t toa[36];
0043     uint32_t tot[36];
0044 };
0045
0046
0047 class line_builder {
0048 private:
0049     uint32_t num_fpga;
0050     std::list<line_stream*> *in_progress;
0051     std::list<line_stream*> *complete;
0052     std::vector<std::list<sample*>*> *samples;
0053     uint32_t events_aborted;
0054     uint32_t events_completed;
0055     int32_t num_found[16];
0056
0057     uint32_t bit_converter(uint8_t *buffer, int start, bool big_endian=true);
0058     uint8_t decode_fpga(uint8_t fpga_id);
0059     uint8_t decode_asic(uint8_t asic_id);
0060     uint8_t decode_half(uint8_t half_id);
0061
0062
0063     void decode_line(uint8_t *buffer, line *l);
0064     bool is_complete(line_stream *ls);
0065
0066
0067 public:
0068     line_builder(uint32_t num_fpga);
0069     ~line_builder();
0070
0071     bool process_packet(uint8_t *packet);
0072     bool process_complete();
0073     std::list<sample*> *get_completed(uint32_t fpga);
0074
0075 };